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Fix incorrect ordering of SRC and DST MAC addresses in Ethernet and dot1q. This was reported by Derek Andrew. Thanks, Derek!

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This commit is contained in:
Luis MartinGarcia 2017-03-24 21:30:45 +00:00
parent cd02a4c615
commit 6fd2fb7209
1 changed files with 2 additions and 2 deletions
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4
specs.py
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@ -65,7 +65,7 @@
# + Payload +
# | |
# +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
ethernet="Source Address:48,Destination Address:48,EtherType:16,Payload:128?bits=48"
ethernet="Destination Address:48,Source Address:48,EtherType:16,Payload:128?bits=48"
# +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
@ -79,7 +79,7 @@ ethernet="Source Address:48,Destination Address:48,EtherType:16,Payload:128?bits
# + Payload +
# | |
# +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
dot1q="Source Address:48,Destination Address:48,TPID (0x8100):16,PCP:3,D:1,\
dot1q="Destination Address:48,Source Address:48,TPID (0x8100):16,PCP:3,D:1,\
VLAN ID:12,EtherType:16,Payload:96?bits=48"