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85 lines
1.4 KiB
Plaintext
85 lines
1.4 KiB
Plaintext
This directory contains mpn functions for various HP PA-RISC chips. Code
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that runs faster on the PA7100 and later implementations, is in the pa7100
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directory.
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RELEVANT OPTIMIZATION ISSUES
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Load and Store timing
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On the PA7000 no memory instructions can issue the two cycles after a store.
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For the PA7100, this is reduced to one cycle.
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The PA7100 has a lookup-free cache, so it helps to schedule loads and the
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dependent instruction really far from each other.
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STATUS
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1. mpn_mul_1 could be improved to 6.5 cycles/limb on the PA7100, using the
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instructions bwlow (but some sw pipelining is needed to avoid the
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xmpyu-fstds delay):
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fldds s1_ptr
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xmpyu
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fstds N(%r30)
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xmpyu
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fstds N(%r30)
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ldws N(%r30)
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ldws N(%r30)
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ldws N(%r30)
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ldws N(%r30)
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addc
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stws res_ptr
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addc
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stws res_ptr
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addib Loop
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2. mpn_addmul_1 could be improved from the current 10 to 7.5 cycles/limb
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(asymptotically) on the PA7100, using the instructions below. With proper
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sw pipelining and the unrolling level below, the speed becomes 8
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cycles/limb.
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fldds s1_ptr
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fldds s1_ptr
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xmpyu
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fstds N(%r30)
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xmpyu
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fstds N(%r30)
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xmpyu
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fstds N(%r30)
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xmpyu
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fstds N(%r30)
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ldws N(%r30)
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ldws N(%r30)
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ldws N(%r30)
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ldws N(%r30)
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ldws N(%r30)
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ldws N(%r30)
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ldws N(%r30)
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ldws N(%r30)
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addc
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addc
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addc
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addc
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addc %r0,%r0,cy-limb
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ldws res_ptr
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ldws res_ptr
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ldws res_ptr
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ldws res_ptr
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add
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stws res_ptr
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addc
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stws res_ptr
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addc
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stws res_ptr
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addc
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stws res_ptr
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addib
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