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gnupg/mpi/mips3
2001-04-29 14:08:29 +00:00
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distfiles Add Rijndael support, changes to fix an IRIX problem. 2000-10-12 14:34:01 +00:00
mpi-asm-defs.h This commit was manufactured by cvs2svn to create branch 2000-10-11 17:26:49 +00:00
mpih-add1.S Fixed copyright year lists according to CVS and ChangeLogs 2001-04-29 14:08:29 +00:00
mpih-lshift.S Fixed copyright year lists according to CVS and ChangeLogs 2001-04-29 14:08:29 +00:00
mpih-mul1.S Fixed copyright year lists according to CVS and ChangeLogs 2001-04-29 14:08:29 +00:00
mpih-mul2.S Fixed copyright year lists according to CVS and ChangeLogs 2001-04-29 14:08:29 +00:00
mpih-mul3.S Fixed copyright year lists according to CVS and ChangeLogs 2001-04-29 14:08:29 +00:00
mpih-rshift.S Fixed copyright year lists according to CVS and ChangeLogs 2001-04-29 14:08:29 +00:00
mpih-sub1.S Fixed copyright year lists according to CVS and ChangeLogs 2001-04-29 14:08:29 +00:00
README See ChangeLog: Thu Jan 21 06:22:10 CET 1999 Werner Koch 1999-01-21 05:25:29 +00:00

This directory contains mpn functions optimized for MIPS3.  Example of
processors that implement MIPS3 are R4000, R4400, R4600, R4700, and R8000.

RELEVANT OPTIMIZATION ISSUES

1. On the R4000 and R4400, branches, both the plain and the "likely" ones,
   take 3 cycles to execute.  (The fastest possible loop will take 4 cycles,
   because of the delay insn.)

   On the R4600, branches takes a single cycle

   On the R8000, branches often take no noticable cycles, as they are
   executed in a separate function unit..

2. The R4000 and R4400 have a load latency of 4 cycles.

3. On the R4000 and R4400, multiplies take a data-dependent number of
   cycles, contrary to the SGI documentation.  There seem to be 3 or 4
   possible latencies.

STATUS

Good...