Sync triple-a library.
This commit is contained in:
Mika Tuupola
parent
b442556dd0
commit
7733eee103
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@ -73,7 +73,7 @@ int main(void) {
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digital_write(SS, LOW);
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digital_write(SS, HIGH);
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_delay_ms(500);
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_delay_ms(50);
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}
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return 0;
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@ -35,7 +35,8 @@
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# MCU name
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MCU = atmega328p
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#MCU = atmega328p
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MCU = atmega32u4
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# Processor frequency.
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# This will define a symbol, F_CPU, in all source code files equal to the
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@ -51,7 +52,8 @@ FORMAT = ihex
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TARGET = main
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# List C source files here. (C dependencies are automatically generated.)
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SRC = $(TARGET).c uart_async.c
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SRC = $(TARGET).c
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#uart_async.c
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# List Assembler source files here.
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# Make them always end in a capital .S. Files ending in a lowercase .s
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@ -192,7 +194,8 @@ LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
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# Type: avrdude -c ?
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# to get a full listing.
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#
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AVRDUDE_PROGRAMMER = arduino
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#AVRDUDE_PROGRAMMER = arduino
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AVRDUDE_PROGRAMMER = avr109
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# com1 = serial port. Use lpt1 to connect to parallel port.
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AVRDUDE_PORT = /dev/tty.usb* # programmer connected to serial device
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@ -26,7 +26,7 @@
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#include <avr/sfr_defs.h>
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#include "main.h"
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#include "uart.h"
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//#include "uart.h"
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void init(void) {
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@ -54,9 +54,9 @@ void digital_write(volatile int *data_port, int pin, int value) {
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int main(void) {
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init();
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uart_init();
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stdout = &uart_output;
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stdin = &uart_input;
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//uart_init();
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//stdout = &uart_output;
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//stdin = &uart_input;
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while (1) {
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/* Blink led by toggling state of PORTB5 (Arduino digital 13). */
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@ -35,8 +35,8 @@
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# MCU name
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MCU = atmega328p
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#MCU = atmega328p
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MCU = atmega32u4
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# Processor frequency.
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# This will define a symbol, F_CPU, in all source code files equal to the
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# processor frequency. You can then use this symbol in your source code to
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@ -51,7 +51,7 @@ FORMAT = ihex
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TARGET = main
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# List C source files here. (C dependencies are automatically generated.)
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SRC = $(TARGET).c uart_async.c
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SRC = $(TARGET).c uart/uart_async.c
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# List Assembler source files here.
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# Make them always end in a capital .S. Files ending in a lowercase .s
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@ -192,7 +192,8 @@ LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
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# Type: avrdude -c ?
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# to get a full listing.
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#
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AVRDUDE_PROGRAMMER = arduino
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#AVRDUDE_PROGRAMMER = arduino
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AVRDUDE_PROGRAMMER = avr109
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# com1 = serial port. Use lpt1 to connect to parallel port.
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AVRDUDE_PORT = /dev/tty.usb* # programmer connected to serial device
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@ -1,29 +0,0 @@
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/*
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* digital.h
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*
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* Lightweight macro implementation of Arduino style pin numbering
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* for AVR microprocessors. Because only thing I want to use from
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* Arduino libraries is the pin numbering scheme.
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*
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* This file taken 99% from the excellent ArduinoLite project by
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* Shikai Chen <csk@live.com>. Some minor changes to suite my personal
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* coding taste.
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*
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* http://code.google.com/p/arduino-lite/
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* http://www.csksoft.net/
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*
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* Copyright (c) 2010-2011 Shikai Chen
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*
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* Licensed under the LGPL 2.1 license:
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* http://www.opensource.org/licenses/lgpl-2.1.php
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*/
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#ifndef DIGITAL_H
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#define DIGITAL_H
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#include "pins.h"
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#define digital_read(pin) EXPAND_WRAPPER(_D_READ, ARDUINOPIN_TO_PORTID(pin), ARDUINOPIN_TO_PORTMSK(pin) )
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#define digital_read_raw(pin) EXPAND_WRAPPER(_D_READ_RAW, ARDUINOPIN_TO_PORTID(pin), ARDUINOPIN_TO_PORTMSK(pin) )
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#define digital_write(pin, val) D_WRITE_##val(pin)
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#endif /* DIGITAL_H */
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@ -35,13 +35,17 @@
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#include <util/delay.h>
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#include "main.h"
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#include "uart.h"
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#include "pins.h"
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#include "digital.h"
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#include "uart/uart.h"
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#include "pins/digital.h"
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//#define LATCH 10 /* RCK */
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//#define DATA 11 /* SER IN */
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//#define CLOCK 13 /* SRCK */
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#define LATCH B0 /* RCK */
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#define DATA B2 /* SER IN */
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#define CLOCK B1 /* SRCK */
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#define LATCH 10 /* RCK */
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#define DATA 11 /* SER IN */
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#define CLOCK 13 /* SRCK */
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static void init(void) {
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pin_mode(LATCH, OUTPUT);
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@ -71,7 +75,6 @@ int main(void) {
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uart_init();
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stdout = &uart_output;
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stdin = &uart_input;
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char binary[17];
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/* Show pattern for 5 seconds. */
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@ -1,569 +0,0 @@
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/*
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* pins.h
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*
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* Lightweight macro implementation of Arduino style pin numbering
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* for AVR microprocessors. Because only thing I want to use from
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* Arduino libraries is the pin numbering scheme.
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*
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* This file taken 99% from the excellent ArduinoLite project by
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* Shikai Chen <csk@live.com>. Some minor changes to suite my personal
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* coding taste.
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*
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* http://code.google.com/p/arduino-lite/
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* http://www.csksoft.net/
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*
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* Copyright (c) 2010-2011 Shikai Chen
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*
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* Licensed under the LGPL 2.1 license:
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* http://www.opensource.org/licenses/lgpl-2.1.php
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*/
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#ifndef PINS_H
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#define PINS_H
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#include <avr/sfr_defs.h>
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#include <avr/io.h>
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#define HIGH 0x1
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#define LOW 0x0
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#define INPUT 0x0
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#define OUTPUT 0x1
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#define ENABLE 0x1
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#define DISABLE 0x0
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#define ARDUINOPIN_TO_TIMERID(x) TIMER_AT_PIN_##x
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#define ARDUINOPIN_TO_TCCRID(x) TCCR_AT_PIN_##x
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#define ARDUINOPIN_TO_PORTID(x) PORT_AT_PIN_##x
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#define ARDUINOPIN_TO_PORTMSK(x) PORTMSK_AT_PIN_##x
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#define PORTID_TO_DIR_REG(x) DIR_REG_AT_##x
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#define PORTID_TO_OUTPUT_REG(x) OUTPUT_REG_AT_##x
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#define PORTID_TO_INPUT_REG(x) INPUT_REG_AT_##x
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#if defined(__AVR_ATmega1280__)
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#define PORT_AT_PIN_0 PortE // PE 0 ** 0 ** USART0_RX
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#define PORT_AT_PIN_1 PortE // PE 1 ** 1 ** USART0_TX
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#define PORT_AT_PIN_2 PortE // PE 4 ** 2 ** PWM2
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#define PORT_AT_PIN_3 PortE // PE 5 ** 3 ** PWM3
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#define PORT_AT_PIN_4 PortG // PG 5 ** 4 ** PWM4
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#define PORT_AT_PIN_5 PortE // PE 3 ** 5 ** PWM5
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#define PORT_AT_PIN_6 PortH // PH 3 ** 6 ** PWM6
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#define PORT_AT_PIN_7 PortH // PH 4 ** 7 ** PWM7
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#define PORT_AT_PIN_8 PortH // PH 5 ** 8 ** PWM8
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#define PORT_AT_PIN_9 PortH // PH 6 ** 9 ** PWM9
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#define PORT_AT_PIN_10 PortB // PB 4 ** 10 ** PWM10
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#define PORT_AT_PIN_11 PortB // PB 5 ** 11 ** PWM11
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#define PORT_AT_PIN_12 PortB // PB 6 ** 12 ** PWM12
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#define PORT_AT_PIN_13 PortB // PB 7 ** 13 ** PWM13
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#define PORT_AT_PIN_14 PortJ // PJ 1 ** 14 ** USART3_TX
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#define PORT_AT_PIN_15 PortJ // PJ 0 ** 15 ** USART3_RX
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#define PORT_AT_PIN_16 PortH // PH 1 ** 16 ** USART2_TX
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#define PORT_AT_PIN_17 PortH // PH 0 ** 17 ** USART2_RX
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#define PORT_AT_PIN_18 PortD // PD 3 ** 18 ** USART1_TX
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#define PORT_AT_PIN_19 PortD // PD 2 ** 19 ** USART1_RX
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#define PORT_AT_PIN_20 PortD // PD 1 ** 20 ** I2C_SDA
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#define PORT_AT_PIN_21 PortD // PD 0 ** 21 ** I2C_SCL
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#define PORT_AT_PIN_22 PortA // PA 0 ** 22 ** D22
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#define PORT_AT_PIN_23 PortA // PA 1 ** 23 ** D23
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#define PORT_AT_PIN_24 PortA // PA 2 ** 24 ** D24
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#define PORT_AT_PIN_25 PortA // PA 3 ** 25 ** D25
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#define PORT_AT_PIN_26 PortA // PA 4 ** 26 ** D26
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#define PORT_AT_PIN_27 PortA // PA 5 ** 27 ** D27
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#define PORT_AT_PIN_28 PortA // PA 6 ** 28 ** D28
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#define PORT_AT_PIN_29 PortA // PA 7 ** 29 ** D29
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#define PORT_AT_PIN_30 PortC // PC 7 ** 30 ** D30
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#define PORT_AT_PIN_31 PortC // PC 6 ** 31 ** D31
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#define PORT_AT_PIN_32 PortC // PC 5 ** 32 ** D32
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#define PORT_AT_PIN_33 PortC // PC 4 ** 33 ** D33
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#define PORT_AT_PIN_34 PortC // PC 3 ** 34 ** D34
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#define PORT_AT_PIN_35 PortC // PC 2 ** 35 ** D35
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#define PORT_AT_PIN_36 PortC // PC 1 ** 36 ** D36
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#define PORT_AT_PIN_37 PortC // PC 0 ** 37 ** D37
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#define PORT_AT_PIN_38 PortD // PD 7 ** 38 ** D38
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#define PORT_AT_PIN_39 PortG // PG 2 ** 39 ** D39
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#define PORT_AT_PIN_40 PortG // PG 1 ** 40 ** D40
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#define PORT_AT_PIN_41 PortG // PG 0 ** 41 ** D41
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#define PORT_AT_PIN_42 PortL // PL 7 ** 42 ** D42
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#define PORT_AT_PIN_43 PortL // PL 6 ** 43 ** D43
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#define PORT_AT_PIN_44 PortL // PL 5 ** 44 ** D44
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#define PORT_AT_PIN_45 PortL // PL 4 ** 45 ** D45
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#define PORT_AT_PIN_46 PortL // PL 3 ** 46 ** D46
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#define PORT_AT_PIN_47 PortL // PL 2 ** 47 ** D47
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#define PORT_AT_PIN_48 PortL // PL 1 ** 48 ** D48
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#define PORT_AT_PIN_49 PortL // PL 0 ** 49 ** D49
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#define PORT_AT_PIN_50 PortB // PB 3 ** 50 ** SPI_MISO
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#define PORT_AT_PIN_51 PortB // PB 2 ** 51 ** SPI_MOSI
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#define PORT_AT_PIN_52 PortB // PB 1 ** 52 ** SPI_SCK
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#define PORT_AT_PIN_53 PortB // PB 0 ** 53 ** SPI_SS
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#define PORT_AT_PIN_54 PortF // PF 0 ** 54 ** A0
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#define PORT_AT_PIN_55 PortF // PF 1 ** 55 ** A1
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#define PORT_AT_PIN_56 PortF // PF 2 ** 56 ** A2
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#define PORT_AT_PIN_57 PortF // PF 3 ** 57 ** A3
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#define PORT_AT_PIN_58 PortF // PF 4 ** 58 ** A4
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#define PORT_AT_PIN_59 PortF // PF 5 ** 59 ** A5
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#define PORT_AT_PIN_60 PortF // PF 6 ** 60 ** A6
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#define PORT_AT_PIN_61 PortF // PF 7 ** 61 ** A7
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#define PORT_AT_PIN_62 PortK // PK 0 ** 62 ** A8
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#define PORT_AT_PIN_63 PortK // PK 1 ** 63 ** A9
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#define PORT_AT_PIN_64 PortK // PK 2 ** 64 ** A10
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#define PORT_AT_PIN_65 PortK // PK 3 ** 65 ** A11
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#define PORT_AT_PIN_66 PortK // PK 4 ** 66 ** A12
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#define PORT_AT_PIN_67 PortK // PK 5 ** 67 ** A13
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#define PORT_AT_PIN_68 PortK // PK 6 ** 68 ** A14
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#define PORT_AT_PIN_69 PortK // PK 7 ** 69 ** A15
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#define PORTMSK_AT_PIN_0 _BV( 0 ) // PE 0 ** 0 ** USART0_RX
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#define PORTMSK_AT_PIN_1 _BV( 1 ) // PE 1 ** 1 ** USART0_TX
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#define PORTMSK_AT_PIN_2 _BV( 4 ) // PE 4 ** 2 ** PWM2
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#define PORTMSK_AT_PIN_3 _BV( 5 ) // PE 5 ** 3 ** PWM3
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#define PORTMSK_AT_PIN_4 _BV( 5 ) // PG 5 ** 4 ** PWM4
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#define PORTMSK_AT_PIN_5 _BV( 3 ) // PE 3 ** 5 ** PWM5
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#define PORTMSK_AT_PIN_6 _BV( 3 ) // PH 3 ** 6 ** PWM6
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#define PORTMSK_AT_PIN_7 _BV( 4 ) // PH 4 ** 7 ** PWM7
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#define PORTMSK_AT_PIN_8 _BV( 5 ) // PH 5 ** 8 ** PWM8
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#define PORTMSK_AT_PIN_9 _BV( 6 ) // PH 6 ** 9 ** PWM9
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#define PORTMSK_AT_PIN_10 _BV( 4 ) // PB 4 ** 10 ** PWM10
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#define PORTMSK_AT_PIN_11 _BV( 5 ) // PB 5 ** 11 ** PWM11
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#define PORTMSK_AT_PIN_12 _BV( 6 ) // PB 6 ** 12 ** PWM12
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#define PORTMSK_AT_PIN_13 _BV( 7 ) // PB 7 ** 13 ** PWM13
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#define PORTMSK_AT_PIN_14 _BV( 1 ) // PJ 1 ** 14 ** USART3_TX
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#define PORTMSK_AT_PIN_15 _BV( 0 ) // PJ 0 ** 15 ** USART3_RX
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#define PORTMSK_AT_PIN_16 _BV( 1 ) // PH 1 ** 16 ** USART2_TX
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#define PORTMSK_AT_PIN_17 _BV( 0 ) // PH 0 ** 17 ** USART2_RX
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#define PORTMSK_AT_PIN_18 _BV( 3 ) // PD 3 ** 18 ** USART1_TX
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#define PORTMSK_AT_PIN_19 _BV( 2 ) // PD 2 ** 19 ** USART1_RX
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#define PORTMSK_AT_PIN_20 _BV( 1 ) // PD 1 ** 20 ** I2C_SDA
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#define PORTMSK_AT_PIN_21 _BV( 0 ) // PD 0 ** 21 ** I2C_SCL
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#define PORTMSK_AT_PIN_22 _BV( 0 ) // PA 0 ** 22 ** D22
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#define PORTMSK_AT_PIN_23 _BV( 1 ) // PA 1 ** 23 ** D23
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#define PORTMSK_AT_PIN_24 _BV( 2 ) // PA 2 ** 24 ** D24
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#define PORTMSK_AT_PIN_25 _BV( 3 ) // PA 3 ** 25 ** D25
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#define PORTMSK_AT_PIN_26 _BV( 4 ) // PA 4 ** 26 ** D26
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#define PORTMSK_AT_PIN_27 _BV( 5 ) // PA 5 ** 27 ** D27
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#define PORTMSK_AT_PIN_28 _BV( 6 ) // PA 6 ** 28 ** D28
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#define PORTMSK_AT_PIN_29 _BV( 7 ) // PA 7 ** 29 ** D29
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#define PORTMSK_AT_PIN_30 _BV( 7 ) // PC 7 ** 30 ** D30
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#define PORTMSK_AT_PIN_31 _BV( 6 ) // PC 6 ** 31 ** D31
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#define PORTMSK_AT_PIN_32 _BV( 5 ) // PC 5 ** 32 ** D32
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#define PORTMSK_AT_PIN_33 _BV( 4 ) // PC 4 ** 33 ** D33
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#define PORTMSK_AT_PIN_34 _BV( 3 ) // PC 3 ** 34 ** D34
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#define PORTMSK_AT_PIN_35 _BV( 2 ) // PC 2 ** 35 ** D35
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#define PORTMSK_AT_PIN_36 _BV( 1 ) // PC 1 ** 36 ** D36
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#define PORTMSK_AT_PIN_37 _BV( 0 ) // PC 0 ** 37 ** D37
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#define PORTMSK_AT_PIN_38 _BV( 7 ) // PD 7 ** 38 ** D38
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#define PORTMSK_AT_PIN_39 _BV( 2 ) // PG 2 ** 39 ** D39
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#define PORTMSK_AT_PIN_40 _BV( 1 ) // PG 1 ** 40 ** D40
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#define PORTMSK_AT_PIN_41 _BV( 0 ) // PG 0 ** 41 ** D41
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#define PORTMSK_AT_PIN_42 _BV( 7 ) // PL 7 ** 42 ** D42
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#define PORTMSK_AT_PIN_43 _BV( 6 ) // PL 6 ** 43 ** D43
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#define PORTMSK_AT_PIN_44 _BV( 5 ) // PL 5 ** 44 ** D44
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#define PORTMSK_AT_PIN_45 _BV( 4 ) // PL 4 ** 45 ** D45
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#define PORTMSK_AT_PIN_46 _BV( 3 ) // PL 3 ** 46 ** D46
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#define PORTMSK_AT_PIN_47 _BV( 2 ) // PL 2 ** 47 ** D47
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#define PORTMSK_AT_PIN_48 _BV( 1 ) // PL 1 ** 48 ** D48
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#define PORTMSK_AT_PIN_49 _BV( 0 ) // PL 0 ** 49 ** D49
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#define PORTMSK_AT_PIN_50 _BV( 3 ) // PB 3 ** 50 ** SPI_MISO
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#define PORTMSK_AT_PIN_51 _BV( 2 ) // PB 2 ** 51 ** SPI_MOSI
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#define PORTMSK_AT_PIN_52 _BV( 1 ) // PB 1 ** 52 ** SPI_SCK
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#define PORTMSK_AT_PIN_53 _BV( 0 ) // PB 0 ** 53 ** SPI_SS
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#define PORTMSK_AT_PIN_54 _BV( 0 ) // PF 0 ** 54 ** A0
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#define PORTMSK_AT_PIN_55 _BV( 1 ) // PF 1 ** 55 ** A1
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#define PORTMSK_AT_PIN_56 _BV( 2 ) // PF 2 ** 56 ** A2
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#define PORTMSK_AT_PIN_57 _BV( 3 ) // PF 3 ** 57 ** A3
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#define PORTMSK_AT_PIN_58 _BV( 4 ) // PF 4 ** 58 ** A4
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#define PORTMSK_AT_PIN_59 _BV( 5 ) // PF 5 ** 59 ** A5
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#define PORTMSK_AT_PIN_60 _BV( 6 ) // PF 6 ** 60 ** A6
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#define PORTMSK_AT_PIN_61 _BV( 7 ) // PF 7 ** 61 ** A7
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#define PORTMSK_AT_PIN_62 _BV( 0 ) // PK 0 ** 62 ** A8
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#define PORTMSK_AT_PIN_63 _BV( 1 ) // PK 1 ** 63 ** A9
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#define PORTMSK_AT_PIN_64 _BV( 2 ) // PK 2 ** 64 ** A10
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#define PORTMSK_AT_PIN_65 _BV( 3 ) // PK 3 ** 65 ** A11
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#define PORTMSK_AT_PIN_66 _BV( 4 ) // PK 4 ** 66 ** A12
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#define PORTMSK_AT_PIN_67 _BV( 5 ) // PK 5 ** 67 ** A13
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#define PORTMSK_AT_PIN_68 _BV( 6 ) // PK 6 ** 68 ** A14
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#define PORTMSK_AT_PIN_69 _BV( 7 ) // PK 7 ** 69 ** A15
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////////////Arduino pin to Timer Regs mapping
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#define TIMER_AT_PIN_2 3B
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#define TCCR_AT_PIN_2 TCCR3A
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#define TIMER_AT_PIN_3 3C
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#define TCCR_AT_PIN_3 TCCR3A
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#define TIMER_AT_PIN_4 0B
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#define TCCR_AT_PIN_4 TCCR0A
|
||||
|
||||
#define TIMER_AT_PIN_5 3A
|
||||
#define TCCR_AT_PIN_5 TCCR3A
|
||||
|
||||
#define TIMER_AT_PIN_6 4A
|
||||
#define TCCR_AT_PIN_6 TCCR4A
|
||||
|
||||
#define TIMER_AT_PIN_7 4B
|
||||
#define TCCR_AT_PIN_7 TCCR4A
|
||||
|
||||
#define TIMER_AT_PIN_8 4C
|
||||
#define TCCR_AT_PIN_8 TCCR4A
|
||||
|
||||
#define TIMER_AT_PIN_9 2B
|
||||
#define TCCR_AT_PIN_9 TCCR2A
|
||||
|
||||
#define TIMER_AT_PIN_10 2A
|
||||
#define TCCR_AT_PIN_10 TCCR2A
|
||||
|
||||
#define TIMER_AT_PIN_11 1A
|
||||
#define TCCR_AT_PIN_11 TCCR1A
|
||||
|
||||
#define TIMER_AT_PIN_12 1B
|
||||
#define TCCR_AT_PIN_12 TCCR1A
|
||||
|
||||
#define TIMER_AT_PIN_13 0A
|
||||
#define TCCR_AT_PIN_13 TCCR0A
|
||||
|
||||
#define TIMER_AT_PIN_44 5C
|
||||
#define TCCR_AT_PIN_44 TCCR5A
|
||||
|
||||
#define TIMER_AT_PIN_45 5B
|
||||
#define TCCR_AT_PIN_45 TCCR5A
|
||||
|
||||
#define TIMER_AT_PIN_46 5A
|
||||
#define TCCR_AT_PIN_46 TCCR5A
|
||||
|
||||
|
||||
////////////PORT to DDRX mapping
|
||||
#define DIR_REG_AT_PortA DDRA
|
||||
#define DIR_REG_AT_PortB DDRB
|
||||
#define DIR_REG_AT_PortC DDRC
|
||||
#define DIR_REG_AT_PortD DDRD
|
||||
#define DIR_REG_AT_PortE DDRE
|
||||
#define DIR_REG_AT_PortF DDRF
|
||||
#define DIR_REG_AT_PortG DDRG
|
||||
#define DIR_REG_AT_PortH DDRH
|
||||
|
||||
#define DIR_REG_AT_PortJ DDRJ
|
||||
#define DIR_REG_AT_PortK DDRK
|
||||
#define DIR_REG_AT_PortL DDRL
|
||||
|
||||
////////////PORT to PORTX mapping
|
||||
#define OUTPUT_REG_AT_PortA PORTA
|
||||
#define OUTPUT_REG_AT_PortB PORTB
|
||||
#define OUTPUT_REG_AT_PortC PORTC
|
||||
#define OUTPUT_REG_AT_PortD PORTD
|
||||
#define OUTPUT_REG_AT_PortE PORTE
|
||||
#define OUTPUT_REG_AT_PortF PORTF
|
||||
#define OUTPUT_REG_AT_PortG PORTG
|
||||
#define OUTPUT_REG_AT_PortH PORTH
|
||||
|
||||
#define OUTPUT_REG_AT_PortJ PORTJ
|
||||
#define OUTPUT_REG_AT_PortK PORTK
|
||||
#define OUTPUT_REG_AT_PortL PORTL
|
||||
|
||||
////////////PORT to PINX(input regs) mapping
|
||||
#define INPUT_REG_AT_PortA PINA
|
||||
#define INPUT_REG_AT_PortB PINB
|
||||
#define INPUT_REG_AT_PortC PINC
|
||||
#define INPUT_REG_AT_PortD PIND
|
||||
#define INPUT_REG_AT_PortE PINE
|
||||
#define INPUT_REG_AT_PortF PINF
|
||||
#define INPUT_REG_AT_PortG PING
|
||||
#define INPUT_REG_AT_PortH PINH
|
||||
|
||||
#define INPUT_REG_AT_PortJ PINJ
|
||||
#define INPUT_REG_AT_PortK PINK
|
||||
#define INPUT_REG_AT_PortL PINL
|
||||
|
||||
#else /* not __AVR_ATmega1280__ */
|
||||
|
||||
#if defined(__AVR_ATtiny2313__)
|
||||
//no PortC on tiny2313
|
||||
//Pin[0-6] -> PortD[0-6]
|
||||
#define PORT_AT_PIN_0 PortD /* 0 */
|
||||
#define PORT_AT_PIN_1 PortD
|
||||
#define PORT_AT_PIN_2 PortD
|
||||
#define PORT_AT_PIN_3 PortD
|
||||
#define PORT_AT_PIN_4 PortD
|
||||
#define PORT_AT_PIN_5 PortD
|
||||
#define PORT_AT_PIN_6 PortD
|
||||
|
||||
//Pin[7-14] -> PortB[0-7]
|
||||
#define PORT_AT_PIN_7 PortB
|
||||
#define PORT_AT_PIN_8 PortB /* 8 */
|
||||
#define PORT_AT_PIN_9 PortB
|
||||
#define PORT_AT_PIN_10 PortB
|
||||
#define PORT_AT_PIN_11 PortB
|
||||
#define PORT_AT_PIN_12 PortB
|
||||
#define PORT_AT_PIN_13 PortB
|
||||
#define PORT_AT_PIN_14 PortB
|
||||
|
||||
#elif defined(__AVR_ATtiny26__)
|
||||
|
||||
//Pin[0-6] -> PortD[0-6]
|
||||
#define PORT_AT_PIN_0 PortB /* 0 */
|
||||
#define PORT_AT_PIN_1 PortB
|
||||
#define PORT_AT_PIN_2 PortB
|
||||
#define PORT_AT_PIN_3 PortB
|
||||
#define PORT_AT_PIN_4 PortB
|
||||
#define PORT_AT_PIN_5 PortB
|
||||
#define PORT_AT_PIN_6 PortB
|
||||
|
||||
|
||||
//D[7-13] and A[0-9] share the same pins on Attiny26
|
||||
#define PORT_AT_PIN_7 PortA /* 0 */
|
||||
#define PORT_AT_PIN_8 PortA
|
||||
#define PORT_AT_PIN_9 PortA
|
||||
#define PORT_AT_PIN_10 PortA
|
||||
#define PORT_AT_PIN_11 PortA
|
||||
#define PORT_AT_PIN_12 PortA
|
||||
#define PORT_AT_PIN_13 PortA
|
||||
|
||||
#else // Atmega8 / Atmegax8
|
||||
#define PORT_AT_PIN_0 PortD /* 0 */
|
||||
#define PORT_AT_PIN_1 PortD
|
||||
#define PORT_AT_PIN_2 PortD
|
||||
#define PORT_AT_PIN_3 PortD
|
||||
#define PORT_AT_PIN_4 PortD
|
||||
#define PORT_AT_PIN_5 PortD
|
||||
#define PORT_AT_PIN_6 PortD
|
||||
#define PORT_AT_PIN_7 PortD
|
||||
#define PORT_AT_PIN_8 PortB /* 8 */
|
||||
#define PORT_AT_PIN_9 PortB
|
||||
#define PORT_AT_PIN_10 PortB
|
||||
#define PORT_AT_PIN_11 PortB
|
||||
#define PORT_AT_PIN_12 PortB
|
||||
#define PORT_AT_PIN_13 PortB
|
||||
#define PORT_AT_PIN_14 PortC /* 14 */
|
||||
#define PORT_AT_PIN_15 PortC
|
||||
#define PORT_AT_PIN_16 PortC
|
||||
#define PORT_AT_PIN_17 PortC
|
||||
#define PORT_AT_PIN_18 PortC
|
||||
#define PORT_AT_PIN_19 PortC
|
||||
|
||||
#define PORT_AT_PIN_20 PortB
|
||||
#define PORT_AT_PIN_21 PortB
|
||||
#endif
|
||||
|
||||
|
||||
#if defined(__AVR_ATtiny2313__)
|
||||
#define PORTMSK_AT_PIN_0 _BV(0)
|
||||
#define PORTMSK_AT_PIN_1 _BV(1)
|
||||
#define PORTMSK_AT_PIN_2 _BV(2)
|
||||
#define PORTMSK_AT_PIN_3 _BV(3)
|
||||
#define PORTMSK_AT_PIN_4 _BV(4)
|
||||
#define PORTMSK_AT_PIN_5 _BV(5)
|
||||
#define PORTMSK_AT_PIN_6 _BV(6)
|
||||
#define PORTMSK_AT_PIN_7 _BV(0)
|
||||
#define PORTMSK_AT_PIN_8 _BV(1)
|
||||
#define PORTMSK_AT_PIN_9 _BV(2)
|
||||
#define PORTMSK_AT_PIN_10 _BV(3)
|
||||
#define PORTMSK_AT_PIN_11 _BV(4)
|
||||
#define PORTMSK_AT_PIN_12 _BV(5)
|
||||
#define PORTMSK_AT_PIN_13 _BV(6)
|
||||
#define PORTMSK_AT_PIN_14 _BV(7)
|
||||
|
||||
#elif defined(__AVR_ATtiny26__)
|
||||
|
||||
#define PORTMSK_AT_PIN_0 _BV(0)
|
||||
#define PORTMSK_AT_PIN_1 _BV(1)
|
||||
#define PORTMSK_AT_PIN_2 _BV(2)
|
||||
#define PORTMSK_AT_PIN_3 _BV(3)
|
||||
#define PORTMSK_AT_PIN_4 _BV(4)
|
||||
#define PORTMSK_AT_PIN_5 _BV(5)
|
||||
#define PORTMSK_AT_PIN_6 _BV(6)
|
||||
#define PORTMSK_AT_PIN_7 _BV(0)
|
||||
#define PORTMSK_AT_PIN_8 _BV(1)
|
||||
#define PORTMSK_AT_PIN_9 _BV(2)
|
||||
#define PORTMSK_AT_PIN_10 _BV(3)
|
||||
#define PORTMSK_AT_PIN_11 _BV(4)
|
||||
#define PORTMSK_AT_PIN_12 _BV(5)
|
||||
#define PORTMSK_AT_PIN_13 _BV(6)
|
||||
|
||||
#else //Atmega8/ Atmegax8
|
||||
#define PORTMSK_AT_PIN_0 _BV(0) /* 0 port D */
|
||||
#define PORTMSK_AT_PIN_1 _BV(1)
|
||||
#define PORTMSK_AT_PIN_2 _BV(2)
|
||||
#define PORTMSK_AT_PIN_3 _BV(3)
|
||||
#define PORTMSK_AT_PIN_4 _BV(4)
|
||||
#define PORTMSK_AT_PIN_5 _BV(5)
|
||||
#define PORTMSK_AT_PIN_6 _BV(6)
|
||||
#define PORTMSK_AT_PIN_7 _BV(7)
|
||||
#define PORTMSK_AT_PIN_8 _BV(0) /* 8 port B */
|
||||
#define PORTMSK_AT_PIN_9 _BV(1)
|
||||
#define PORTMSK_AT_PIN_10 _BV(2)
|
||||
#define PORTMSK_AT_PIN_11 _BV(3)
|
||||
#define PORTMSK_AT_PIN_12 _BV(4)
|
||||
#define PORTMSK_AT_PIN_13 _BV(5)
|
||||
#define PORTMSK_AT_PIN_14 _BV(0) /* 14 port C */
|
||||
#define PORTMSK_AT_PIN_15 _BV(1)
|
||||
#define PORTMSK_AT_PIN_16 _BV(2)
|
||||
#define PORTMSK_AT_PIN_17 _BV(3)
|
||||
#define PORTMSK_AT_PIN_18 _BV(4)
|
||||
#define PORTMSK_AT_PIN_19 _BV(5)
|
||||
|
||||
#define PORTMSK_AT_PIN_20 _BV(6)
|
||||
#define PORTMSK_AT_PIN_21 _BV(7)
|
||||
#endif
|
||||
////////////PORT to DDRX mapping
|
||||
#define DIR_REG_AT_PortA DDRA
|
||||
|
||||
#define DIR_REG_AT_PortB DDRB
|
||||
|
||||
#if defined(__AVR_ATtiny2313__)
|
||||
//no PortC on tiny2313
|
||||
#else
|
||||
#define DIR_REG_AT_PortC DDRC
|
||||
#endif
|
||||
|
||||
#define DIR_REG_AT_PortD DDRD
|
||||
|
||||
////////////PORT to PORTX mapping
|
||||
#define OUTPUT_REG_AT_PortA PORTA
|
||||
#define OUTPUT_REG_AT_PortB PORTB
|
||||
|
||||
#if defined(__AVR_ATtiny2313__)
|
||||
//no PortC on tiny2313
|
||||
#else
|
||||
#define OUTPUT_REG_AT_PortC PORTC
|
||||
#endif
|
||||
|
||||
#define OUTPUT_REG_AT_PortD PORTD
|
||||
|
||||
////////////PORT to PINX(input regs) mapping
|
||||
#define INPUT_REG_AT_PortA PINA
|
||||
|
||||
#define INPUT_REG_AT_PortB PINB
|
||||
|
||||
#if defined(__AVR_ATtiny2313__)
|
||||
//no PortC on tiny2313
|
||||
#else
|
||||
#define INPUT_REG_AT_PortC PINC
|
||||
#endif
|
||||
|
||||
#define INPUT_REG_AT_PortD PIND
|
||||
|
||||
|
||||
#if defined(__AVR_ATtiny2313__)
|
||||
|
||||
#define TIMER_AT_PIN_5 0B
|
||||
#define TCCR_AT_PIN_5 TCCR0A
|
||||
|
||||
#define TIMER_AT_PIN_9 0A
|
||||
#define TCCR_AT_PIN_9 TCCR0A
|
||||
|
||||
#define TIMER_AT_PIN_10 1A
|
||||
#define TCCR_AT_PIN_10 TCCR1A
|
||||
|
||||
#define TIMER_AT_PIN_11 1B
|
||||
#define TCCR_AT_PIN_11 TCCR1A
|
||||
|
||||
#elif defined(__AVR_ATtiny26__)
|
||||
/*
|
||||
#define TIMER_AT_PIN_0 1A
|
||||
#define TCCR_AT_PIN_0 TCCR1A
|
||||
*/
|
||||
#define TIMER_AT_PIN_1 1A
|
||||
#define TCCR_AT_PIN_1 TCCR1A
|
||||
/*
|
||||
#define TIMER_AT_PIN_2 1B
|
||||
#define TCCR_AT_PIN_2 TCCR1A
|
||||
*/
|
||||
#define TIMER_AT_PIN_3 1B
|
||||
#define TCCR_AT_PIN_3 TCCR1A
|
||||
|
||||
#else
|
||||
|
||||
#if !defined(__AVR_ATmega8__) //for Atmega48/88/168/328
|
||||
#define TIMER_AT_PIN_3 2B
|
||||
#define TCCR_AT_PIN_3 TCCR2A
|
||||
|
||||
#define TIMER_AT_PIN_5 0B
|
||||
#define TCCR_AT_PIN_5 TCCR0A
|
||||
|
||||
#define TIMER_AT_PIN_6 0A
|
||||
#define TCCR_AT_PIN_6 TCCR0A
|
||||
#endif
|
||||
|
||||
#define TIMER_AT_PIN_9 1A
|
||||
#define TCCR_AT_PIN_9 TCCR1A
|
||||
|
||||
#define TIMER_AT_PIN_10 1B
|
||||
#define TCCR_AT_PIN_10 TCCR1A
|
||||
|
||||
#if defined(__AVR_ATmega8__)
|
||||
#define TIMER_AT_PIN_11 2
|
||||
#define TCCR_AT_PIN_11 TCCR2
|
||||
#else //for Atmega48/88/168/328
|
||||
#define TIMER_AT_PIN_11 2A
|
||||
#define TCCR_AT_PIN_11 TCCR2A
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#define MERGE_TO_FUNC(prefix, id) prefix##_##id
|
||||
#define EXPAND_WRAPPER( NEXTLEVEL, ...) NEXTLEVEL( __VA_ARGS__ )
|
||||
|
||||
|
||||
|
||||
#define _PWM_SET(id, val) \
|
||||
do{ \
|
||||
OCR##id = val; \
|
||||
} \
|
||||
while(0)
|
||||
|
||||
#define _PWM_ENABLE(TCCR, id) sbi(TCCR, COM##id##1)
|
||||
#define _PWM_DISABLE(TCCR, id) cbi(TCCR, COM##id##1)
|
||||
|
||||
#define _SET_OUTPUT(port_id, msk) PORTID_TO_DIR_REG(port_id) |= (msk)
|
||||
#define _SET_INTPUT(port_id, msk) PORTID_TO_DIR_REG(port_id) &= ~(msk)
|
||||
|
||||
#define _D_WRITE_HIGH(port_id, msk) PORTID_TO_OUTPUT_REG(port_id) |= (msk)
|
||||
#define _D_WRITE_LOW(port_id, msk) PORTID_TO_OUTPUT_REG(port_id) &= ~(msk)
|
||||
|
||||
#define _D_READ_RAW(port_id, msk) ((PORTID_TO_INPUT_REG(port_id)) & (msk))
|
||||
#define _D_READ(port_id, msk) (((PORTID_TO_INPUT_REG(port_id)) & (msk)) != 0 ? 1 : 0)
|
||||
|
||||
#define _D_TOGGLE(port_id, msk) PORTID_TO_OUTPUT_REG(port_id) ^= (msk)
|
||||
/*
|
||||
*
|
||||
* NOTICE: for pins at timer0A/0B,
|
||||
* if the duty cycle to be set equals to zero, using the following code:
|
||||
* DIGITAL_WRITE(pin, LOW);
|
||||
* -- or --
|
||||
* digitalWrite(pin, LOW);
|
||||
* The caller should make sure the current pin has been set to OUTPUT mode first
|
||||
*/
|
||||
|
||||
#define SET_1(pin) SET_OUTPUT(pin)
|
||||
#define SET_0(pin) SET_INPUT(pin)
|
||||
|
||||
#define SET_0x1(pin) SET_OUTPUT(pin)
|
||||
#define SET_0x0(pin) SET_INPUT(pin)
|
||||
|
||||
#define D_WRITE_HIGH(pin) EXPAND_WRAPPER(_D_WRITE_HIGH, ARDUINOPIN_TO_PORTID(pin), ARDUINOPIN_TO_PORTMSK(pin) )
|
||||
#define D_WRITE_LOW(pin) EXPAND_WRAPPER(_D_WRITE_LOW, ARDUINOPIN_TO_PORTID(pin), ARDUINOPIN_TO_PORTMSK(pin) )
|
||||
|
||||
#define D_WRITE_1(pin) D_WRITE_HIGH(pin)
|
||||
#define D_WRITE_0(pin) D_WRITE_LOW(pin)
|
||||
|
||||
#define D_WRITE_0x1(pin) D_WRITE_HIGH(pin)
|
||||
#define D_WRITE_0x0(pin) D_WRITE_LOW(pin)
|
||||
|
||||
#define D_WRITE_ENABLE(pin) D_WRITE_HIGH(pin)
|
||||
#define D_WRITE_DISABLE(pin) D_WRITE_LOW(pin)
|
||||
|
||||
#define SET_OUTPUT(pin) EXPAND_WRAPPER(_SET_OUTPUT, ARDUINOPIN_TO_PORTID(pin), ARDUINOPIN_TO_PORTMSK(pin) )
|
||||
#define SET_INPUT(pin) EXPAND_WRAPPER(_SET_INTPUT, ARDUINOPIN_TO_PORTID(pin), ARDUINOPIN_TO_PORTMSK(pin) )
|
||||
|
||||
#define pin_mode(pin, mode) SET_##mode(pin)
|
||||
#define pin_pullup(pin, val) D_WRITE_##val(pin)
|
||||
#define pin_toggle(pin) EXPAND_WRAPPER(_D_TOGGLE, ARDUINOPIN_TO_PORTID(pin), ARDUINOPIN_TO_PORTMSK(pin) )
|
||||
|
||||
|
||||
#endif /* PINS_H */
|
||||
|
|
@ -1,12 +0,0 @@
|
|||
int uart_putchar(char c, FILE *stream);
|
||||
int uart_getchar(FILE *stream);
|
||||
|
||||
void uart_init(void);
|
||||
|
||||
struct rx_ring;
|
||||
struct tx_ring;
|
||||
|
||||
/* http://www.ermicro.com/blog/?p=325 */
|
||||
|
||||
FILE uart_output = FDEV_SETUP_STREAM(uart_putchar, NULL, _FDEV_SETUP_WRITE);
|
||||
FILE uart_input = FDEV_SETUP_STREAM(NULL, uart_getchar, _FDEV_SETUP_READ);
|
||||
|
|
@ -1,102 +0,0 @@
|
|||
/* Based on Atmel Application Note AVR 306 */
|
||||
|
||||
#include <avr/io.h>
|
||||
#include <avr/interrupt.h>
|
||||
#include <stdio.h>
|
||||
|
||||
#ifndef BAUD
|
||||
#define BAUD 9600
|
||||
#endif
|
||||
#include <util/setbaud.h>
|
||||
|
||||
#ifndef UART_RX_BUFFER_SIZE
|
||||
#define UART_RX_BUFFER_SIZE 32
|
||||
#endif
|
||||
|
||||
#ifndef UART_TX_BUFFER_SIZE
|
||||
#define UART_TX_BUFFER_SIZE 256
|
||||
#endif
|
||||
|
||||
struct tx_ring {
|
||||
int buffer[UART_TX_BUFFER_SIZE];
|
||||
int start;
|
||||
int end;
|
||||
};
|
||||
|
||||
struct rx_ring {
|
||||
int buffer[UART_RX_BUFFER_SIZE];
|
||||
int start;
|
||||
int end;
|
||||
};
|
||||
|
||||
static struct tx_ring tx_buffer;
|
||||
static struct rx_ring rx_buffer;
|
||||
|
||||
/* http://www.cs.mun.ca/~rod/Winter2007/4723/notes/serial/serial.html */
|
||||
|
||||
void uart_init(void) {
|
||||
|
||||
tx_buffer.start = 0;
|
||||
tx_buffer.end = 0;
|
||||
|
||||
rx_buffer.start = 0;
|
||||
rx_buffer.end = 0;
|
||||
|
||||
UBRR0H = UBRRH_VALUE;
|
||||
UBRR0L = UBRRL_VALUE;
|
||||
|
||||
UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); /* 8-bit data */
|
||||
UCSR0B = _BV(RXEN0) | _BV(TXEN0); /* Enable RX and TX */
|
||||
|
||||
sei();
|
||||
}
|
||||
|
||||
int uart_putchar(char c, FILE *stream) {
|
||||
if (c == '\n') {
|
||||
uart_putchar('\r', stream);
|
||||
}
|
||||
|
||||
int write_pointer = (tx_buffer.end + 1) % UART_TX_BUFFER_SIZE;
|
||||
|
||||
if (write_pointer != tx_buffer.start){
|
||||
tx_buffer.buffer[tx_buffer.end] = c;
|
||||
tx_buffer.end = write_pointer;
|
||||
|
||||
/* Data available. Enable the transmit interrupt for serial port 0. */
|
||||
UCSR0B |= _BV(UDRIE0);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int uart_getchar(FILE *stream) {
|
||||
int read_pointer = (rx_buffer.start + 1) % UART_RX_BUFFER_SIZE;
|
||||
|
||||
rx_buffer.start = read_pointer;
|
||||
return rx_buffer.buffer[read_pointer];
|
||||
}
|
||||
|
||||
ISR(USART_RX_vect) {
|
||||
int write_pointer = (rx_buffer.end + 1) % UART_RX_BUFFER_SIZE;
|
||||
|
||||
/* Add next byte to ringbuffer if it has space available. */
|
||||
if (write_pointer != rx_buffer.start){
|
||||
rx_buffer.buffer[rx_buffer.end] = UDR0;
|
||||
rx_buffer.end = write_pointer;
|
||||
}
|
||||
}
|
||||
|
||||
ISR(USART_UDRE_vect){
|
||||
int read_pointer = (tx_buffer.start + 1) % UART_TX_BUFFER_SIZE;
|
||||
|
||||
/* Transmit next byte if data available in ringbuffer. */
|
||||
if (read_pointer != tx_buffer.end) {
|
||||
UDR0 = tx_buffer.buffer[read_pointer];
|
||||
tx_buffer.start = read_pointer;
|
||||
} else {
|
||||
/* Nothing to send. Disable the transmit interrupt for serial port 0. */
|
||||
UCSR0B &= ~_BV(UDRIE0);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -35,7 +35,8 @@
|
|||
|
||||
|
||||
# MCU name
|
||||
MCU = atmega328p
|
||||
#MCU = atmega328p
|
||||
MCU = atmega32u4
|
||||
|
||||
# Processor frequency.
|
||||
# This will define a symbol, F_CPU, in all source code files equal to the
|
||||
|
|
@ -51,7 +52,7 @@ FORMAT = ihex
|
|||
TARGET = main
|
||||
|
||||
# List C source files here. (C dependencies are automatically generated.)
|
||||
SRC = $(TARGET).c uart_async.c spi.c
|
||||
SRC = $(TARGET).c uart/uart.c spi/spi.c
|
||||
|
||||
# List Assembler source files here.
|
||||
# Make them always end in a capital .S. Files ending in a lowercase .s
|
||||
|
|
@ -192,7 +193,8 @@ LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
|
|||
# Type: avrdude -c ?
|
||||
# to get a full listing.
|
||||
#
|
||||
AVRDUDE_PROGRAMMER = arduino
|
||||
#AVRDUDE_PROGRAMMER = arduino
|
||||
AVRDUDE_PROGRAMMER = avr109
|
||||
|
||||
# com1 = serial port. Use lpt1 to connect to parallel port.
|
||||
AVRDUDE_PORT = /dev/tty.usb* # programmer connected to serial device
|
||||
|
|
|
|||
|
|
@ -32,25 +32,20 @@
|
|||
*
|
||||
*/
|
||||
|
||||
#define UART_RX_BUFFER_SIZE 128
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <stdio.h>
|
||||
#include <util/delay.h>
|
||||
//#include <avr/io.h>
|
||||
|
||||
#include "main.h"
|
||||
#include "uart.h"
|
||||
#include "pins.h"
|
||||
#include "digital.h"
|
||||
#include "spi.h"
|
||||
#include "uart/uart.h"
|
||||
#include "pins/digital.h"
|
||||
#include "spi/spi.h"
|
||||
|
||||
static void init(void) {
|
||||
}
|
||||
|
||||
/* Assumes MSB first. */
|
||||
void shift_out(uint8_t data) {
|
||||
spi_transfer(data);
|
||||
}
|
||||
|
||||
int main(void) {
|
||||
|
||||
init();
|
||||
|
|
@ -62,11 +57,11 @@ int main(void) {
|
|||
char binary[17];
|
||||
|
||||
/* Show pattern for 5 seconds. */
|
||||
shift_out(0b10101010);
|
||||
shift_out(0b11110000);
|
||||
spi_transfer(0b10101010);
|
||||
spi_transfer(0b11110000);
|
||||
digital_write(SPI_SS, LOW);
|
||||
digital_write(SPI_SS, HIGH);
|
||||
_delay_ms(5000);
|
||||
_delay_ms(5000);
|
||||
|
||||
while (1) {
|
||||
for(uint16_t i = 0; i < 0xffff; i++) {
|
||||
|
|
@ -76,8 +71,8 @@ int main(void) {
|
|||
printf("%s %d \n", binary, i);
|
||||
|
||||
/* Shift high byte first to shift register. */
|
||||
shift_out(i >> 8);
|
||||
shift_out(i & 0xff);
|
||||
spi_transfer(i >> 8);
|
||||
spi_transfer(i & 0xff);
|
||||
|
||||
/* Pulse latch to transfer data from shift registers */
|
||||
/* to storage registers. */
|
||||
|
|
@ -85,8 +80,6 @@ int main(void) {
|
|||
//digital_write(LATCH, HIGH);
|
||||
digital_write(SPI_SS, LOW);
|
||||
digital_write(SPI_SS, HIGH);
|
||||
|
||||
_delay_ms(50);
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -22,52 +22,51 @@
|
|||
#define ARDUINO_H
|
||||
|
||||
/* atmega328 */
|
||||
#define PORT_AT_PIN_0 PortD
|
||||
#define PORT_AT_PIN_1 PortD
|
||||
#define PORT_AT_PIN_2 PortD
|
||||
#define PORT_AT_PIN_3 PortD
|
||||
#define PORT_AT_PIN_4 PortD
|
||||
#define PORT_AT_PIN_5 PortD
|
||||
#define PORT_AT_PIN_6 PortD
|
||||
#define PORT_AT_PIN_7 PortD
|
||||
#define PORT_AT_PIN_8 PortB
|
||||
#define PORT_AT_PIN_9 PortB
|
||||
#define PORT_AT_PIN_10 PortB
|
||||
#define PORT_AT_PIN_11 PortB
|
||||
#define PORT_AT_PIN_12 PortB
|
||||
#define PORT_AT_PIN_13 PortB
|
||||
#define PORT_AT_PIN_14 PortC
|
||||
#define PORT_AT_PIN_15 PortC
|
||||
#define PORT_AT_PIN_16 PortC
|
||||
#define PORT_AT_PIN_17 PortC
|
||||
#define PORT_AT_PIN_18 PortC
|
||||
#define PORT_AT_PIN_19 PortC
|
||||
#define PORT_AT_PIN_0 PortD
|
||||
#define PORT_AT_PIN_1 PortD
|
||||
#define PORT_AT_PIN_2 PortD
|
||||
#define PORT_AT_PIN_3 PortD
|
||||
#define PORT_AT_PIN_4 PortD
|
||||
#define PORT_AT_PIN_5 PortD
|
||||
#define PORT_AT_PIN_6 PortD
|
||||
#define PORT_AT_PIN_7 PortD
|
||||
#define PORT_AT_PIN_8 PortB
|
||||
#define PORT_AT_PIN_9 PortB
|
||||
#define PORT_AT_PIN_10 PortB
|
||||
#define PORT_AT_PIN_11 PortB
|
||||
#define PORT_AT_PIN_12 PortB
|
||||
#define PORT_AT_PIN_13 PortB
|
||||
#define PORT_AT_PIN_14 PortC
|
||||
#define PORT_AT_PIN_15 PortC
|
||||
#define PORT_AT_PIN_16 PortC
|
||||
#define PORT_AT_PIN_17 PortC
|
||||
#define PORT_AT_PIN_18 PortC
|
||||
#define PORT_AT_PIN_19 PortC
|
||||
|
||||
#define PORT_AT_PIN_20 PortB
|
||||
#define PORT_AT_PIN_21 PortB
|
||||
#define PORT_AT_PIN_20 PortB
|
||||
#define PORT_AT_PIN_21 PortB
|
||||
|
||||
#define MASK_AT_PIN_0 _BV(0)
|
||||
#define MASK_AT_PIN_1 _BV(1)
|
||||
#define MASK_AT_PIN_2 _BV(2)
|
||||
#define MASK_AT_PIN_3 _BV(3)
|
||||
#define MASK_AT_PIN_4 _BV(4)
|
||||
#define MASK_AT_PIN_5 _BV(5)
|
||||
#define MASK_AT_PIN_6 _BV(6)
|
||||
#define MASK_AT_PIN_7 _BV(7)
|
||||
#define MASK_AT_PIN_8 _BV(0)
|
||||
#define MASK_AT_PIN_9 _BV(1)
|
||||
#define MASK_AT_PIN_10 _BV(2)
|
||||
#define MASK_AT_PIN_11 _BV(3)
|
||||
#define MASK_AT_PIN_12 _BV(4)
|
||||
#define MASK_AT_PIN_13 _BV(5)
|
||||
#define MASK_AT_PIN_14 _BV(0)
|
||||
#define MASK_AT_PIN_15 _BV(1)
|
||||
#define MASK_AT_PIN_16 _BV(2)
|
||||
#define MASK_AT_PIN_17 _BV(3)
|
||||
#define MASK_AT_PIN_18 _BV(4)
|
||||
#define MASK_AT_PIN_19 _BV(5)
|
||||
|
||||
#define MASK_AT_PIN_20 _BV(6)
|
||||
#define MASK_AT_PIN_21 _BV(7)
|
||||
#define MASK_AT_PIN_0 _BV(0)
|
||||
#define MASK_AT_PIN_1 _BV(1)
|
||||
#define MASK_AT_PIN_2 _BV(2)
|
||||
#define MASK_AT_PIN_3 _BV(3)
|
||||
#define MASK_AT_PIN_4 _BV(4)
|
||||
#define MASK_AT_PIN_5 _BV(5)
|
||||
#define MASK_AT_PIN_6 _BV(6)
|
||||
#define MASK_AT_PIN_7 _BV(7)
|
||||
#define MASK_AT_PIN_8 _BV(0)
|
||||
#define MASK_AT_PIN_9 _BV(1)
|
||||
#define MASK_AT_PIN_10 _BV(2)
|
||||
#define MASK_AT_PIN_11 _BV(3)
|
||||
#define MASK_AT_PIN_12 _BV(4)
|
||||
#define MASK_AT_PIN_13 _BV(5)
|
||||
#define MASK_AT_PIN_14 _BV(0)
|
||||
#define MASK_AT_PIN_15 _BV(1)
|
||||
#define MASK_AT_PIN_16 _BV(2)
|
||||
#define MASK_AT_PIN_17 _BV(3)
|
||||
#define MASK_AT_PIN_18 _BV(4)
|
||||
#define MASK_AT_PIN_19 _BV(5)
|
||||
#define MASK_AT_PIN_20 _BV(6)
|
||||
#define MASK_AT_PIN_21 _BV(7)
|
||||
|
||||
#endif /* ARDUINO_H */
|
||||
|
|
|
|||
|
|
@ -28,6 +28,6 @@
|
|||
#define digital_read(pin) EXPAND_WRAPPER(_DIGITAL_READ, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
|
||||
#define digital_read_raw(pin) EXPAND_WRAPPER(_DIGITAL_READ_RAW, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
|
||||
#define digital_write(pin, val) DIGITAL_WRITE_##val(pin)
|
||||
#define digital_toggle(pin) EXPAND_WRAPPER(_DIGITAL_TOGGLE, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
|
||||
#define digital_toggle(pin) EXPAND_WRAPPER(_DIGITAL_TOGGLE, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
|
||||
|
||||
#endif /* DIGITAL_H */
|
||||
|
|
@ -30,12 +30,12 @@
|
|||
#include "arduino.h"
|
||||
|
||||
#define HIGH 0x1
|
||||
#define LOW 0x0
|
||||
#define LOW 0x0
|
||||
|
||||
#define INPUT 0x0
|
||||
#define INPUT 0x0
|
||||
#define OUTPUT 0x1
|
||||
|
||||
#define ENABLE 0x1
|
||||
#define ENABLE 0x1
|
||||
#define DISABLE 0x0
|
||||
|
||||
#define PIN_TO_PORT(x) PORT_AT_PIN_##x
|
||||
|
|
@ -47,8 +47,8 @@
|
|||
|
||||
#ifdef PORTA
|
||||
#define DIRECTION_REGISTER_AT_PortA DDRA
|
||||
#define OUTPUT_REGISTER_AT_PortA PORTA
|
||||
#define INPUT_REGISTER_AT_PortA PINA
|
||||
#define OUTPUT_REGISTER_AT_PortA PORTA
|
||||
#define INPUT_REGISTER_AT_PortA PINA
|
||||
|
||||
#define PORT_AT_PIN_A0 PortA
|
||||
#define PORT_AT_PIN_A1 PortA
|
||||
|
|
@ -69,155 +69,160 @@
|
|||
#define MASK_AT_PIN_A7 _BV(7)
|
||||
#endif
|
||||
|
||||
//#ifdef PORTB
|
||||
#ifdef PORTB
|
||||
#define DIRECTION_REGISTER_AT_PortB DDRB
|
||||
#define OUTPUT_REGISTER_AT_PortB PORTB
|
||||
#define INPUT_REGISTER_AT_PortB PINB
|
||||
#define OUTPUT_REGISTER_AT_PortB PORTB
|
||||
#define INPUT_REGISTER_AT_PortB PINB
|
||||
|
||||
#define PORT_AT_PIN_B0 PortB
|
||||
#define PORT_AT_PIN_B1 PortB
|
||||
#define PORT_AT_PIN_B2 PortB
|
||||
#define PORT_AT_PIN_B3 PortB
|
||||
#define PORT_AT_PIN_B4 PortB
|
||||
#define PORT_AT_PIN_B5 PortB
|
||||
#define PORT_AT_PIN_B6 PortB
|
||||
#define PORT_AT_PIN_B7 PortB
|
||||
#define PORT_AT_PIN_B0 PortB
|
||||
#define PORT_AT_PIN_B1 PortB
|
||||
#define PORT_AT_PIN_B2 PortB
|
||||
#define PORT_AT_PIN_B3 PortB
|
||||
#define PORT_AT_PIN_B4 PortB
|
||||
#define PORT_AT_PIN_B5 PortB
|
||||
#define PORT_AT_PIN_B6 PortB
|
||||
#define PORT_AT_PIN_B7 PortB
|
||||
|
||||
#define MASK_AT_PIN_B0 _BV(0)
|
||||
#define MASK_AT_PIN_B1 _BV(1)
|
||||
#define MASK_AT_PIN_B2 _BV(2)
|
||||
#define MASK_AT_PIN_B3 _BV(3)
|
||||
#define MASK_AT_PIN_B4 _BV(4)
|
||||
#define MASK_AT_PIN_B5 _BV(5)
|
||||
#define MASK_AT_PIN_B6 _BV(6)
|
||||
#define MASK_AT_PIN_B7 _BV(7)
|
||||
//#endif
|
||||
#define MASK_AT_PIN_B0 _BV(0)
|
||||
#define MASK_AT_PIN_B1 _BV(1)
|
||||
#define MASK_AT_PIN_B2 _BV(2)
|
||||
#define MASK_AT_PIN_B3 _BV(3)
|
||||
#define MASK_AT_PIN_B4 _BV(4)
|
||||
#define MASK_AT_PIN_B5 _BV(5)
|
||||
#define MASK_AT_PIN_B6 _BV(6)
|
||||
#define MASK_AT_PIN_B7 _BV(7)
|
||||
#endif
|
||||
|
||||
#ifdef PORTC
|
||||
#define DIRECTION_REGISTER_AT_PortC DDRC
|
||||
#define OUTPUT_REGISTER_AT_PortC PORTC
|
||||
#define INPUT_REGISTER_AT_PortC PINC
|
||||
#define PORT_AT_PIN_C0 PortC
|
||||
#define PORT_AT_PIN_C1 PortC
|
||||
#define PORT_AT_PIN_C2 PortC
|
||||
#define PORT_AT_PIN_C3 PortC
|
||||
#define PORT_AT_PIN_C4 PortC
|
||||
#define PORT_AT_PIN_C5 PortC
|
||||
#define PORT_AT_PIN_C6 PortC
|
||||
#define PORT_AT_PIN_C7 PortC
|
||||
#define DIRECTION_REGISTER_AT_PortC DDRC
|
||||
#define OUTPUT_REGISTER_AT_PortC PORTC
|
||||
#define INPUT_REGISTER_AT_PortC PINC
|
||||
|
||||
#define MASK_AT_PIN_C0 _BV(0)
|
||||
#define MASK_AT_PIN_C1 _BV(1)
|
||||
#define MASK_AT_PIN_C2 _BV(2)
|
||||
#define MASK_AT_PIN_C3 _BV(3)
|
||||
#define MASK_AT_PIN_C4 _BV(4)
|
||||
#define MASK_AT_PIN_C5 _BV(5)
|
||||
#define MASK_AT_PIN_C6 _BV(6)
|
||||
#define MASK_AT_PIN_C7 _BV(7)
|
||||
#define PORT_AT_PIN_C0 PortC
|
||||
#define PORT_AT_PIN_C1 PortC
|
||||
#define PORT_AT_PIN_C2 PortC
|
||||
#define PORT_AT_PIN_C3 PortC
|
||||
#define PORT_AT_PIN_C4 PortC
|
||||
#define PORT_AT_PIN_C5 PortC
|
||||
#define PORT_AT_PIN_C6 PortC
|
||||
#define PORT_AT_PIN_C7 PortC
|
||||
|
||||
#define MASK_AT_PIN_C0 _BV(0)
|
||||
#define MASK_AT_PIN_C1 _BV(1)
|
||||
#define MASK_AT_PIN_C2 _BV(2)
|
||||
#define MASK_AT_PIN_C3 _BV(3)
|
||||
#define MASK_AT_PIN_C4 _BV(4)
|
||||
#define MASK_AT_PIN_C5 _BV(5)
|
||||
#define MASK_AT_PIN_C6 _BV(6)
|
||||
#define MASK_AT_PIN_C7 _BV(7)
|
||||
#endif
|
||||
|
||||
#ifdef PORTD
|
||||
#define DIRECTION_REGISTER_AT_PortD DDRD
|
||||
#define OUTPUT_REGISTER_AT_PortD PORTD
|
||||
#define INPUT_REGISTER_AT_PortD PIND
|
||||
#define PORT_AT_PIN_D0 PortD
|
||||
#define PORT_AT_PIN_D1 PortD
|
||||
#define PORT_AT_PIN_D2 PortD
|
||||
#define PORT_AT_PIN_D3 PortD
|
||||
#define PORT_AT_PIN_D4 PortD
|
||||
#define PORT_AT_PIN_D5 PortD
|
||||
#define PORT_AT_PIN_D6 PortD
|
||||
#define PORT_AT_PIN_D7 PortD
|
||||
#define MASK_AT_PIN_D0 _BV(0)
|
||||
#define MASK_AT_PIN_D1 _BV(1)
|
||||
#define MASK_AT_PIN_D2 _BV(2)
|
||||
#define MASK_AT_PIN_D3 _BV(3)
|
||||
#define MASK_AT_PIN_D4 _BV(4)
|
||||
#define MASK_AT_PIN_D5 _BV(5)
|
||||
#define MASK_AT_PIN_D6 _BV(6)
|
||||
#define MASK_AT_PIN_D7 _BV(7)
|
||||
#define DIRECTION_REGISTER_AT_PortD DDRD
|
||||
#define OUTPUT_REGISTER_AT_PortD PORTD
|
||||
#define INPUT_REGISTER_AT_PortD PIND
|
||||
#define PORT_AT_PIN_D0 PortD
|
||||
#define PORT_AT_PIN_D1 PortD
|
||||
#define PORT_AT_PIN_D2 PortD
|
||||
#define PORT_AT_PIN_D3 PortD
|
||||
#define PORT_AT_PIN_D4 PortD
|
||||
#define PORT_AT_PIN_D5 PortD
|
||||
#define PORT_AT_PIN_D6 PortD
|
||||
#define PORT_AT_PIN_D7 PortD
|
||||
#define MASK_AT_PIN_D0 _BV(0)
|
||||
#define MASK_AT_PIN_D1 _BV(1)
|
||||
#define MASK_AT_PIN_D2 _BV(2)
|
||||
#define MASK_AT_PIN_D3 _BV(3)
|
||||
#define MASK_AT_PIN_D4 _BV(4)
|
||||
#define MASK_AT_PIN_D5 _BV(5)
|
||||
#define MASK_AT_PIN_D6 _BV(6)
|
||||
#define MASK_AT_PIN_D7 _BV(7)
|
||||
#endif
|
||||
|
||||
#ifdef PORTE
|
||||
#define DIRECTION_REGISTER_AT_PortE DDRE
|
||||
#define OUTPUT_REGISTER_AT_PortE PORTE
|
||||
#define INPUT_REGISTER_AT_PortE PINE
|
||||
#define PORT_AT_PIN_E0 PortE
|
||||
#define PORT_AT_PIN_E1 PortE
|
||||
#define PORT_AT_PIN_E2 PortE
|
||||
#define PORT_AT_PIN_E3 PortE
|
||||
#define PORT_AT_PIN_E4 PortE
|
||||
#define PORT_AT_PIN_E5 PortE
|
||||
#define PORT_AT_PIN_E6 PortE
|
||||
#define PORT_AT_PIN_E7 PortE
|
||||
#define MASK_AT_PIN_E0 _BV(0)
|
||||
#define MASK_AT_PIN_E1 _BV(1)
|
||||
#define MASK_AT_PIN_E2 _BV(2)
|
||||
#define MASK_AT_PIN_E3 _BV(3)
|
||||
#define MASK_AT_PIN_E4 _BV(4)
|
||||
#define MASK_AT_PIN_E5 _BV(5)
|
||||
#define MASK_AT_PIN_E6 _BV(6)
|
||||
#define MASK_AT_PIN_E7 _BV(7)
|
||||
#define DIRECTION_REGISTER_AT_PortE DDRE
|
||||
#define OUTPUT_REGISTER_AT_PortE PORTE
|
||||
#define INPUT_REGISTER_AT_PortE PINE
|
||||
|
||||
#define PORT_AT_PIN_E0 PortE
|
||||
#define PORT_AT_PIN_E1 PortE
|
||||
#define PORT_AT_PIN_E2 PortE
|
||||
#define PORT_AT_PIN_E3 PortE
|
||||
#define PORT_AT_PIN_E4 PortE
|
||||
#define PORT_AT_PIN_E5 PortE
|
||||
#define PORT_AT_PIN_E6 PortE
|
||||
#define PORT_AT_PIN_E7 PortE
|
||||
|
||||
#define MASK_AT_PIN_E0 _BV(0)
|
||||
#define MASK_AT_PIN_E1 _BV(1)
|
||||
#define MASK_AT_PIN_E2 _BV(2)
|
||||
#define MASK_AT_PIN_E3 _BV(3)
|
||||
#define MASK_AT_PIN_E4 _BV(4)
|
||||
#define MASK_AT_PIN_E5 _BV(5)
|
||||
#define MASK_AT_PIN_E6 _BV(6)
|
||||
#define MASK_AT_PIN_E7 _BV(7)
|
||||
#endif
|
||||
|
||||
#ifdef PORTF
|
||||
#define DIRECTION_REGISTER_AT_PortF DDRF
|
||||
#define OUTPUT_REGISTER_AT_PortF PORTF
|
||||
#define INPUT_REGISTER_AT_PortF PINF
|
||||
#define PORT_AT_PIN_F0 PortF
|
||||
#define PORT_AT_PIN_F1 PortF
|
||||
#define PORT_AT_PIN_F2 PortF
|
||||
#define PORT_AT_PIN_F3 PortF
|
||||
#define PORT_AT_PIN_F4 PortF
|
||||
#define PORT_AT_PIN_F5 PortF
|
||||
#define PORT_AT_PIN_F6 PortF
|
||||
#define PORT_AT_PIN_F7 PortF
|
||||
#define MASK_AT_PIN_F0 _BV(0)
|
||||
#define MASK_AT_PIN_F1 _BV(1)
|
||||
#define MASK_AT_PIN_F2 _BV(2)
|
||||
#define MASK_AT_PIN_F3 _BV(3)
|
||||
#define MASK_AT_PIN_F4 _BV(4)
|
||||
#define MASK_AT_PIN_F5 _BV(5)
|
||||
#define MASK_AT_PIN_F6 _BV(6)
|
||||
#define MASK_AT_PIN_F7 _BV(7)
|
||||
#define DIRECTION_REGISTER_AT_PortF DDRF
|
||||
#define OUTPUT_REGISTER_AT_PortF PORTF
|
||||
#define INPUT_REGISTER_AT_PortF PINF
|
||||
|
||||
#define PORT_AT_PIN_F0 PortF
|
||||
#define PORT_AT_PIN_F1 PortF
|
||||
#define PORT_AT_PIN_F2 PortF
|
||||
#define PORT_AT_PIN_F3 PortF
|
||||
#define PORT_AT_PIN_F4 PortF
|
||||
#define PORT_AT_PIN_F5 PortF
|
||||
#define PORT_AT_PIN_F6 PortF
|
||||
#define PORT_AT_PIN_F7 PortF
|
||||
|
||||
#define MASK_AT_PIN_F0 _BV(0)
|
||||
#define MASK_AT_PIN_F1 _BV(1)
|
||||
#define MASK_AT_PIN_F2 _BV(2)
|
||||
#define MASK_AT_PIN_F3 _BV(3)
|
||||
#define MASK_AT_PIN_F4 _BV(4)
|
||||
#define MASK_AT_PIN_F5 _BV(5)
|
||||
#define MASK_AT_PIN_F6 _BV(6)
|
||||
#define MASK_AT_PIN_F7 _BV(7)
|
||||
#endif
|
||||
|
||||
#define MERGE_TO_FUNC(prefix, id) prefix##_##id
|
||||
#define EXPAND_WRAPPER(NEXTLEVEL, ...) NEXTLEVEL(__VA_ARGS__)
|
||||
|
||||
#define _SET_OUTPUT(port_id, msk) PORT_TO_DIRECTION_REGISTER(port_id) |= (msk)
|
||||
#define _SET_OUTPUT(port_id, msk) PORT_TO_DIRECTION_REGISTER(port_id) |= (msk)
|
||||
#define _SET_INPUT(port_id, msk) PORT_TO_DIRECTION_REGISTER(port_id) &= ~(msk)
|
||||
|
||||
#define _DIGITAL_WRITE_HIGH(port_id, msk) PORT_TO_OUTPUT_REGISTER(port_id) |= (msk)
|
||||
#define _DIGITAL_WRITE_LOW(port_id, msk) PORT_TO_OUTPUT_REGISTER(port_id) &= ~(msk)
|
||||
|
||||
#define _DIGITAL_READ_RAW(port_id, msk) ((PORT_TO_INPUT_REGISTER(port_id)) & (msk))
|
||||
#define _DIGITAL_READ(port_id, msk) (((PORT_TO_INPUT_REGISTER(port_id)) & (msk)) != 0 ? 1 : 0)
|
||||
#define _DIGITAL_READ_RAW(port_id, msk) ((PORT_TO_INPUT_REGISTER(port_id)) & (msk))
|
||||
#define _DIGITAL_READ(port_id, msk) (((PORT_TO_INPUT_REGISTER(port_id)) & (msk)) != 0 ? 1 : 0)
|
||||
|
||||
#define _DIGITAL_TOGGLE(port_id, msk) PORT_TO_OUTPUT_REGISTER(port_id) ^= (msk)
|
||||
#define _DIGITAL_TOGGLE(port_id, msk) PORT_TO_OUTPUT_REGISTER(port_id) ^= (msk)
|
||||
|
||||
#define SET_1(pin) SET_OUTPUT(pin)
|
||||
#define SET_0(pin) SET_INPUT(pin)
|
||||
#define SET_1(pin) SET_OUTPUT(pin)
|
||||
#define SET_0(pin) SET_INPUT(pin)
|
||||
|
||||
#define SET_0x1(pin) SET_OUTPUT(pin)
|
||||
#define SET_0x0(pin) SET_INPUT(pin)
|
||||
#define SET_0x1(pin) SET_OUTPUT(pin)
|
||||
#define SET_0x0(pin) SET_INPUT(pin)
|
||||
|
||||
#define DIGITAL_WRITE_HIGH(pin) EXPAND_WRAPPER(_DIGITAL_WRITE_HIGH, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
|
||||
#define DIGITAL_WRITE_LOW(pin) EXPAND_WRAPPER(_DIGITAL_WRITE_LOW, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
|
||||
#define DIGITAL_WRITE_HIGH(pin) EXPAND_WRAPPER(_DIGITAL_WRITE_HIGH, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
|
||||
#define DIGITAL_WRITE_LOW(pin) EXPAND_WRAPPER(_DIGITAL_WRITE_LOW, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
|
||||
|
||||
#define DIGITAL_WRITE_1(pin) DIGITAL_WRITE_HIGH(pin)
|
||||
#define DIGITAL_WRITE_0(pin) DIGITAL_WRITE_LOW(pin)
|
||||
#define DIGITAL_WRITE_1(pin) DIGITAL_WRITE_HIGH(pin)
|
||||
#define DIGITAL_WRITE_0(pin) DIGITAL_WRITE_LOW(pin)
|
||||
|
||||
#define DIGITAL_WRITE_0x1(pin) DIGITAL_WRITE_HIGH(pin)
|
||||
#define DIGITAL_WRITE_0x0(pin) DIGITAL_WRITE_LOW(pin)
|
||||
#define DIGITAL_WRITE_0x1(pin) DIGITAL_WRITE_HIGH(pin)
|
||||
#define DIGITAL_WRITE_0x0(pin) DIGITAL_WRITE_LOW(pin)
|
||||
|
||||
#define DIGITAL_WRITE_ENABLE(pin) DIGITAL_WRITE_HIGH(pin)
|
||||
#define DIGITAL_WRITE_DISABLE(pin) DIGITAL_WRITE_LOW(pin)
|
||||
#define DIGITAL_WRITE_ENABLE(pin) DIGITAL_WRITE_HIGH(pin)
|
||||
#define DIGITAL_WRITE_DISABLE(pin) DIGITAL_WRITE_LOW(pin)
|
||||
|
||||
#define SET_OUTPUT(pin) EXPAND_WRAPPER(_SET_OUTPUT, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
|
||||
#define SET_INPUT(pin) EXPAND_WRAPPER(_SET_INPUT, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
|
||||
#define SET_OUTPUT(pin) EXPAND_WRAPPER(_SET_OUTPUT, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
|
||||
#define SET_INPUT(pin) EXPAND_WRAPPER(_SET_INPUT, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
|
||||
|
||||
#define pin_mode(pin, mode) SET_##mode(pin)
|
||||
#define pin_pullup(pin, val) DIGITAL_WRITE_##val(pin)
|
||||
#define pin_mode(pin, mode) SET_##mode(pin)
|
||||
#define pin_pullup(pin, val) DIGITAL_WRITE_##val(pin)
|
||||
|
||||
#endif /* PINS_H */
|
||||
|
|
|
|||
|
|
@ -18,57 +18,73 @@
|
|||
#endif
|
||||
#include <util/setbaud.h>
|
||||
|
||||
#if defined (UBRR0H)
|
||||
|
||||
#warning UART0
|
||||
#define UBRRxH UBRR0H
|
||||
#define UBRRxL UBRR0L
|
||||
#define UCSRxA UCSR0A
|
||||
#define U2Xx U2X0
|
||||
#define UCSRxC UCSR0C
|
||||
#define UCSZx1 UCSZ01
|
||||
#define UCSZx0 UCSZ00
|
||||
#define UCSRxB UCSR0B
|
||||
#define RXENx RXEN0
|
||||
#define TXENx TXEN0
|
||||
#define UDREx UDRE0
|
||||
#define RXCx RXC0
|
||||
#define UDRx UDR0
|
||||
#define UDRIEx UDRIE0
|
||||
|
||||
#elif defined (UBRR1H)
|
||||
|
||||
#warning UART1
|
||||
#define UBRRxH UBRR1H
|
||||
#define UBRRxL UBRR1L
|
||||
#define UCSRxA UCSR1A
|
||||
#define U2Xx U2X1
|
||||
#define UCSRxC UCSR1C
|
||||
#define UCSZx1 UCSZ11
|
||||
#define UCSZx0 UCSZ10
|
||||
#define UCSRxB UCSR1B
|
||||
#define RXENx RXEN1
|
||||
#define TXENx TXEN1
|
||||
#define UDREx UDRE1
|
||||
#define RXCx RXC1
|
||||
#define UDRx UDR1
|
||||
#define UDRIEx UDRIE1
|
||||
|
||||
#else
|
||||
#error No UART?
|
||||
#endif
|
||||
|
||||
/* http://www.cs.mun.ca/~rod/Winter2007/4723/notes/serial/serial.html */
|
||||
|
||||
#if defined (__AVR_ATmega32U4__)
|
||||
void uart_init(void) {
|
||||
UBRR1H = UBRRH_VALUE;
|
||||
UBRR1L = UBRRL_VALUE;
|
||||
UBRRxH = UBRRH_VALUE;
|
||||
UBRRxL = UBRRL_VALUE;
|
||||
|
||||
#if USE_2X
|
||||
UCSR1A |= _BV(U2X1);
|
||||
UCSRxA |= _BV(U2Xx);
|
||||
#else
|
||||
UCSR1A &= ~(_BV(U2X1));
|
||||
UCSRxA &= ~(_BV(U2Xx));
|
||||
#endif
|
||||
|
||||
UCSR1C = _BV(UCSZ11) | _BV(UCSZ10); /* 8-bit data */
|
||||
UCSR1B = _BV(RXEN1) | _BV(TXEN1); /* Enable RX and TX */
|
||||
UCSRxC = _BV(UCSZx1) | _BV(UCSZx0); /* 8-bit data */
|
||||
UCSRxB = _BV(RXENx) | _BV(TXENx); /* Enable RX and TX */
|
||||
}
|
||||
#else
|
||||
void uart_init(void) {
|
||||
UBRR0H = UBRRH_VALUE;
|
||||
UBRR0L = UBRRL_VALUE;
|
||||
|
||||
#if USE_2X
|
||||
UCSR0A |= _BV(U2X0);
|
||||
#else
|
||||
UCSR0A &= ~(_BV(U2X0));
|
||||
#endif
|
||||
|
||||
UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); /* 8-bit data */
|
||||
UCSR0B = _BV(RXEN0) | _BV(TXEN0); /* Enable RX and TX */
|
||||
}
|
||||
#endif
|
||||
|
||||
void uart_putchar(char c, FILE *stream) {
|
||||
int uart_putchar(char c, FILE *stream) {
|
||||
if (c == '\n') {
|
||||
uart_putchar('\r', stream);
|
||||
}
|
||||
#if defined (__AVR_ATmega32U4__)
|
||||
loop_until_bit_is_set(UCSR1A, UDRE1);
|
||||
UDR1 = c;
|
||||
#else
|
||||
loop_until_bit_is_set(UCSR0A, UDRE0);
|
||||
UDR0 = c;
|
||||
#endif
|
||||
loop_until_bit_is_set(UCSRxA, UDREx);
|
||||
UDRx = c;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
char uart_getchar(FILE *stream) {
|
||||
#if defined (__AVR_ATmega32U4__)
|
||||
loop_until_bit_is_set(UCSR1A, RXC1);
|
||||
return UDR1;
|
||||
#else
|
||||
loop_until_bit_is_set(UCSR0A, RXC0);
|
||||
return UDR0;
|
||||
#endif
|
||||
int uart_getchar(FILE *stream) {
|
||||
loop_until_bit_is_set(UCSRxA, RXCx);
|
||||
return UDRx;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -5,9 +5,12 @@
|
|||
* http://www.opensource.org/licenses/mit-license.php
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef UART_H
|
||||
#define UART_H
|
||||
|
||||
void uart_putchar(char c, FILE *stream);
|
||||
char uart_getchar(FILE *stream);
|
||||
int uart_putchar(char c, FILE *stream);
|
||||
int uart_getchar(FILE *stream);
|
||||
|
||||
void uart_init(void);
|
||||
|
||||
|
|
@ -15,3 +18,6 @@ void uart_init(void);
|
|||
|
||||
FILE uart_output = FDEV_SETUP_STREAM(uart_putchar, NULL, _FDEV_SETUP_WRITE);
|
||||
FILE uart_input = FDEV_SETUP_STREAM(NULL, uart_getchar, _FDEV_SETUP_READ);
|
||||
|
||||
#endif /* UART_H */
|
||||
|
||||
|
|
|
|||
|
|
@ -25,6 +25,51 @@
|
|||
#define UART_TX_BUFFER_SIZE 64
|
||||
#endif
|
||||
|
||||
#if defined (UBRR0H)
|
||||
|
||||
#warning Using UART0
|
||||
#define UBRRxH UBRR0H
|
||||
#define UBRRxL UBRR0L
|
||||
#define UCSRxA UCSR0A
|
||||
#define U2Xx U2X0
|
||||
#define UCSRxC UCSR0C
|
||||
#define UCSZx1 UCSZ01
|
||||
#define UCSZx0 UCSZ00
|
||||
#define UCSRxB UCSR0B
|
||||
#define RXENx RXEN0
|
||||
#define TXENx TXEN0
|
||||
#define UDREx UDRE0
|
||||
#define RXCx RXC0
|
||||
#define UDRx UDR0
|
||||
#define UDRIEx UDRIE0
|
||||
|
||||
#define USARTx_RX_vect USART_RX_vect
|
||||
#define USARTx_UDRE_vect USART_UDRE_vect
|
||||
#elif defined (UBRR1H)
|
||||
|
||||
#warning Using UART1
|
||||
#define UBRRxH UBRR1H
|
||||
#define UBRRxL UBRR1L
|
||||
#define UCSRxA UCSR1A
|
||||
#define U2Xx U2X1
|
||||
#define UCSRxC UCSR1C
|
||||
#define UCSZx1 UCSZ11
|
||||
#define UCSZx0 UCSZ10
|
||||
#define UCSRxB UCSR1B
|
||||
#define RXENx RXEN1
|
||||
#define TXENx TXEN1
|
||||
#define UDREx UDRE1
|
||||
#define RXCx RXC1
|
||||
#define UDRx UDR1
|
||||
#define UDRIEx UDRIE1
|
||||
|
||||
#define USARTx_RX_vect USART1_RX_vect
|
||||
#define USARTx_UDRE_vect USART1_UDRE_vect
|
||||
|
||||
#else
|
||||
#error No UART?
|
||||
#endif
|
||||
|
||||
struct tx_ring {
|
||||
int buffer[UART_TX_BUFFER_SIZE];
|
||||
int start;
|
||||
|
|
@ -50,18 +95,16 @@ void uart_init(void) {
|
|||
rx_buffer.start = 0;
|
||||
rx_buffer.end = 0;
|
||||
|
||||
UBRR0H = UBRRH_VALUE;
|
||||
UBRR0L = UBRRL_VALUE;
|
||||
UBRRxH = UBRRH_VALUE;
|
||||
UBRRxL = UBRRL_VALUE;
|
||||
|
||||
UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); /* 8-bit data */
|
||||
UCSR0B = _BV(RXEN0) | _BV(TXEN0); /* Enable RX and TX */
|
||||
UCSRxC = _BV(UCSZx1) | _BV(UCSZx0); /* 8-bit data */
|
||||
UCSRxB = _BV(RXENx) | _BV(TXENx); /* Enable RX and TX */
|
||||
|
||||
sei();
|
||||
}
|
||||
|
||||
|
||||
//int uart_putchar(char c, FILE *stream) {
|
||||
void uart_putchar(char c, FILE *stream) {
|
||||
int uart_putchar(char c, FILE *stream) {
|
||||
if (c == '\n') {
|
||||
uart_putchar('\r', stream);
|
||||
}
|
||||
|
|
@ -73,39 +116,39 @@ void uart_putchar(char c, FILE *stream) {
|
|||
tx_buffer.end = write_pointer;
|
||||
|
||||
/* Data available. Enable the transmit interrupt for serial port 0. */
|
||||
UCSR0B |= _BV(UDRIE0);
|
||||
UCSRxB |= _BV(UDRIEx);
|
||||
}
|
||||
|
||||
//return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
char uart_getchar(FILE *stream) {
|
||||
int uart_getchar(FILE *stream) {
|
||||
int read_pointer = (rx_buffer.start + 1) % UART_RX_BUFFER_SIZE;
|
||||
|
||||
rx_buffer.start = read_pointer;
|
||||
return rx_buffer.buffer[read_pointer];
|
||||
}
|
||||
|
||||
ISR(USART_RX_vect) {
|
||||
ISR(USARTx_RX_vect) {
|
||||
int write_pointer = (rx_buffer.end + 1) % UART_RX_BUFFER_SIZE;
|
||||
|
||||
/* Add next byte to ringbuffer if it has space available. */
|
||||
if (write_pointer != rx_buffer.start){
|
||||
rx_buffer.buffer[rx_buffer.end] = UDR0;
|
||||
rx_buffer.buffer[rx_buffer.end] = UDRx;
|
||||
rx_buffer.end = write_pointer;
|
||||
}
|
||||
}
|
||||
|
||||
ISR(USART_UDRE_vect){
|
||||
ISR(USARTx_UDRE_vect){
|
||||
int read_pointer = (tx_buffer.start + 1) % UART_TX_BUFFER_SIZE;
|
||||
|
||||
/* Transmit next byte if data available in ringbuffer. */
|
||||
if (read_pointer != tx_buffer.end) {
|
||||
UDR0 = tx_buffer.buffer[read_pointer];
|
||||
UDRx = tx_buffer.buffer[read_pointer];
|
||||
tx_buffer.start = read_pointer;
|
||||
} else {
|
||||
/* Nothing to send. Disable the transmit interrupt for serial port 0. */
|
||||
UCSR0B &= ~_BV(UDRIE0);
|
||||
/* Nothing to send. Disable the transmit interrupt for serial port x. */
|
||||
UCSRxB &= ~_BV(UDRIEx);
|
||||
}
|
||||
}
|
||||
|
||||
|
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Reference in New Issue