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Merge pull request #2728 from jayvdb/trim-trailing-spaces

Trim trailing whitespace
This commit is contained in:
Brendan Forster 2018-06-17 13:48:40 -03:00 committed by GitHub
commit a580262a25
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8 changed files with 21 additions and 21 deletions

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@ -23,7 +23,7 @@ local.properties
# CDT-specific (C/C++ Development Tooling)
.cproject
# CDT- autotools
# CDT- autotools
.autotools
# Java annotation processor (APT)

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@ -7,12 +7,12 @@
# Compiled MEX binaries (all platforms)
*.mex*
# Packaged app and toolbox files
*.mlappinstall
*.mltbx
# Generated helpsearch folders
helpsearch*/
# Packaged app and toolbox files
*.mlappinstall
*.mltbx
# Generated helpsearch folders
helpsearch*/
# Simulink code generation folders
slprj/

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@ -4,8 +4,8 @@
*.evcd
*.fsdb
# Default name of the simulation executable. A different name can be
# specified with this switch (the associated daidir database name is
# Default name of the simulation executable. A different name can be
# specified with this switch (the associated daidir database name is
# also taken from here): -o <path>/<filename>
simv
@ -13,7 +13,7 @@ simv
simv.daidir/
simv.db.dir/
# Infrastructure necessary to co-simulate SystemC models with
# Infrastructure necessary to co-simulate SystemC models with
# Verilog/VHDL models. An alternate directory may be specified with this
# switch: -Mdir=<directory_path>
csrc/
@ -22,7 +22,7 @@ csrc/
# used to write all messages from simulation: -l <filename>
*.log
# Coverage results (generated with urg) and database location. The
# Coverage results (generated with urg) and database location. The
# following switch can also be used: urg -dir <coverage_directory>.vdb
simv.vdb/
urgReport/