gitignore/Global/SynopsysVCS.gitignore

# Waveform formats
*.vcd
*.vpd
*.evcd
*.fsdb

# Default name of the simulation executable.  A different name can be
# specified with this switch (the associated daidir database name is
# also taken from here):  -o <path>/<filename>
simv

# Generated for Verilog and VHDL top configs
simv.daidir/
simv.db.dir/

# Infrastructure necessary to co-simulate SystemC models with
# Verilog/VHDL models.  An alternate directory may be specified with this
# switch:  -Mdir=<directory_path>
csrc/

# Log file - the following switch allows to specify the file that will be
# used to write all messages from simulation:  -l <filename>
*.log

# Coverage results (generated with urg) and database location.  The
# following switch can also be used:  urg -dir <coverage_directory>.vdb
simv.vdb/
urgReport/

# DVE and UCLI related files.
DVEfiles/
ucli.key

# When the design is elaborated for DirectC, the following file is created
# with declarations for C/C++ functions.
vc_hdrs.h
Cleaning-up some of the comments that had been previously added. 2015-06-01 14:38:55 -07:00			`# Waveform formats`
Adding gitignore file for Synopsys VCS simulator. 2014-11-13 14:40:35 -08:00			`*.vcd`
Adding a few more files/file extensions/directories for Synopsys VCS. This new version adds: - fsdb waveforms - simv.db.dir/ directory for VHDL top configs - ucli.key - vc_hdrs.h - Also added a few comments about where each one of the files come from. 2015-04-23 07:45:39 -07:00			`*.vpd`
Adding gitignore file for Synopsys VCS simulator. 2014-11-13 14:40:35 -08:00			`*.evcd`
Adding a few more files/file extensions/directories for Synopsys VCS. This new version adds: - fsdb waveforms - simv.db.dir/ directory for VHDL top configs - ucli.key - vc_hdrs.h - Also added a few comments about where each one of the files come from. 2015-04-23 07:45:39 -07:00			`*.fsdb`
Adding gitignore file for Synopsys VCS simulator. 2014-11-13 14:40:35 -08:00
Trim trailing whitespace 2018-06-05 11:09:20 +07:00			`# Default name of the simulation executable. A different name can be`
			`# specified with this switch (the associated daidir database name is`
Cleaning-up some of the comments that had been previously added. 2015-06-01 14:38:55 -07:00			`# also taken from here): -o <path>/<filename>`
Adding gitignore file for Synopsys VCS simulator. 2014-11-13 14:40:35 -08:00			`simv`

Cleaning-up some of the comments that had been previously added. 2015-06-01 14:38:55 -07:00			`# Generated for Verilog and VHDL top configs`
Adding gitignore file for Synopsys VCS simulator. 2014-11-13 14:40:35 -08:00			`simv.daidir/`
Adding a few more files/file extensions/directories for Synopsys VCS. This new version adds: - fsdb waveforms - simv.db.dir/ directory for VHDL top configs - ucli.key - vc_hdrs.h - Also added a few comments about where each one of the files come from. 2015-04-23 07:45:39 -07:00			`simv.db.dir/`

Trim trailing whitespace 2018-06-05 11:09:20 +07:00			`# Infrastructure necessary to co-simulate SystemC models with`
Cleaning-up some of the comments that had been previously added. 2015-06-01 14:38:55 -07:00			`# Verilog/VHDL models. An alternate directory may be specified with this`
			`# switch: -Mdir=<directory_path>`
			`csrc/`
Adding gitignore file for Synopsys VCS simulator. 2014-11-13 14:40:35 -08:00
Cleaning-up some of the comments that had been previously added. 2015-06-01 14:38:55 -07:00			`# Log file - the following switch allows to specify the file that will be`
			`# used to write all messages from simulation: -l <filename>`
Adding gitignore file for Synopsys VCS simulator. 2014-11-13 14:40:35 -08:00			`*.log`

Trim trailing whitespace 2018-06-05 11:09:20 +07:00			`# Coverage results (generated with urg) and database location. The`
Cleaning-up some of the comments that had been previously added. 2015-06-01 14:38:55 -07:00			`# following switch can also be used: urg -dir <coverage_directory>.vdb`
Adding gitignore file for Synopsys VCS simulator. 2014-11-13 14:40:35 -08:00			`simv.vdb/`
			`urgReport/`
Adding a few more files/file extensions/directories for Synopsys VCS. This new version adds: - fsdb waveforms - simv.db.dir/ directory for VHDL top configs - ucli.key - vc_hdrs.h - Also added a few comments about where each one of the files come from. 2015-04-23 07:45:39 -07:00
Cleaning-up some of the comments that had been previously added. 2015-06-01 14:38:55 -07:00			`# DVE and UCLI related files.`
Adding a few more files/file extensions/directories for Synopsys VCS. This new version adds: - fsdb waveforms - simv.db.dir/ directory for VHDL top configs - ucli.key - vc_hdrs.h - Also added a few comments about where each one of the files come from. 2015-04-23 07:45:39 -07:00			`DVEfiles/`
			`ucli.key`

Cleaning-up some of the comments that had been previously added. 2015-06-01 14:38:55 -07:00			`# When the design is elaborated for DirectC, the following file is created`
			`# with declarations for C/C++ functions.`
Adding a few more files/file extensions/directories for Synopsys VCS. This new version adds: - fsdb waveforms - simv.db.dir/ directory for VHDL top configs - ucli.key - vc_hdrs.h - Also added a few comments about where each one of the files come from. 2015-04-23 07:45:39 -07:00			`vc_hdrs.h`