First Steps
This commit is contained in:
commit
9f111fde11
258
avr.bitops.tex
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258
avr.bitops.tex
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\def\avr@zeroes{00000000}
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\def\avr@ones{11111111}
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\def\avr@bin@map#1#2#3{% BitMacro, Bitstring, Output Macro
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\def\avr@bin@foreach@helper##1##2##3##4##5##6##7##8##9\@nnil{%
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#1{##1}#1{##2}#1{##3}#1{##4}#1{##5}#1{##6}#1{##7}#1{##8}%
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\ifx&##9&\else%
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\avr@bin@foreach@helper ##9\@nnil%
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\fi%
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}%
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\edef\@tempa{#2}%
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\edef#3{\expandafter\avr@bin@foreach@helper \@tempa\@nnil}%
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}
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\def\avr@bin@zipmap#1#2#3#4{% Bitmacro{A}{B}, A, B, OutputMacro
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\def\avr@bin@zipmap@helper##1##2##3;##4##5##6;{%
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#1{##1}{##4}#1{##2}{##5}%
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\ifx&##3&%
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\ifx&##6&\else\avr@error{Wrong Arguments to ZipMap}\fi%
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\else%
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\avr@bin@zipmap@helper ##3;##6;%
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\fi%
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}%
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\edef\@tempa{#2;#3;}%
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\edef#4{\expandafter\avr@bin@zipmap@helper\@tempa}%
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}
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\csdef{avr@bit@negate@0}{1}
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\csdef{avr@bit@negate@1}{0}
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\def\avr@bit@negate#1{\csuse{avr@bit@negate@#1}}
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% \avr@bin@negate{A}{\result} -> \result = ~A
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\def\avr@bin@negate{\avr@bin@map{\avr@bit@negate}}
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\def\avr@bit@id#1{#1}
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% \avr@bin@id{A}{\result} -> \result = A
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\def\avr@bin@id{\avr@bin@map{\avr@bit@id}}
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\csdef{avr@bit@and@00}{0}
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\csdef{avr@bit@and@01}{0}
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\csdef{avr@bit@and@10}{0}
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\csdef{avr@bit@and@11}{1}
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\def\avr@bit@and#1#2{\csuse{avr@bit@and@#1#2}}
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% \avr@bin@and{A}{B}{\result} -> \result = A & B
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\def\avr@bin@and{\avr@bin@zipmap{\avr@bit@and}}
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\csdef{avr@bit@or@00}{0}
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\csdef{avr@bit@or@01}{1}
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\csdef{avr@bit@or@10}{1}
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\csdef{avr@bit@or@11}{1}
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\def\avr@bit@or#1#2{\csuse{avr@bit@or@#1#2}}
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% \avr@bin@or{A}{B}{\result} -> \result = A | B
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\def\avr@bin@or{\avr@bin@zipmap{\avr@bit@or}}
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\csdef{avr@bit@xor@00}{0}
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\csdef{avr@bit@xor@01}{1}
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\csdef{avr@bit@xor@10}{1}
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\csdef{avr@bit@xor@11}{0}
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\def\avr@bit@xor#1#2{\csuse{avr@bit@xor@#1#2}}
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% \avr@bin@xor{A}{B}{\result} -> \result = A | B
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\def\avr@bin@xor{\avr@bin@zipmap{\avr@bit@xor}}
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% \avr@bin@getbit bs:byte, bitnum, \result -> \result = (bs >> bitnum)& 1
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\def\avr@bin@getbit#1#2#3{%
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\avr@count@tmpa=7%
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\advance\avr@count@tmpa by -#2\relax%
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\def\avr@bin@getbit@helper##1##2\@nnil{%
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\ifnum \avr@count@tmpa = 0%
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\def#3{##1}%
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\else%
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\advance\avr@count@tmpa by -1\relax%
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\avr@bin@getbit@helper##2\@nnil%
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\fi%
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}%
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\edef\@tmpa{#1}%
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\expandafter\avr@bin@getbit@helper\@tmpa\@nnil%
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}
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% \avr@bin@btw bs:byte, \result -> \result = 00000000+bs
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\def\avr@bin@btw#1#2{\xdef#2{00000000#1}}
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\def\avr@bin@btw@sign#1#2{%
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\avr@bin@getbit{#1}{7}{\@tmpa}%
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\xdef#2{\@tmpa\@tmpa\@tmpa\@tmpa\@tmpa\@tmpa\@tmpa\@tmpa#1}%
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}
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\def\avr@bin@wtb@helper#1#2#3#4#5#6#7#8#9\@nnil{%
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#9%
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}
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% \avr@bin@wtb bs:word, \result = ((uint8_t) bs)
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\def\avr@bin@wtb#1#2{%
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\edef\@tempa{#1}%
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\edef#2{\expandafter\avr@bin@wtb@helper\@tempa\@nnil}%
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}
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% \avr@bin@shiftleft bs:(byte|word), count, \result, \carry
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% -> \result = bs << count; \carry = (bs >> count) & 1
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\def\avr@bin@shiftleft#1#2#3#4{%
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\avr@count@tmpa=#2\relax%
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\edef#4{0}%
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\def\avr@bin@shiftleft@helper##1##2\@nnil{%
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\ifnum \avr@count@tmpa = 0%
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\edef#3{##1##2}%
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\else%
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\edef#4{##1}%
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\advance \avr@count@tmpa by -1\relax%
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\avr@bin@shiftleft@helper ##20\@nnil%
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\fi%
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}%
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\edef\@tempa{#1}%
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\expandafter\avr@bin@shiftleft@helper\@tempa\@nnil%
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}
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\def\avr@bin@shiftleft@barrel#1#2#3#4{%
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\avr@count@tmpa=#2\relax%
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\edef#4{0}%
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\def\avr@bin@shiftleft@helper##1##2\@nnil{%
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\ifnum \avr@count@tmpa = 0%
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\edef#3{##1##2}%
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\else%
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\edef#4{##1}%
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\advance \avr@count@tmpa by -1\relax%
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\avr@bin@shiftleft@helper ##2##1\@nnil%
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\fi%
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}%
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\edef\@tempa{#1}%
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\expandafter\avr@bin@shiftleft@helper\@tempa\@nnil%
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}
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% Delete LSB: bs, \result, \carry
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\def\avr@bin@lsb@del#1#2#3{%
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\def\avr@bin@lsb@del@helper##1##2\@nnil{%
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\ifx&##2&%
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\edef#3{##1}%
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\else%
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\xdef#2{#2##1}% Append bit to result
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\avr@bin@lsb@del@helper ##2\@nnil%
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\fi%
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}%
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\edef\@tempa{#1}%
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\def#2{}%
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\expandafter\avr@bin@lsb@del@helper\@tempa\@nnil
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}
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% Get LSB: bs, \result
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\def\avr@bin@lsb@get#1#2{%
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\def\avr@bin@lsb@get@helper##1##2\@nnil{%
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\ifx&##2&%
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\edef#2{##1}%
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\else%
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\avr@bin@lsb@get@helper ##2\@nnil%
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\fi%
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}%
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\edef\@tempa{#1}%
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\expandafter\avr@bin@lsb@get@helper\@tempa\@nnil
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}
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% Delete MSB: bs, \result,\carry
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\def\avr@bin@msb@del#1#2#3{%
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\def\avr@bin@msb@del@helper##1##2\@nnil{%
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\edef#3{##1}%
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\edef#2{##2}%
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}%
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\edef\@tempa{#1}%
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\expandafter\avr@bin@msb@del@helper\@tempa\@nnil%
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}
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% Get MSB: bs, \carry
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\def\avr@bin@msb@get#1#2{%
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\def\avr@bin@msb@get@helper##1##2\@nnil{%
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\edef#2{##1}%
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}%
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\edef\@tempa{#1}%
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\expandafter\avr@bin@msb@get@helper\@tempa\@nnil%
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}
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% Get Higher Nibble: bs, \result
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\def\avr@bin@nibble@high#1#2{%
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\def\avr@bin@nibble@helper##1##2##3##4##5\@nnil{%
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\edef#2{##1##2##3##4}%
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}%
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\edef\@tempa{#1}%
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\expandafter\avr@bin@nibble@helper\@tempa\@nnil%
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}
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% Get Lower Nibble: bs, \result
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\def\avr@bin@nibble@low#1#2{%
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\def\avr@bin@nibble@helper##1##2##3##4##5\@nnil{%
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\edef#2{##5}%
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}%
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\edef\@tempa{#1}%
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\expandafter\avr@bin@nibble@helper\@tempa\@nnil%
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}
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\def\avr@bin@shiftright#1#2#3#4{%
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\def\avr@bin@shiftright@helper##1\@nnil{%
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\ifnum \avr@count@tmpa = 0%
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\edef#3{##1}%
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\else%
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\avr@bin@lsb@del{##1}{\avr@bin@shiftright@bs}{\avr@bin@shiftright@carry}%
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\edef#4{\avr@bin@shiftright@carry}%
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\advance \avr@count@tmpa by -1\relax%
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\edef\@tempa{0\avr@bin@shiftright@bs}%
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\expandafter\avr@bin@shiftright@helper\@tempa\@nnil%
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\fi%
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}%
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\edef\@tempa{#1}%
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\edef#4{0}%
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\avr@count@tmpa=#2\relax%
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\expandafter\avr@bin@shiftright@helper\@tempa\@nnil%
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}
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\def\avr@bin@shiftright@arith#1#2#3#4{%
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\def\avr@bin@shiftright@helper##1\@nnil{%
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\ifnum \avr@count@tmpa = 0%
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\edef#3{##1}%
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\else%
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\avr@bin@msb@get{##1}{\avr@bin@shiftright@sign}%
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\avr@bin@lsb@del{##1}{\avr@bin@shiftright@bs}{\avr@bin@shiftright@carry}%
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\edef#4{\avr@bin@shiftright@carry}%
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\advance \avr@count@tmpa by -1\relax%
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\edef\@tempa{\avr@bin@shiftright@sign \avr@bin@shiftright@bs}%
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\expandafter\avr@bin@shiftright@helper\@tempa\@nnil%
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\fi%
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}%
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\edef\@tempa{#1}%
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\edef#4{0}%
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\avr@count@tmpa=#2\relax%
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\expandafter\avr@bin@shiftright@helper\@tempa\@nnil%
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}
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\def\avr@bin@shiftright@barrel#1#2#3#4{%
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\def\avr@bin@shiftright@helper##1\@nnil{%
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\ifnum \avr@count@tmpa = 0%
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\edef#3{##1}%
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\else%
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\avr@bin@lsb@get{##1}{\avr@bin@shiftright@sign}%
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\avr@bin@lsb@del{##1}{\avr@bin@shiftright@bs}{\avr@bin@shiftright@carry}%
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\edef#4{\avr@bin@shiftright@carry}%
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\advance \avr@count@tmpa by -1\relax%
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\edef\@tempa{\avr@bin@shiftright@sign \avr@bin@shiftright@bs}%
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\expandafter\avr@bin@shiftright@helper\@tempa\@nnil%
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\fi%
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}%
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\edef\@tempa{#1}%
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\edef#4{0}%
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\avr@count@tmpa=#2\relax%
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\expandafter\avr@bin@shiftright@helper\@tempa\@nnil%
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}
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%%% Local Variables:
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%%% mode: latex
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%%% TeX-master: "avr.tex"
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%%% End:
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401
avr.instr.tex
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401
avr.instr.tex
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@ -0,0 +1,401 @@
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\def\avr@debug#1{%
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\typeout{\the\avr@pc: #1}%
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}
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\def\avr@error#1{%
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\typeout{#1}\bye%
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}
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% Execution Engine
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\def\avr@instr@step{%
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\avr@code@get{\avr@instr@current}%
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% Dispatch Instruction by prefix
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\expandafter\avr@instr@dispatch\avr@instr@current\@nnil%
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\relax%
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}
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\newcount\avr@instr@steps
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\def\avr@instr@stepn#1{%
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\avr@instr@steps=#1%
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\def\avr@instr@stepn@helper{
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\ifnum \avr@instr@steps > 0%
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\advance \avr@instr@steps by -1\relax%
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\avr@instr@step%
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\avr@instr@stepn@helper%
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\fi%
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}%
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\avr@instr@stepn@helper%
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}
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\def\avr@instr@dispatch#1#2#3#4#5#6#7#8#9\@nnil{%
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\ifcsdef{avr@instr@#1#2#3#4#5#6#7#8#9}{%
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\csuse{avr@instr@#1#2#3#4#5#6#7#8#9}\@nnil%
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}{\ifcsdef{avr@instr@#1#2#3#4#5#6#7#8}{%
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\csuse{avr@instr@#1#2#3#4#5#6#7#8}#9\@nnil%
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}{\ifcsdef{avr@instr@#1#2#3#4#5#6#7}{%
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\csuse{avr@instr@#1#2#3#4#5#6#7}#8#9\@nnil%
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}{\ifcsdef{avr@instr@#1#2#3#4#5#6}{%
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\csuse{avr@instr@#1#2#3#4#5#6}#7#8#9\@nnil%
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}{\ifcsdef{avr@instr@#1#2#3#4#5}{%
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\csuse{avr@instr@#1#2#3#4#5}#6#7#8#9\@nnil%
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}{\ifcsdef{avr@instr@#1#2#3#4}{%
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\csuse{avr@instr@#1#2#3#4}#5#6#7#8#9\@nnil%
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}{\ifcsdef{avr@instr@#1#2#3}{%
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\csuse{avr@instr@#1#2#3}#4#5#6#7#8#9\@nnil%
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}{\ifcsdef{avr@instr@#1#2}{%
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\csuse{avr@instr@#1#2}#3#4#5#6#7#8#9\@nnil%
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}{\ifcsdef{avr@instr@#1}{%
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\csuse{avr@instr@#1}#2#3#4#5#6#7#8#9\@nnil%
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}{% Not found
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\avr@error{Unkown Instruction: #1#2#3#4#5#6#7#8#9}%
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}}}}}}}}}%
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}
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% ADD -- Add without Carry
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\def\avr@instr@ADD#1#2#3{% ADD PC, Rd, Rr, PC
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\avr@bin@msb@del{#2}{\avr@ADD@dddd}{\avr@ADD@d}%
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\avr@bin@msb@del{#3}{\avr@ADD@rrrr}{\avr@ADD@r}%
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\avr@code@set{000011\avr@ADD@r\avr@ADD@d\avr@ADD@dddd\avr@ADD@rrrr}{#1}%
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}
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\csdef{avr@instr@000011}#1#2#3#4#5#6#7\@nnil{%
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\def\avr@instr@extracarry{0}%
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\avr@reg@get{#1#7}{\avr@Rr}%
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\avr@reg@get{#2#3#4#5#6}{\avr@Rd}%
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\avr@debug{ADD - \%#2#3#4#5#6 <- #2#3#4#5#6 + \%#1#7}%
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\avr@debug{ADD - \avr@Rd <- \avr@Rd + \avr@Rr}%
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\def\avr@instr@adder@RrPreprocess{\avr@bit@id}%
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\csuse{avr@instr@adder@helper}%
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\avr@reg@set{\avr@Rx}{#2#3#4#5#6}%
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\avr@pc@inc%
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}
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% ADC -- Add with Carry
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\def\avr@instr@ADC#1#2#3{% ADC PC, Rd, Rr, PC
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\avr@bin@msb@del{#2}{\avr@ADD@dddd}{\avr@ADD@d}%
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\avr@bin@msb@del{#3}{\avr@ADD@rrrr}{\avr@ADD@r}%
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\avr@code@set{000111\avr@ADD@r\avr@ADD@d\avr@ADD@dddd\avr@ADD@rrrr}{#1}%
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}
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\csdef{avr@instr@000111}#1#2#3#4#5#6#7\@nnil{%
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\avr@reg@get{#1#7}{\avr@Rr}%
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\avr@reg@get{#2#3#4#5#6}{\avr@Rd}%
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\avr@flag@get C \avr@instr@extracarry%
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\avr@debug{ADC - \%#2#3#4#5#6 <- #2#3#4#5#6 + \%#1#7}%
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\avr@debug{ADC - \avr@Rd <- \avr@Rd + \avr@Rr + \avr@instr@extracarry}%
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\def\avr@instr@adder@RrPreprocess{\avr@bit@id}%
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\csuse{avr@instr@adder@helper}%
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% Set the result register
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\avr@reg@set{\avr@Rx}{#2#3#4#5#6}%
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\avr@pc@inc%
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}
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% SUB -- Substract without carry
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\def\avr@instr@SUB#1#2#3{% SUB PC, Rd, Rr, PC
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\avr@bin@msb@del{#2}{\avr@ADD@dddd}{\avr@ADD@d}%
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\avr@bin@msb@del{#3}{\avr@ADD@rrrr}{\avr@ADD@r}%
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\avr@code@set{000110\avr@ADD@r\avr@ADD@d\avr@ADD@dddd\avr@ADD@rrrr}{#1}%
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}
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\csdef{avr@instr@000110}#1#2#3#4#5#6#7\@nnil{%
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\avr@reg@get{#1#7}{\avr@Rr}%
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\avr@reg@get{#2#3#4#5#6}{\avr@Rd}%
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\def\avr@instr@extracarry{1}%
|
||||
\avr@debug{SUB - \%#2#3#4#5#6 <- #2#3#4#5#6 + \%#1#7}%
|
||||
\avr@debug{SUB - \avr@Rd <- \avr@Rd - \avr@Rr}%
|
||||
\def\avr@instr@adder@RrPreprocess{\avr@bit@negate}%
|
||||
\csuse{avr@instr@adder@helper}%
|
||||
% Set the result register
|
||||
\avr@reg@set{\avr@Rx}{#2#3#4#5#6}%
|
||||
\avr@pc@inc%
|
||||
}
|
||||
% SBC - Substract with Carry
|
||||
\def\avr@instr@SBC#1#2#3{% SBC PC, Rd, Rr, PC
|
||||
\avr@bin@msb@del{#2}{\avr@ADD@dddd}{\avr@ADD@d}%
|
||||
\avr@bin@msb@del{#3}{\avr@ADD@rrrr}{\avr@ADD@r}%
|
||||
\avr@code@set{000010\avr@ADD@r\avr@ADD@d\avr@ADD@dddd\avr@ADD@rrrr}{#1}%
|
||||
}
|
||||
|
||||
\csdef{avr@instr@000010}#1#2#3#4#5#6#7\@nnil{%
|
||||
\avr@reg@get{#1#7}{\avr@Rr}%
|
||||
\avr@reg@get{#2#3#4#5#6}{\avr@Rd}%
|
||||
\avr@flag@get C \@@carry%
|
||||
\xdef \avr@instr@extracarry {\avr@bit@negate \@@carry}%
|
||||
\avr@debug{SBC - \%#2#3#4#5#6 <- #2#3#4#5#6 + \%#1#7}%
|
||||
\avr@debug{SBC - \avr@Rd <- \avr@Rd - \avr@Rr - \@@carry}%
|
||||
\def\avr@instr@adder@RrPreprocess{\avr@bit@negate}%
|
||||
\csuse{avr@instr@adder@helper}%
|
||||
% Set the result register
|
||||
\avr@reg@set{\avr@Rx}{#2#3#4#5#6}%
|
||||
\avr@pc@inc%
|
||||
}
|
||||
|
||||
% CP -- Compare without Carry
|
||||
\def\avr@instr@CP#1#2#3{% CP PC, Rd, Rr, PC
|
||||
\avr@bin@msb@del{#2}{\avr@ADD@dddd}{\avr@ADD@d}%
|
||||
\avr@bin@msb@del{#3}{\avr@ADD@rrrr}{\avr@ADD@r}%
|
||||
\avr@code@set{000101\avr@ADD@r\avr@ADD@d\avr@ADD@dddd\avr@ADD@rrrr}{#1}%
|
||||
}
|
||||
|
||||
\csdef{avr@instr@000101}#1#2#3#4#5#6#7\@nnil{%
|
||||
\avr@reg@get{#1#7}{\avr@Rr}%
|
||||
\avr@reg@get{#2#3#4#5#6}{\avr@Rd}%
|
||||
\def\avr@instr@extracarry{1}%
|
||||
\avr@debug{CP - #2#3#4#5#6(=\avr@Rd) - \%#1#7(=\avr@Rr)}%
|
||||
\def\avr@instr@adder@RrPreprocess{\avr@bit@negate}%
|
||||
\csuse{avr@instr@adder@helper}%
|
||||
% Do not set the output register
|
||||
\avr@pc@inc%
|
||||
}
|
||||
|
||||
% CPC -- Compare with Carry
|
||||
\def\avr@instr@CPC#1#2#3{% CPC PC, Rd, Rr, PC
|
||||
\avr@bin@msb@del{#2}{\avr@ADD@dddd}{\avr@ADD@d}%
|
||||
\avr@bin@msb@del{#3}{\avr@ADD@rrrr}{\avr@ADD@r}%
|
||||
\avr@code@set{000001\avr@ADD@r\avr@ADD@d\avr@ADD@dddd\avr@ADD@rrrr}{#1}%
|
||||
}
|
||||
|
||||
\csdef{avr@instr@000001}#1#2#3#4#5#6#7\@nnil{%
|
||||
\avr@reg@get{#1#7}{\avr@Rr}%
|
||||
\avr@reg@get{#2#3#4#5#6}{\avr@Rd}%
|
||||
\avr@flag@get C \@@carry%
|
||||
\xdef \avr@instr@extracarry {\avr@bit@negate \@@carry}%
|
||||
\avr@debug{CP - #2#3#4#5#6(=\avr@Rd) - \%#1#7(=\avr@Rr)}%
|
||||
\def\avr@instr@adder@RrPreprocess{\avr@bit@negate}%
|
||||
\csuse{avr@instr@adder@helper}%
|
||||
% Do not set the output register
|
||||
\avr@pc@inc%
|
||||
}
|
||||
|
||||
\csdef{avr@instr@adder@helper}{%
|
||||
% Convert the Bitstring to Integer values
|
||||
\avr@bin@tocount{\avr@Rd}{\avr@accA}%
|
||||
\avr@bin@map{\avr@instr@adder@RrPreprocess}{\avr@Rr}{\avr@Rr}%
|
||||
\avr@bin@tocount{\avr@Rr}{\avr@accB}%
|
||||
\advance \avr@accA by \avr@accB\relax%
|
||||
\advance \avr@accA by \avr@instr@extracarry\relax%
|
||||
\avr@count@modulo@byte{\avr@accA}%
|
||||
\avr@count@tobin@b{\avr@accA}{\avr@Rx}%
|
||||
% Calculate the Flags
|
||||
\let\@@not=\avr@bit@negate%
|
||||
\let\@@and=\avr@bit@and%
|
||||
\let\@@or=\avr@bit@or%
|
||||
%% Carry
|
||||
\avr@bin@msb@get{\avr@Rr}{\@@R}%
|
||||
\avr@bin@msb@get{\avr@Rd}{\@@D}%
|
||||
\avr@bin@msb@get{\avr@Rx}{\@@X}%
|
||||
% \avr@debug{R: \@@R D: \@@D X:\@@X}%
|
||||
\def\avr@ADD@carry{%
|
||||
\@@or {\@@and \@@D {\@@not \@@X}}%
|
||||
{%
|
||||
\@@or{\@@and \@@R \@@D}%
|
||||
{\@@and \@@R {\@@not \@@X}}}}%
|
||||
\avr@flag@set C {\avr@instr@adder@RrPreprocess{\avr@ADD@carry}}%
|
||||
% Two's Complement Overflow
|
||||
\def\@@tmp{\@@or%
|
||||
{\@@and \@@D {\@@and \@@R {\@@not \@@X}}}%
|
||||
{\@@and {\@@not \@@D} {\@@and {\@@not \@@R} \@@X}}}%
|
||||
\avr@flag@set V \@@tmp%
|
||||
% Half Carry
|
||||
\avr@bin@getbit{\avr@Rr}{3}{\@@R}%
|
||||
\avr@bin@getbit{\avr@Rd}{3}{\@@D}%
|
||||
\avr@bin@getbit{\avr@Rx}{3}{\@@X}%
|
||||
\def\avr@ADD@carry{%
|
||||
\@@or {\@@and \@@D {\@@not \@@X}}%
|
||||
{%
|
||||
\@@or{\@@and \@@R \@@D}%
|
||||
{\@@and \@@R {\@@not \@@X}}}}%
|
||||
\avr@flag@set H {\avr@instr@adder@RrPreprocess{\avr@ADD@carry}}%
|
||||
%% Update Dependend Flags (N, Z, S)
|
||||
\avr@flags@update \avr@Rx%
|
||||
}
|
||||
|
||||
% LDI -- Load Immediate Value
|
||||
\def\avr@instr@LDI#1#2#3{% LDI PC, Rd, K
|
||||
\avr@bin@msb@del{#2}{\avr@LDI@dddd}{\avr@LDI@d}%
|
||||
\avr@bin@nibble@high{#3}{\avr@LDI@H}%
|
||||
\avr@bin@nibble@low{#3}{\avr@LDI@L}%
|
||||
\avr@code@set{1110\avr@LDI@H\avr@LDI@dddd\avr@LDI@L}{#1}%
|
||||
}
|
||||
|
||||
\csdef{avr@instr@1110}#1#2#3#4#5#6#7#8#9\@nnil{%
|
||||
\avr@debug{LDI - \%1#5#6#7#8 <- #1#2#3#4#9}%
|
||||
\avr@reg@set{#1#2#3#4#9}{1#5#6#7#8}%
|
||||
\avr@pc@inc%
|
||||
}
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
% Branch Instructions
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
% Encode 6 Bit Value to PC Offset
|
||||
\def\avr@instr@jump@enc#1#2{%
|
||||
\avr@count@tmpa=#1%
|
||||
\ifnum #1 < 0%
|
||||
\avr@count@tmpb=\avr@count@tmpa%
|
||||
\avr@count@tmpa=255%
|
||||
\advance \avr@count@tmpa by \avr@count@tmpb\relax%
|
||||
\advance \avr@count@tmpa by 1\relax%
|
||||
\fi%
|
||||
\avr@count@tobin@b{\avr@count@tmpa}{\@@res}%
|
||||
\avr@bin@msb@del{\@@res}{#2}{\@tempa}
|
||||
}
|
||||
\def\avr@instr@jump@dec#1#2{%
|
||||
\avr@bin@tocount{0#1}{\avr@count@tmpa}%
|
||||
\ifnum \avr@count@tmpa > 63%
|
||||
\avr@count@tmpb=\avr@count@tmpa%
|
||||
\avr@count@tmpa=-128%
|
||||
\advance \avr@count@tmpa by \avr@count@tmpb\relax%
|
||||
\fi%
|
||||
#2=\avr@count@tmpa\relax%
|
||||
}
|
||||
|
||||
% BRBC -- Branch if Bit in SREG is cleared
|
||||
\def\avr@instr@BRBC#1#2#3{% ADD PC, Bit, Offset
|
||||
\avr@instr@jump@enc{#3}{\@@offset}%
|
||||
\avr@code@set{111101\@@offset#2}{#1}%
|
||||
}
|
||||
|
||||
% BRBS -- Branch if Bit in SREG is set
|
||||
\def\avr@instr@BRBS#1#2#3{% ADD PC, Bit, Offset
|
||||
\avr@instr@jump@enc{#3}{\@@offset}%
|
||||
\avr@code@set{111100\@@offset#2}{#1}%
|
||||
}
|
||||
|
||||
% BRCC - Branch if Carry Cleared
|
||||
\def\avr@instr@BRCC#1#2{% PC, Offset
|
||||
\avr@instr@BRBC{#1}{000}{#2}%
|
||||
}
|
||||
% BRSH - Branch if Same or Higher
|
||||
\def\avr@instr@BRSH{\avr@instr@BRCC}
|
||||
|
||||
% BRCS - Branch if Carry Set
|
||||
\def\avr@instr@BRCS#1#2{% PC, Offset
|
||||
\avr@instr@BRBS{#1}{000}{#2}%
|
||||
}
|
||||
% BRSH - Branch if Lower
|
||||
\def\avr@instr@BRLO{\avr@instr@BRCS}
|
||||
|
||||
|
||||
% BRHC - Branch if Half Carry Cleared
|
||||
\def\avr@instr@BRHC#1#2{% PC, Offset
|
||||
\avr@instr@BRBC{#1}{101}{#2}%
|
||||
}
|
||||
% BRHS - Branch if Half Carry Set
|
||||
\def\avr@instr@BRHS#1#2{% PC, Offset
|
||||
\avr@instr@BRBS{#1}{101}{#2}%
|
||||
}
|
||||
|
||||
% BRID - Branch if Global Interrupt Disabled
|
||||
\def\avr@instr@BRID#1#2{% PC, Offset
|
||||
\avr@instr@BRBC{#1}{111}{#2}%
|
||||
}
|
||||
% BRIE - Branch if Global Interrupt Enabled
|
||||
\def\avr@instr@BRIE#1#2{% PC, Offset
|
||||
\avr@instr@BRBS{#1}{111}{#2}%
|
||||
}
|
||||
|
||||
% BRMI - Branch if Minus
|
||||
\def\avr@instr@BRMI#1#2{% PC, Offset
|
||||
\avr@instr@BRBS{#1}{010}{#2}%
|
||||
}
|
||||
% BRPL - Branch if Plus
|
||||
\def\avr@instr@BRPL#1#2{% PC, Offset
|
||||
\avr@instr@BRBC{#1}{010}{#2}%
|
||||
}
|
||||
% BRNE - Branch if Not Equal
|
||||
\def\avr@instr@BRNE#1#2{% PC, Offset
|
||||
\avr@instr@BRBC{#1}{001}{#2}%
|
||||
}
|
||||
% BREQ - Branch if Equal
|
||||
\def\avr@instr@BREQ#1#2{% PC, Offset
|
||||
\avr@instr@BRBS{#1}{001}{#2}%
|
||||
}
|
||||
|
||||
% BRTC - Branch if T flag cleared
|
||||
\def\avr@instr@BRTC#1#2{% PC, Offset
|
||||
\avr@instr@BRTC{#1}{110}{#2}%
|
||||
}
|
||||
% BRTS - Branch if T flag set
|
||||
\def\avr@instr@BRTS#1#2{% PC, Offset
|
||||
\avr@instr@BRTS{#1}{110}{#2}%
|
||||
}
|
||||
|
||||
% BRVC - Branch if Overflow flag cleared
|
||||
\def\avr@instr@BRVC#1#2{% PC, Offset
|
||||
\avr@instr@BRBC{#1}{011}{#2}%
|
||||
}
|
||||
% BRVS - Branch if Overflow flag set
|
||||
\def\avr@instr@BRVS#1#2{% PC, Offset
|
||||
\avr@instr@BRBS{#1}{011}{#2}%
|
||||
}
|
||||
|
||||
% BRGE - Branch if greater Equal (signed)
|
||||
\def\avr@instr@BRGE#1#2{% PC, Offset
|
||||
\avr@instr@BRBC{#1}{100}{#2}%
|
||||
}
|
||||
% BRLT - Branch if less than (signed)
|
||||
\def\avr@instr@BRLT#1#2{% PC, Offset
|
||||
\avr@instr@BRBS{#1}{100}{#2}%
|
||||
}
|
||||
|
||||
% #1 = Value to be reached
|
||||
\csdef{avr@instr@11110}#1#2#3#4#5#6#7#8#9\@nnil{
|
||||
\edef\@@required{\avr@bit@negate #1}%
|
||||
\def\@@offset{#2#3#4#5#6#7#8}%
|
||||
\def\@@bit{00000#9}%
|
||||
\avr@sreg@get{\@@sreg}%
|
||||
\avr@bin@tocount{\@@bit}{\avr@count@tmpa}%
|
||||
\edef\@@bit{\the\avr@count@tmpa}%
|
||||
\avr@bin@getbit{\@@sreg}{\@@bit}{\@@found}%
|
||||
\avr@count@tmpa=\@@required%
|
||||
\avr@count@tmpb=\@@found\relax%
|
||||
\avr@debug{BRB{CS} - (\@@sreg[\@@bit] == \@@required) ? +\@@offset : +0}
|
||||
\ifnum \avr@count@tmpa = \avr@count@tmpb%
|
||||
\avr@instr@jump@dec{\@@offset}{\avr@count@tmpa}%
|
||||
\avr@debug{BRB -- JUMP \the\avr@count@tmpa}%
|
||||
\avr@pc@add{\avr@count@tmpa}%
|
||||
\fi%
|
||||
\avr@pc@inc%
|
||||
}
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
% Data transfert instructions
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
% MOV
|
||||
\def\avr@instr@MOV#1#2#3{% CP PC, Rd, Rr
|
||||
\avr@bin@msb@del{#2}{\avr@ADD@dddd}{\avr@ADD@d}%
|
||||
\avr@bin@msb@del{#3}{\avr@ADD@rrrr}{\avr@ADD@r}%
|
||||
\avr@code@set{001011\avr@ADD@r\avr@ADD@d\avr@ADD@dddd\avr@ADD@rrrr}{#1}%
|
||||
}
|
||||
|
||||
\csdef{avr@instr@001011}#1#2#3#4#5#6#7\@nnil{%
|
||||
\avr@reg@get{#1#7}{\avr@Rr}%
|
||||
\avr@reg@set{\avr@Rr}{#2#3#4#5#6}%
|
||||
\avr@debug{MOV - #2#3#4#5#6 <- #1#7(=\avr@Rr)}
|
||||
\avr@pc@inc%
|
||||
}
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
% Misc
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
\def\avr@instr@BREAK#1{% BREAK PC
|
||||
\avr@code@set{1001010110011000}{#1}%
|
||||
}
|
||||
|
||||
\csdef{avr@instr@1001010110011000}\@nnil{%
|
||||
\avr@debug{BREAK}%
|
||||
\avr@instr@steps=0\relax%
|
||||
\avr@pc@inc%
|
||||
}
|
||||
|
||||
|
||||
|
||||
%%% Local Variables:
|
||||
%%% mode: latex
|
||||
%%% TeX-master: "avr.tex"
|
||||
%%% End:
|
219
avr.memory.tex
Normal file
219
avr.memory.tex
Normal file
@ -0,0 +1,219 @@
|
||||
\makeatletter
|
||||
|
||||
%% Bootup
|
||||
\def\avr@init{%
|
||||
\avr@flag@init%
|
||||
\avr@reg@init%
|
||||
\avr@pc@init%
|
||||
}
|
||||
|
||||
\newcount\avr@accA
|
||||
\newcount\avr@accB
|
||||
|
||||
|
||||
\def\avr@dump@totex{%
|
||||
SREG:\avr@sreg@get{\@tempa}:='\@tempa' (ITHS VNZC)
|
||||
|
||||
\ttfamily
|
||||
\begin{tabular}{llllllll}
|
||||
r0 :\avr@reg@get{00000}{\@tempa}:= '\@tempa' &
|
||||
r1 :\avr@reg@get{00001}{\@tempa}:= '\@tempa' &
|
||||
r2 :\avr@reg@get{00010}{\@tempa}:= '\@tempa' &
|
||||
r3 :\avr@reg@get{00011}{\@tempa}:= '\@tempa' \\
|
||||
r4 :\avr@reg@get{00100}{\@tempa}:= '\@tempa' &
|
||||
r5 :\avr@reg@get{00101}{\@tempa}:= '\@tempa' &
|
||||
r6 :\avr@reg@get{00110}{\@tempa}:= '\@tempa' &
|
||||
r7 :\avr@reg@get{00111}{\@tempa}:= '\@tempa' \\
|
||||
r8 :\avr@reg@get{01000}{\@tempa}:= '\@tempa' &
|
||||
r9 :\avr@reg@get{01001}{\@tempa}:= '\@tempa' &
|
||||
r10:\avr@reg@get{01010}{\@tempa}:= '\@tempa' &
|
||||
r11:\avr@reg@get{01011}{\@tempa}:= '\@tempa' \\
|
||||
r12:\avr@reg@get{01100}{\@tempa}:= '\@tempa' &
|
||||
r13:\avr@reg@get{01101}{\@tempa}:= '\@tempa' &
|
||||
r14:\avr@reg@get{01110}{\@tempa}:= '\@tempa' &
|
||||
r15:\avr@reg@get{01111}{\@tempa}:= '\@tempa' \\
|
||||
r16:\avr@reg@get{10000}{\@tempa}:= '\@tempa' &
|
||||
r17:\avr@reg@get{10001}{\@tempa}:= '\@tempa' &
|
||||
r18:\avr@reg@get{10010}{\@tempa}:= '\@tempa' &
|
||||
r19:\avr@reg@get{10011}{\@tempa}:= '\@tempa' \\
|
||||
r20:\avr@reg@get{10100}{\@tempa}:= '\@tempa' &
|
||||
r21:\avr@reg@get{10101}{\@tempa}:= '\@tempa' &
|
||||
r22:\avr@reg@get{10110}{\@tempa}:= '\@tempa' &
|
||||
r23:\avr@reg@get{10111}{\@tempa}:= '\@tempa' \\
|
||||
r24:\avr@reg@get{11000}{\@tempa}:= '\@tempa' &
|
||||
r25:\avr@reg@get{11001}{\@tempa}:= '\@tempa' &
|
||||
r26:\avr@reg@get{11010}{\@tempa}:= '\@tempa' &
|
||||
r27:\avr@reg@get{11011}{\@tempa}:= '\@tempa' \\
|
||||
r28:\avr@reg@get{11100}{\@tempa}:= '\@tempa' &
|
||||
r29:\avr@reg@get{11101}{\@tempa}:= '\@tempa' &
|
||||
r30:\avr@reg@get{11110}{\@tempa}:= '\@tempa' &
|
||||
r31:\avr@reg@get{11111}{\@tempa}:= '\@tempa' \\
|
||||
\end{tabular}
|
||||
}
|
||||
|
||||
%% Status Register && Flags
|
||||
\def\avr@flag@set#1#2{% Register Name, Value \in 0,1
|
||||
\csxdef{avr@flag@#1}{#2}\relax%
|
||||
}
|
||||
|
||||
\def\avr@flag@get#1#2{% Register Name, Target Macro
|
||||
\edef#2{\csuse{avr@flag@#1}}%
|
||||
}
|
||||
|
||||
\def\avr@flag@init{%
|
||||
\avr@sreg@set{00000000}%
|
||||
}
|
||||
|
||||
\def\avr@sreg@set#1{% Bitstring
|
||||
\def\avr@sreg@helper##1##2##3##4##5##6##7##8\@nnil{%
|
||||
\avr@flag@set{C}{##8} % Carry
|
||||
\avr@flag@set{Z}{##7} % Zero
|
||||
\avr@flag@set{N}{##6} % Negative
|
||||
\avr@flag@set{V}{##5} % Two's complement overflow indicator
|
||||
\avr@flag@set{S}{##4} % N \xor V, For Signed Tests
|
||||
\avr@flag@set{H}{##3} % Half Carry Flag
|
||||
\avr@flag@set{T}{##2} % Transfer bit
|
||||
\avr@flag@set{I}{##1} % Global Interrupt Enable
|
||||
}%
|
||||
\edef\@tempa{#1}%
|
||||
\expandafter \avr@sreg@helper \@tempa \@nnil%
|
||||
}
|
||||
|
||||
\def\avr@sreg@get#1{% Target Macro
|
||||
\edef#1{%
|
||||
\csuse{avr@flag@I}%
|
||||
\csuse{avr@flag@T}%
|
||||
\csuse{avr@flag@H}%
|
||||
\csuse{avr@flag@S}%
|
||||
\csuse{avr@flag@V}%
|
||||
\csuse{avr@flag@N}%
|
||||
\csuse{avr@flag@Z}%
|
||||
\csuse{avr@flag@C}%
|
||||
}%
|
||||
}
|
||||
|
||||
\def\avr@flags@update#1{%
|
||||
% Negate Flag
|
||||
\avr@bin@msb@get{#1}{\@@X}%
|
||||
\avr@flag@set N \@@X%
|
||||
% Zero Flag
|
||||
\avr@bin@tocount{#1}{\avr@count@tmpa}%
|
||||
\ifnum \avr@count@tmpa = 0%
|
||||
\avr@flag@set Z 1%
|
||||
\else%
|
||||
\avr@flag@set Z 0%
|
||||
\fi%
|
||||
% Signed Flag
|
||||
\avr@flag@get V \@@V%
|
||||
\edef\@@tmp{\avr@bit@xor \@@X \@@V}%
|
||||
\avr@flag@set S \@@V%
|
||||
}
|
||||
|
||||
%% Registers
|
||||
\def\avr@reg@set#1#2{% Bitstring, Register Bitstring
|
||||
\csxdef{avr@reg@#2}{#1}%
|
||||
}
|
||||
|
||||
\def\avr@reg@get#1#2{% Register Bitstring, Target Macro
|
||||
\edef#2{\csuse{avr@reg@#1}}%
|
||||
}
|
||||
|
||||
\def\avr@reg@init{%
|
||||
\avr@reg@set{\avr@zeroes}{00000}%
|
||||
\avr@reg@set{\avr@zeroes}{00001}%
|
||||
\avr@reg@set{\avr@zeroes}{00010}%
|
||||
\avr@reg@set{\avr@zeroes}{00011}%
|
||||
\avr@reg@set{\avr@zeroes}{00100}%
|
||||
\avr@reg@set{\avr@zeroes}{00101}%
|
||||
\avr@reg@set{\avr@zeroes}{00110}%
|
||||
\avr@reg@set{\avr@zeroes}{00111}%
|
||||
\avr@reg@set{\avr@zeroes}{01000}%
|
||||
\avr@reg@set{\avr@zeroes}{01001}%
|
||||
\avr@reg@set{\avr@zeroes}{01010}%
|
||||
\avr@reg@set{\avr@zeroes}{01011}%
|
||||
\avr@reg@set{\avr@zeroes}{01100}%
|
||||
\avr@reg@set{\avr@zeroes}{01101}%
|
||||
\avr@reg@set{\avr@zeroes}{01110}%
|
||||
\avr@reg@set{\avr@zeroes}{01111}%
|
||||
\avr@reg@set{\avr@zeroes}{10000}%
|
||||
\avr@reg@set{\avr@zeroes}{10001}%
|
||||
\avr@reg@set{\avr@zeroes}{10010}%
|
||||
\avr@reg@set{\avr@zeroes}{10011}%
|
||||
\avr@reg@set{\avr@zeroes}{10100}%
|
||||
\avr@reg@set{\avr@zeroes}{10101}%
|
||||
\avr@reg@set{\avr@zeroes}{10110}%
|
||||
\avr@reg@set{\avr@zeroes}{10111}%
|
||||
\avr@reg@set{\avr@zeroes}{11000}%
|
||||
\avr@reg@set{\avr@zeroes}{11001}%
|
||||
\avr@reg@set{\avr@zeroes}{11010}%
|
||||
\avr@reg@set{\avr@zeroes}{11011}%
|
||||
\avr@reg@set{\avr@zeroes}{11100}%
|
||||
\avr@reg@set{\avr@zeroes}{11101}%
|
||||
\avr@reg@set{\avr@zeroes}{11110}%
|
||||
\avr@reg@set{\avr@zeroes}{11111}%
|
||||
}
|
||||
|
||||
\csdef{avr@r0}{00000}
|
||||
\csdef{avr@r1}{00001}
|
||||
\csdef{avr@r2}{00010}
|
||||
\csdef{avr@r3}{00011}
|
||||
\csdef{avr@r4}{00100}
|
||||
\csdef{avr@r5}{00101}
|
||||
\csdef{avr@r6}{00110}
|
||||
\csdef{avr@r7}{00111}
|
||||
\csdef{avr@r8}{01000}
|
||||
\csdef{avr@r9}{01001}
|
||||
\csdef{avr@r10}{01010}
|
||||
\csdef{avr@r11}{01011}
|
||||
\csdef{avr@r12}{01100}
|
||||
\csdef{avr@r13}{01101}
|
||||
\csdef{avr@r14}{01110}
|
||||
\csdef{avr@r15}{01111}
|
||||
\csdef{avr@r16}{10000}
|
||||
\csdef{avr@r17}{10001}
|
||||
\csdef{avr@r18}{10010}
|
||||
\csdef{avr@r19}{10011}
|
||||
\csdef{avr@r20}{10100}
|
||||
\csdef{avr@r21}{10101}
|
||||
\csdef{avr@r22}{10110}
|
||||
\csdef{avr@r23}{10111}
|
||||
\csdef{avr@r24}{11000}
|
||||
\csdef{avr@r25}{11001}
|
||||
\csdef{avr@r26}{11010}
|
||||
\csdef{avr@r27}{11011}
|
||||
\csdef{avr@r28}{11100}
|
||||
\csdef{avr@r29}{11101}
|
||||
\csdef{avr@r30}{11110}
|
||||
\csdef{avr@r31}{11111}
|
||||
|
||||
%% Code
|
||||
\newcount\avr@pc
|
||||
\def\avr@pc@init{%
|
||||
\avr@pc=0%
|
||||
}
|
||||
|
||||
\def\avr@pc@inc{% Increment by one
|
||||
\advance \avr@pc by 1\relax%
|
||||
\avr@count@overflow{\avr@pc}%
|
||||
}
|
||||
|
||||
\def\avr@pc@add#1{% Increment by N
|
||||
\advance \avr@pc by #1\relax%
|
||||
\avr@count@overflow{\avr@pc}%
|
||||
}
|
||||
|
||||
|
||||
\def\avr@code@get#1{% Result Macro
|
||||
\edef#1{\csuse{avr@code@\the\avr@pc}}%
|
||||
}
|
||||
|
||||
\def\avr@code@set#1#2{% OpString (16 Bit), Number
|
||||
\csxdef{avr@code@#2}{#1}%
|
||||
}
|
||||
%% RAM
|
||||
|
||||
|
||||
%%% Local Variables:
|
||||
%%% mode: latex
|
||||
%%% TeX-master: "avr.tex"
|
||||
%%% End:
|
346
avr.numbers.tex
Normal file
346
avr.numbers.tex
Normal file
@ -0,0 +1,346 @@
|
||||
\def\avr@bindec@addmap#1#2{%
|
||||
\csdef{avr@bin@#1}{#2}%
|
||||
\csdef{avr@dec@#2}{#1}%
|
||||
}
|
||||
|
||||
\avr@bindec@addmap{0}{00000000}
|
||||
\avr@bindec@addmap{1}{00000001}
|
||||
\avr@bindec@addmap{2}{00000010}
|
||||
\avr@bindec@addmap{3}{00000011}
|
||||
\avr@bindec@addmap{4}{00000100}
|
||||
\avr@bindec@addmap{5}{00000101}
|
||||
\avr@bindec@addmap{6}{00000110}
|
||||
\avr@bindec@addmap{7}{00000111}
|
||||
\avr@bindec@addmap{8}{00001000}
|
||||
\avr@bindec@addmap{9}{00001001}
|
||||
\avr@bindec@addmap{10}{00001010}
|
||||
\avr@bindec@addmap{11}{00001011}
|
||||
\avr@bindec@addmap{12}{00001100}
|
||||
\avr@bindec@addmap{13}{00001101}
|
||||
\avr@bindec@addmap{14}{00001110}
|
||||
\avr@bindec@addmap{15}{00001111}
|
||||
\avr@bindec@addmap{16}{00010000}
|
||||
\avr@bindec@addmap{17}{00010001}
|
||||
\avr@bindec@addmap{18}{00010010}
|
||||
\avr@bindec@addmap{19}{00010011}
|
||||
\avr@bindec@addmap{20}{00010100}
|
||||
\avr@bindec@addmap{21}{00010101}
|
||||
\avr@bindec@addmap{22}{00010110}
|
||||
\avr@bindec@addmap{23}{00010111}
|
||||
\avr@bindec@addmap{24}{00011000}
|
||||
\avr@bindec@addmap{25}{00011001}
|
||||
\avr@bindec@addmap{26}{00011010}
|
||||
\avr@bindec@addmap{27}{00011011}
|
||||
\avr@bindec@addmap{28}{00011100}
|
||||
\avr@bindec@addmap{29}{00011101}
|
||||
\avr@bindec@addmap{30}{00011110}
|
||||
\avr@bindec@addmap{31}{00011111}
|
||||
\avr@bindec@addmap{32}{00100000}
|
||||
\avr@bindec@addmap{33}{00100001}
|
||||
\avr@bindec@addmap{34}{00100010}
|
||||
\avr@bindec@addmap{35}{00100011}
|
||||
\avr@bindec@addmap{36}{00100100}
|
||||
\avr@bindec@addmap{37}{00100101}
|
||||
\avr@bindec@addmap{38}{00100110}
|
||||
\avr@bindec@addmap{39}{00100111}
|
||||
\avr@bindec@addmap{40}{00101000}
|
||||
\avr@bindec@addmap{41}{00101001}
|
||||
\avr@bindec@addmap{42}{00101010}
|
||||
\avr@bindec@addmap{43}{00101011}
|
||||
\avr@bindec@addmap{44}{00101100}
|
||||
\avr@bindec@addmap{45}{00101101}
|
||||
\avr@bindec@addmap{46}{00101110}
|
||||
\avr@bindec@addmap{47}{00101111}
|
||||
\avr@bindec@addmap{48}{00110000}
|
||||
\avr@bindec@addmap{49}{00110001}
|
||||
\avr@bindec@addmap{50}{00110010}
|
||||
\avr@bindec@addmap{51}{00110011}
|
||||
\avr@bindec@addmap{52}{00110100}
|
||||
\avr@bindec@addmap{53}{00110101}
|
||||
\avr@bindec@addmap{54}{00110110}
|
||||
\avr@bindec@addmap{55}{00110111}
|
||||
\avr@bindec@addmap{56}{00111000}
|
||||
\avr@bindec@addmap{57}{00111001}
|
||||
\avr@bindec@addmap{58}{00111010}
|
||||
\avr@bindec@addmap{59}{00111011}
|
||||
\avr@bindec@addmap{60}{00111100}
|
||||
\avr@bindec@addmap{61}{00111101}
|
||||
\avr@bindec@addmap{62}{00111110}
|
||||
\avr@bindec@addmap{63}{00111111}
|
||||
\avr@bindec@addmap{64}{01000000}
|
||||
\avr@bindec@addmap{65}{01000001}
|
||||
\avr@bindec@addmap{66}{01000010}
|
||||
\avr@bindec@addmap{67}{01000011}
|
||||
\avr@bindec@addmap{68}{01000100}
|
||||
\avr@bindec@addmap{69}{01000101}
|
||||
\avr@bindec@addmap{70}{01000110}
|
||||
\avr@bindec@addmap{71}{01000111}
|
||||
\avr@bindec@addmap{72}{01001000}
|
||||
\avr@bindec@addmap{73}{01001001}
|
||||
\avr@bindec@addmap{74}{01001010}
|
||||
\avr@bindec@addmap{75}{01001011}
|
||||
\avr@bindec@addmap{76}{01001100}
|
||||
\avr@bindec@addmap{77}{01001101}
|
||||
\avr@bindec@addmap{78}{01001110}
|
||||
\avr@bindec@addmap{79}{01001111}
|
||||
\avr@bindec@addmap{80}{01010000}
|
||||
\avr@bindec@addmap{81}{01010001}
|
||||
\avr@bindec@addmap{82}{01010010}
|
||||
\avr@bindec@addmap{83}{01010011}
|
||||
\avr@bindec@addmap{84}{01010100}
|
||||
\avr@bindec@addmap{85}{01010101}
|
||||
\avr@bindec@addmap{86}{01010110}
|
||||
\avr@bindec@addmap{87}{01010111}
|
||||
\avr@bindec@addmap{88}{01011000}
|
||||
\avr@bindec@addmap{89}{01011001}
|
||||
\avr@bindec@addmap{90}{01011010}
|
||||
\avr@bindec@addmap{91}{01011011}
|
||||
\avr@bindec@addmap{92}{01011100}
|
||||
\avr@bindec@addmap{93}{01011101}
|
||||
\avr@bindec@addmap{94}{01011110}
|
||||
\avr@bindec@addmap{95}{01011111}
|
||||
\avr@bindec@addmap{96}{01100000}
|
||||
\avr@bindec@addmap{97}{01100001}
|
||||
\avr@bindec@addmap{98}{01100010}
|
||||
\avr@bindec@addmap{99}{01100011}
|
||||
\avr@bindec@addmap{100}{01100100}
|
||||
\avr@bindec@addmap{101}{01100101}
|
||||
\avr@bindec@addmap{102}{01100110}
|
||||
\avr@bindec@addmap{103}{01100111}
|
||||
\avr@bindec@addmap{104}{01101000}
|
||||
\avr@bindec@addmap{105}{01101001}
|
||||
\avr@bindec@addmap{106}{01101010}
|
||||
\avr@bindec@addmap{107}{01101011}
|
||||
\avr@bindec@addmap{108}{01101100}
|
||||
\avr@bindec@addmap{109}{01101101}
|
||||
\avr@bindec@addmap{110}{01101110}
|
||||
\avr@bindec@addmap{111}{01101111}
|
||||
\avr@bindec@addmap{112}{01110000}
|
||||
\avr@bindec@addmap{113}{01110001}
|
||||
\avr@bindec@addmap{114}{01110010}
|
||||
\avr@bindec@addmap{115}{01110011}
|
||||
\avr@bindec@addmap{116}{01110100}
|
||||
\avr@bindec@addmap{117}{01110101}
|
||||
\avr@bindec@addmap{118}{01110110}
|
||||
\avr@bindec@addmap{119}{01110111}
|
||||
\avr@bindec@addmap{120}{01111000}
|
||||
\avr@bindec@addmap{121}{01111001}
|
||||
\avr@bindec@addmap{122}{01111010}
|
||||
\avr@bindec@addmap{123}{01111011}
|
||||
\avr@bindec@addmap{124}{01111100}
|
||||
\avr@bindec@addmap{125}{01111101}
|
||||
\avr@bindec@addmap{126}{01111110}
|
||||
\avr@bindec@addmap{127}{01111111}
|
||||
\avr@bindec@addmap{128}{10000000}
|
||||
\avr@bindec@addmap{129}{10000001}
|
||||
\avr@bindec@addmap{130}{10000010}
|
||||
\avr@bindec@addmap{131}{10000011}
|
||||
\avr@bindec@addmap{132}{10000100}
|
||||
\avr@bindec@addmap{133}{10000101}
|
||||
\avr@bindec@addmap{134}{10000110}
|
||||
\avr@bindec@addmap{135}{10000111}
|
||||
\avr@bindec@addmap{136}{10001000}
|
||||
\avr@bindec@addmap{137}{10001001}
|
||||
\avr@bindec@addmap{138}{10001010}
|
||||
\avr@bindec@addmap{139}{10001011}
|
||||
\avr@bindec@addmap{140}{10001100}
|
||||
\avr@bindec@addmap{141}{10001101}
|
||||
\avr@bindec@addmap{142}{10001110}
|
||||
\avr@bindec@addmap{143}{10001111}
|
||||
\avr@bindec@addmap{144}{10010000}
|
||||
\avr@bindec@addmap{145}{10010001}
|
||||
\avr@bindec@addmap{146}{10010010}
|
||||
\avr@bindec@addmap{147}{10010011}
|
||||
\avr@bindec@addmap{148}{10010100}
|
||||
\avr@bindec@addmap{149}{10010101}
|
||||
\avr@bindec@addmap{150}{10010110}
|
||||
\avr@bindec@addmap{151}{10010111}
|
||||
\avr@bindec@addmap{152}{10011000}
|
||||
\avr@bindec@addmap{153}{10011001}
|
||||
\avr@bindec@addmap{154}{10011010}
|
||||
\avr@bindec@addmap{155}{10011011}
|
||||
\avr@bindec@addmap{156}{10011100}
|
||||
\avr@bindec@addmap{157}{10011101}
|
||||
\avr@bindec@addmap{158}{10011110}
|
||||
\avr@bindec@addmap{159}{10011111}
|
||||
\avr@bindec@addmap{160}{10100000}
|
||||
\avr@bindec@addmap{161}{10100001}
|
||||
\avr@bindec@addmap{162}{10100010}
|
||||
\avr@bindec@addmap{163}{10100011}
|
||||
\avr@bindec@addmap{164}{10100100}
|
||||
\avr@bindec@addmap{165}{10100101}
|
||||
\avr@bindec@addmap{166}{10100110}
|
||||
\avr@bindec@addmap{167}{10100111}
|
||||
\avr@bindec@addmap{168}{10101000}
|
||||
\avr@bindec@addmap{169}{10101001}
|
||||
\avr@bindec@addmap{170}{10101010}
|
||||
\avr@bindec@addmap{171}{10101011}
|
||||
\avr@bindec@addmap{172}{10101100}
|
||||
\avr@bindec@addmap{173}{10101101}
|
||||
\avr@bindec@addmap{174}{10101110}
|
||||
\avr@bindec@addmap{175}{10101111}
|
||||
\avr@bindec@addmap{176}{10110000}
|
||||
\avr@bindec@addmap{177}{10110001}
|
||||
\avr@bindec@addmap{178}{10110010}
|
||||
\avr@bindec@addmap{179}{10110011}
|
||||
\avr@bindec@addmap{180}{10110100}
|
||||
\avr@bindec@addmap{181}{10110101}
|
||||
\avr@bindec@addmap{182}{10110110}
|
||||
\avr@bindec@addmap{183}{10110111}
|
||||
\avr@bindec@addmap{184}{10111000}
|
||||
\avr@bindec@addmap{185}{10111001}
|
||||
\avr@bindec@addmap{186}{10111010}
|
||||
\avr@bindec@addmap{187}{10111011}
|
||||
\avr@bindec@addmap{188}{10111100}
|
||||
\avr@bindec@addmap{189}{10111101}
|
||||
\avr@bindec@addmap{190}{10111110}
|
||||
\avr@bindec@addmap{191}{10111111}
|
||||
\avr@bindec@addmap{192}{11000000}
|
||||
\avr@bindec@addmap{193}{11000001}
|
||||
\avr@bindec@addmap{194}{11000010}
|
||||
\avr@bindec@addmap{195}{11000011}
|
||||
\avr@bindec@addmap{196}{11000100}
|
||||
\avr@bindec@addmap{197}{11000101}
|
||||
\avr@bindec@addmap{198}{11000110}
|
||||
\avr@bindec@addmap{199}{11000111}
|
||||
\avr@bindec@addmap{200}{11001000}
|
||||
\avr@bindec@addmap{201}{11001001}
|
||||
\avr@bindec@addmap{202}{11001010}
|
||||
\avr@bindec@addmap{203}{11001011}
|
||||
\avr@bindec@addmap{204}{11001100}
|
||||
\avr@bindec@addmap{205}{11001101}
|
||||
\avr@bindec@addmap{206}{11001110}
|
||||
\avr@bindec@addmap{207}{11001111}
|
||||
\avr@bindec@addmap{208}{11010000}
|
||||
\avr@bindec@addmap{209}{11010001}
|
||||
\avr@bindec@addmap{210}{11010010}
|
||||
\avr@bindec@addmap{211}{11010011}
|
||||
\avr@bindec@addmap{212}{11010100}
|
||||
\avr@bindec@addmap{213}{11010101}
|
||||
\avr@bindec@addmap{214}{11010110}
|
||||
\avr@bindec@addmap{215}{11010111}
|
||||
\avr@bindec@addmap{216}{11011000}
|
||||
\avr@bindec@addmap{217}{11011001}
|
||||
\avr@bindec@addmap{218}{11011010}
|
||||
\avr@bindec@addmap{219}{11011011}
|
||||
\avr@bindec@addmap{220}{11011100}
|
||||
\avr@bindec@addmap{221}{11011101}
|
||||
\avr@bindec@addmap{222}{11011110}
|
||||
\avr@bindec@addmap{223}{11011111}
|
||||
\avr@bindec@addmap{224}{11100000}
|
||||
\avr@bindec@addmap{225}{11100001}
|
||||
\avr@bindec@addmap{226}{11100010}
|
||||
\avr@bindec@addmap{227}{11100011}
|
||||
\avr@bindec@addmap{228}{11100100}
|
||||
\avr@bindec@addmap{229}{11100101}
|
||||
\avr@bindec@addmap{230}{11100110}
|
||||
\avr@bindec@addmap{231}{11100111}
|
||||
\avr@bindec@addmap{232}{11101000}
|
||||
\avr@bindec@addmap{233}{11101001}
|
||||
\avr@bindec@addmap{234}{11101010}
|
||||
\avr@bindec@addmap{235}{11101011}
|
||||
\avr@bindec@addmap{236}{11101100}
|
||||
\avr@bindec@addmap{237}{11101101}
|
||||
\avr@bindec@addmap{238}{11101110}
|
||||
\avr@bindec@addmap{239}{11101111}
|
||||
\avr@bindec@addmap{240}{11110000}
|
||||
\avr@bindec@addmap{241}{11110001}
|
||||
\avr@bindec@addmap{242}{11110010}
|
||||
\avr@bindec@addmap{243}{11110011}
|
||||
\avr@bindec@addmap{244}{11110100}
|
||||
\avr@bindec@addmap{245}{11110101}
|
||||
\avr@bindec@addmap{246}{11110110}
|
||||
\avr@bindec@addmap{247}{11110111}
|
||||
\avr@bindec@addmap{248}{11111000}
|
||||
\avr@bindec@addmap{249}{11111001}
|
||||
\avr@bindec@addmap{250}{11111010}
|
||||
\avr@bindec@addmap{251}{11111011}
|
||||
\avr@bindec@addmap{252}{11111100}
|
||||
\avr@bindec@addmap{253}{11111101}
|
||||
\avr@bindec@addmap{254}{11111110}
|
||||
\avr@bindec@addmap{255}{11111111}
|
||||
|
||||
\newcount\avr@count@tmpa
|
||||
\newcount\avr@count@tmpb
|
||||
|
||||
% \avr@count@tobin@b uint8_t count|integer, \result -> \result = bin(arg)
|
||||
\def\avr@count@tobin@b#1#2{%
|
||||
\ifnum #1 > 255 %
|
||||
\avr@error{#1 to large value}%
|
||||
\fi%
|
||||
\ifnum #1 < 0 %
|
||||
\avr@error{#1 to small value}%
|
||||
\fi%
|
||||
\avr@count@tmpa=#1%
|
||||
\ifcsdef{avr@bin@\the\avr@count@tmpa}{}{%
|
||||
\avr@error{Incorrect Number: #1}%
|
||||
}%
|
||||
\edef#2{\csuse{avr@bin@\the\avr@count@tmpa}}%
|
||||
}
|
||||
|
||||
% \avr@count@tobin@w uint16_t count|integer, \result -> \result = bin(arg)
|
||||
\def\avr@count@tobin@w#1#2{%
|
||||
\ifnum #1 > 65535 %
|
||||
\avr@error{#1 to large value}%
|
||||
\fi%
|
||||
\ifnum #1 < 0 %
|
||||
\avr@error{#1 to small value}%
|
||||
\fi%
|
||||
\avr@count@tmpa=#1%
|
||||
\avr@count@tmpb=\avr@count@tmpa%
|
||||
\divide\avr@count@tmpa by 256\relax%
|
||||
\multiply\avr@count@tmpa by 256\relax%
|
||||
\advance\avr@count@tmpb by -\avr@count@tmpa\relax%
|
||||
\divide\avr@count@tmpa by 256\relax%
|
||||
\ifcsdef{avr@bin@\the\avr@count@tmpa}{}{%
|
||||
\avr@error{Incorrect Number: #1}%
|
||||
}%
|
||||
\ifcsdef{avr@bin@\the\avr@count@tmpb}{}{%
|
||||
\avr@error{Incorrect Number: #1}%
|
||||
}%
|
||||
\edef#2{\csuse{avr@bin@\the\avr@count@tmpa}\csuse{avr@bin@\the\avr@count@tmpb}}%
|
||||
}
|
||||
|
||||
|
||||
\def\avr@bin@tocount#1#2{% BitString Counter
|
||||
\avr@count@tmpa=0%
|
||||
\edef\@tempa{#1}%
|
||||
\expandafter\avr@bin@tocount@helper\@tempa\@nnil%
|
||||
#2=\avr@count@tmpa%
|
||||
}
|
||||
\def\avr@bin@tocount@helper#1#2#3#4#5#6#7#8#9\@nnil{%
|
||||
\multiply\avr@count@tmpa by 256\relax%
|
||||
\ifcsdef{avr@dec@#1#2#3#4#5#6#7#8}{}{%
|
||||
\avr@error{Incorrect Number: #1}%
|
||||
}%
|
||||
\advance\avr@count@tmpa by \csuse{avr@dec@#1#2#3#4#5#6#7#8}%
|
||||
\if	&\else%
|
||||
\avr@bin@tocount@helper #9\@nnil%
|
||||
\fi%
|
||||
}
|
||||
|
||||
\def\avr@count@overflow#1{%
|
||||
\def\avr@count@overflow@flag{0}%
|
||||
\ifnum #1 < 0%
|
||||
#1=65535%
|
||||
\def\avr@count@overflow@flag{1}%
|
||||
\fi%
|
||||
\ifnum #1 > 65535%
|
||||
#1=0%
|
||||
\def\avr@count@overflow@flag{1}%
|
||||
\fi%
|
||||
}
|
||||
|
||||
\def\avr@count@modulo@byte#1{%
|
||||
\avr@count@tmpa=#1%
|
||||
\divide \avr@count@tmpa by 256%
|
||||
\multiply \avr@count@tmpa by 256%
|
||||
\advance #1 by -\avr@count@tmpa%
|
||||
}
|
||||
|
||||
|
||||
|
||||
%%% Local Variables:
|
||||
%%% mode: latex
|
||||
%%% TeX-master: t
|
||||
%%% End:
|
178
avr.testsuite.tex
Normal file
178
avr.testsuite.tex
Normal file
@ -0,0 +1,178 @@
|
||||
%% This is the test suite for my avr Implementation
|
||||
\def\avr@test@setup#1{%
|
||||
\typeout{---- Test: #1 ----}%
|
||||
\typeout{-> Initialize the AVR}%
|
||||
\avr@init%
|
||||
}
|
||||
|
||||
\def\avr@test@SREG#1{% Tests SREG for value
|
||||
\avr@sreg@get{\@@SREG}%
|
||||
\expandafter\ifstrequal\expandafter{\@@SREG}{#1}{%Success
|
||||
}{%
|
||||
\avr@error{SREG unequal: #1 != \@@SREG}%
|
||||
}%
|
||||
}
|
||||
|
||||
\def\avr@test@REG#1#2{% Tests SREG for value
|
||||
\avr@reg@get{\csuse{avr@#1}}{\@@REG}%
|
||||
\expandafter\ifstrequal\expandafter{\@@REG}{#2}{%Success
|
||||
}{%
|
||||
\avr@error{REG unequal: #2 != \@@REG}%
|
||||
}%
|
||||
}
|
||||
|
||||
% Hook Macro for the tests
|
||||
\def\avr@test{}
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
\def\avr@test@ADD{%
|
||||
\def\avr@test@helper##1##2{%
|
||||
\avr@test@setup{ADD: ##1+##2}%
|
||||
\avr@instr@LDI{0}{\csuse{avr@r31}}{##1}%
|
||||
\avr@instr@LDI{1}{\csuse{avr@r17}}{##2}%
|
||||
\avr@instr@ADD{2}{\csuse{avr@r17}}{\csuse{avr@r31}}%
|
||||
\avr@instr@stepn{3}%
|
||||
}%
|
||||
\avr@test@helper{00000000}{00000001}%
|
||||
\avr@test@SREG{00000000}%
|
||||
\avr@test@REG{r17}{00000001}%
|
||||
% Test Zero Flag
|
||||
\avr@test@helper{00000000}{00000000}%
|
||||
\avr@test@SREG{00000010}%
|
||||
\avr@test@REG{r17}{00000000}%
|
||||
% Test Carry and Half Carry
|
||||
\avr@test@helper{11111111}{00000010}%
|
||||
\avr@test@SREG{00100001}%
|
||||
\avr@test@REG{r17}{00000001}%
|
||||
% Test V
|
||||
\avr@test@helper{10000000}{10000000}%
|
||||
\avr@test@REG{r17}{00000000}%
|
||||
\avr@test@SREG{00011011}%
|
||||
}
|
||||
\appto\avr@test{\avr@test@ADD}
|
||||
|
||||
\def\avr@test@ADC{%
|
||||
\def\avr@test@helper##1##2##3##4{%
|
||||
\avr@test@setup{ADD: (##1:##2) + (##3:##4)}%
|
||||
\avr@instr@LDI{0}{\csuse{avr@r30}}{##1}%
|
||||
\avr@instr@LDI{1}{\csuse{avr@r31}}{##2}%
|
||||
\avr@instr@LDI{2}{\csuse{avr@r17}}{##3}%
|
||||
\avr@instr@LDI{3}{\csuse{avr@r18}}{##4}%
|
||||
\avr@instr@ADD{4}{\csuse{avr@r18}}{\csuse{avr@r31}}%
|
||||
\avr@instr@ADC{5}{\csuse{avr@r17}}{\csuse{avr@r30}}%
|
||||
\avr@instr@stepn{6}%
|
||||
}%
|
||||
\avr@test@helper{00000000}{10000001}{00000000}{10000000}%
|
||||
\avr@test@REG{r17}{00000001}%
|
||||
\avr@test@SREG{00000000}%
|
||||
|
||||
\avr@test@helper{00000011}{10000001}{00001100}{10000000}%
|
||||
\avr@test@REG{r17}{00010000}%
|
||||
\avr@test@SREG{00100000}%
|
||||
|
||||
}
|
||||
\appto\avr@test{\avr@test@ADC}
|
||||
|
||||
\def\avr@test@SUB{%
|
||||
\def\avr@test@helper##1##2{%
|
||||
\avr@test@setup{SUB: ##1 - ##2}%
|
||||
\avr@instr@LDI{0}{\csuse{avr@r17}}{##1}%
|
||||
\avr@instr@LDI{1}{\csuse{avr@r31}}{##2}%
|
||||
\avr@instr@SUB{2}{\csuse{avr@r17}}{\csuse{avr@r31}}%
|
||||
\avr@instr@stepn{3}%
|
||||
}%
|
||||
\avr@test@helper{00001111}{00000010}%
|
||||
\avr@test@REG{r17}{00001101}%
|
||||
\avr@test@SREG{00000000}%
|
||||
|
||||
\avr@test@helper{00001111}{00010000}%
|
||||
\avr@test@REG{r17}{11111111}%
|
||||
\avr@test@SREG{00000101}%
|
||||
}
|
||||
\appto\avr@test{\avr@test@SUB}
|
||||
|
||||
\def\avr@test@SBC{%
|
||||
\def\avr@test@helper##1##2##3##4{%
|
||||
\avr@test@setup{SBC: (##1:##2) - (##3:##4)}%
|
||||
\avr@instr@LDI{0}{\csuse{avr@r30}}{##3}%
|
||||
\avr@instr@LDI{1}{\csuse{avr@r31}}{##4}%
|
||||
\avr@instr@LDI{2}{\csuse{avr@r17}}{##1}%
|
||||
\avr@instr@LDI{3}{\csuse{avr@r18}}{##2}%
|
||||
\avr@instr@SUB{4}{\csuse{avr@r18}}{\csuse{avr@r31}}%
|
||||
\avr@instr@SBC{5}{\csuse{avr@r17}}{\csuse{avr@r30}}%
|
||||
\avr@instr@stepn{6}%
|
||||
}%
|
||||
\avr@test@helper{00000000}{10000001}{00000000}{10000001}%
|
||||
\avr@test@REG{r17}{00000000}%
|
||||
\avr@test@REG{r18}{00000000}%
|
||||
\avr@test@SREG{00000010}%
|
||||
|
||||
\avr@test@helper{00000000}{00000000}{00000000}{00000001}%
|
||||
\avr@test@REG{r17}{11111111}%
|
||||
\avr@test@REG{r18}{11111111}%
|
||||
\avr@test@SREG{00100101}%
|
||||
|
||||
\avr@test@helper{00000000}{10000000}{00000000}{00000001}%
|
||||
\avr@test@REG{r17}{00000000}%
|
||||
\avr@test@REG{r18}{01111111}%
|
||||
\avr@test@SREG{00000010}%
|
||||
}
|
||||
\appto\avr@test{\avr@test@SBC}
|
||||
|
||||
\def\avr@test@BRB{%
|
||||
\def\avr@test@helper##1##2##3{%
|
||||
\avr@test@setup{BRB: ##1+##2 => PC+2}%
|
||||
\avr@instr@LDI{0}{\csuse{avr@r30}}{##1}%
|
||||
\avr@instr@LDI{1}{\csuse{avr@r31}}{##2}%
|
||||
\avr@instr@ADD{2}{\csuse{avr@r30}}{\csuse{avr@r31}}%
|
||||
\@@BRB{3}{##3}{1}%
|
||||
\avr@instr@LDI{4}{\csuse{avr@r31}}{11001100}%
|
||||
\avr@instr@LDI{5}{\csuse{avr@r20}}{00000000}%
|
||||
\avr@instr@stepn{5}%
|
||||
}%
|
||||
% Check for cleared flag
|
||||
\def\@@BRB{\avr@instr@BRBC}
|
||||
|
||||
\avr@test@helper{10000000}{10000000}{000}%
|
||||
\avr@test@REG{r31}{11001100}%
|
||||
|
||||
\avr@test@helper{10000000}{00000001}{000}%
|
||||
\avr@test@REG{r31}{00000001}%
|
||||
|
||||
% Check for SET flag
|
||||
\def\@@BRB{\avr@instr@BRBS}
|
||||
|
||||
\avr@test@helper{10000000}{10000000}{000}%
|
||||
\avr@test@REG{r31}{10000000}%
|
||||
|
||||
\avr@test@helper{10000000}{10000001}{100}%
|
||||
\avr@test@REG{r31}{10000001}%
|
||||
}
|
||||
\preto\avr@test{\avr@test@BRB}
|
||||
|
||||
\def\avr@test@fibonacci{%
|
||||
\avr@test@setup{Fibonacci -- fib(8)=21}%
|
||||
\avr@instr@LDI{0}{\csuse{avr@r30}}{00000001}%
|
||||
\avr@instr@LDI{1}{\csuse{avr@r31}}{00000001}%
|
||||
\avr@instr@LDI{2}{\csuse{avr@r20}}{00000101}%
|
||||
\avr@instr@LDI{3}{\csuse{avr@r21}}{00000001}%
|
||||
% tmp = x
|
||||
\avr@instr@MOV{4}{\csuse{avr@r29}}{\csuse{avr@r30}}%
|
||||
% x = x + y
|
||||
\avr@instr@ADD{5}{\csuse{avr@r30}}{\csuse{avr@r31}}%
|
||||
% y = tmp
|
||||
\avr@instr@MOV{6}{\csuse{avr@r31}}{\csuse{avr@r29}}%
|
||||
% i--
|
||||
\avr@instr@SUB{7}{\csuse{avr@r20}}{\csuse{avr@r21}}%
|
||||
\avr@instr@BRPL{8}{-5}
|
||||
\avr@instr@BREAK{9}
|
||||
|
||||
\avr@instr@stepn{100}%
|
||||
\avr@test@REG{r30}{00010101}
|
||||
}
|
||||
\preto\avr@test{\avr@test@fibonacci}
|
||||
|
||||
%%% Local Variables:
|
||||
%%% mode: latex
|
||||
%%% TeX-master: "avr.tex"
|
||||
%%% End:
|
96
avr.tex
Normal file
96
avr.tex
Normal file
@ -0,0 +1,96 @@
|
||||
\documentclass{article}
|
||||
|
||||
\usepackage{etoolbox}
|
||||
\usepackage{tabularx}
|
||||
\parindent=0pt
|
||||
|
||||
\makeatletter
|
||||
|
||||
|
||||
|
||||
\errorcontextlines=23
|
||||
|
||||
\input{avr.numbers}
|
||||
\input{avr.bitops}
|
||||
\input{avr.memory}
|
||||
\input{avr.instr}
|
||||
\input{avr.testsuite}
|
||||
|
||||
|
||||
\begin{document}
|
||||
|
||||
\makeatletter
|
||||
|
||||
% \avr@acc=44
|
||||
% \avr@count@tobin@b{\avr@acc}{\foo}
|
||||
% \foo
|
||||
%
|
||||
% \avr@acc=257
|
||||
% \avr@count@tobin@w{\avr@acc}{\foo}
|
||||
% \avr@bin@negate{\foo}{\foo}
|
||||
% \avr@bin@tocount{\foo}{\avr@acc}
|
||||
% \foo=\the\avr@acc
|
||||
%
|
||||
% \avr@count@tobin@w{18245}{\foo}
|
||||
% \avr@bin@tocount{\foo}{\avr@acc}
|
||||
% \foo=\the\avr@acc
|
||||
%
|
||||
% \avr@acc=128
|
||||
% \avr@count@tobin@b{\avr@acc}{\foo}
|
||||
% :\avr@bin@or{\foo}{00001100}{\foo};
|
||||
% :\avr@bin@btw@sign{\foo}{\foo};
|
||||
% :\avr@bin@wtb{\foo}{\foo};
|
||||
% :\avr@bin@and{00001111}{\foo}{\foo};
|
||||
%
|
||||
% \foo
|
||||
%
|
||||
% :\avr@bin@shiftleft{\foo}{1}{\foo}{\carry};\carry+\foo+\\
|
||||
% :\avr@bin@shiftleft{\foo}{1}{\foo}{\carry};\carry+\foo+\\
|
||||
% :\avr@bin@shiftleft{\foo}{1}{\foo}{\carry};\carry+\foo+\\
|
||||
% :\avr@bin@shiftleft{\foo}{1}{\foo}{\carry};\carry+\foo+\\
|
||||
% :\avr@bin@shiftleft{\foo}{1}{\foo}{\carry};\carry+\foo+\\
|
||||
%
|
||||
% :\avr@bin@shiftright{\foo}{1}{\foo}{\carry};\carry+\foo+\\
|
||||
% :\avr@bin@shiftright{\foo}{1}{\foo}{\carry};\carry+\foo+\\
|
||||
% :\avr@bin@shiftright{\foo}{1}{\foo}{\carry};\carry+\foo+\\
|
||||
% :\avr@bin@shiftright{\foo}{1}{\foo}{\carry};\carry+\foo+\\
|
||||
% :\avr@bin@shiftright{\foo}{1}{\foo}{\carry};\carry+\foo+\\
|
||||
% :\avr@bin@shiftright{\foo}{1}{\foo}{\carry};\carry+\foo+\\
|
||||
% :\avr@bin@shiftright{\foo}{1}{\foo}{\carry};\carry+\foo+\\
|
||||
% :\avr@bin@shiftright{\foo}{1}{\foo}{\carry};\carry+\foo+\\
|
||||
%
|
||||
% :\avr@bin@or{\foo}{10000001}{\foo};\foo\\
|
||||
% :\avr@bin@shiftright@arith{\foo}{1}{\foo}{\carry};\carry+\foo+\\
|
||||
% :\avr@bin@shiftright@arith{\foo}{2}{\foo}{\carry};\carry+\foo+\\
|
||||
% :\avr@bin@shiftright@arith{\foo}{1}{\foo}{\carry};\carry+\foo+\\
|
||||
%
|
||||
% :\def\foo{10000001};\foo\\
|
||||
% :\avr@bin@shiftright@barrel{\foo}{1}{\foo}{\carry};\carry+\foo+\\
|
||||
% :\avr@bin@shiftright@barrel{\foo}{1}{\foo}{\carry};\carry+\foo+\\
|
||||
% :\avr@bin@shiftright@barrel{\foo}{1}{\foo}{\carry};\carry+\foo+\\
|
||||
% :\avr@bin@shiftleft@barrel{\foo}{1}{\foo}{\carry};\carry+\foo+\\
|
||||
% :\avr@bin@shiftleft@barrel{\foo}{2}{\foo}{\carry};\carry+\foo+\\
|
||||
|
||||
\avr@test
|
||||
% \avr@init
|
||||
|
||||
|
||||
% \avr@instr@LDI{0}{\csuse{avr@r31}}{10001100}
|
||||
% \avr@instr@LDI{1}{\csuse{avr@r17}}{10111111}
|
||||
% \avr@instr@ADD{2}{\csuse{avr@r17}}{\csuse{avr@r31}}
|
||||
|
||||
% \avr@instr@step
|
||||
% \avr@instr@step
|
||||
|
||||
% \avr@dump@totex
|
||||
|
||||
% \avr@instr@step
|
||||
|
||||
% \avr@dump@totex
|
||||
|
||||
\end{document}
|
||||
|
||||
%%% Local Variables:
|
||||
%%% mode: latex
|
||||
%%% TeX-master: t
|
||||
%%% End:
|
Loading…
Reference in New Issue
Block a user