First Compiled and Executed Fibonacci
This commit is contained in:
Christian Dietrich
parent
b76e301213
commit
35427842d8
@ -62,6 +62,7 @@
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}
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\newcommand{\avrloadc}[2][-Os -mmcu=atmega8]{%
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\avr@init%
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\avr@compile{#2}{#1}%
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\avr@ihex@load{#2.hex}%
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}
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@ -103,15 +103,22 @@
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\xdef#2{\@tmpa\@tmpa\@tmpa\@tmpa\@tmpa\@tmpa\@tmpa\@tmpa#1}%
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}
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\def\avr@bin@wtb@helper#1#2#3#4#5#6#7#8#9\@nnil{%
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#9%
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\def\avr@bin@word@low#1#2{%
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\edef\@tempa{#1}%
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\edef#2{\expandafter\avr@bin@word@low@helper\@tempa\@nnil}%
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}
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\def\avr@bin@word@low@helper#1#2#3#4#5#6#7#8#9\@nnil{#9}
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\def\avr@bin@word@high#1#2{%
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\edef\@tempa{#1}%
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\edef#2{\expandafter\avr@bin@word@high@helper\@tempa\@nnil}%
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}
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\def\avr@bin@word@high@helper#1#2#3#4#5#6#7#8#9\@nnil{%
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#1#2#3#4#5#6#7#8%
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}
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% \avr@bin@wtb bs:word, \result = ((uint8_t) bs)
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\def\avr@bin@wtb#1#2{%
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\edef\@tempa{#1}%
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\edef#2{\expandafter\avr@bin@wtb@helper\@tempa\@nnil}%
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}
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\def\avr@bin@wtb{\avr@bin@word@low}
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% \avr@bin@shiftleft bs:(byte|word), count, \result, \carry
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% -> \result = bs << count; \carry = (bs >> count) & 1
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177
avr.instr.tex
177
avr.instr.tex
@ -3,14 +3,17 @@
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}
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\def\avr@error#1{%
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\typeout{#1}\bye%
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\errmessage{\the\avr@pc: #1}\bye%
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}
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% Execution Engine
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\def\avr@instr@step{%
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\avr@code@get{\avr@instr@current}%
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%\avr@debug{\avr@instr@current}%
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%\avr@reg@get{\csuse{avr@r24}}{\@@A}%
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%\avr@reg@get{\csuse{avr@r28}}{\@@B}%
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%\avr@reg@get{\csuse{avr@r29}}{\@@C}%
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%\avr@debug{{r24=\@@A} {r28=\@@B} {r29=\@@C}}%
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% Dispatch Instruction by prefix
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\expandafter\avr@instr@dispatch\avr@instr@current\@nnil%
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\relax%
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@ -76,7 +79,9 @@
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% Match also from end for these prefixes
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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\csdef{avr@instr@1001010}{\avr@instr@matchend{1001010}}
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% POP/PUSH
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\csdef{avr@instr@1001000}{\avr@instr@matchend{1001000}}
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\csdef{avr@instr@1001001}{\avr@instr@matchend{1001001}}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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@ -109,7 +114,6 @@
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\avr@reg@get{#2#3#4#5#6}{\avr@Rd}%
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\avr@debug{ADD - \%#2#3#4#5#6 <- #2#3#4#5#6 + \%#1#7}%
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\avr@debug{ADD - \avr@Rd <- \avr@Rd + \avr@Rr}%
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\def\avr@instr@adder@RrPreprocess{\avr@bit@id}%
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\csuse{avr@instr@adder@helper}%
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\avr@reg@set{\avr@Rx}{#2#3#4#5#6}%
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\avr@pc@inc%
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@ -124,7 +128,6 @@
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\avr@flag@get C \avr@instr@extracarry%
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\avr@debug{ADC - \%#2#3#4#5#6 <- #2#3#4#5#6 + \%#1#7}%
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\avr@debug{ADC - \avr@Rd <- \avr@Rd + \avr@Rr + \avr@instr@extracarry}%
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\def\avr@instr@adder@RrPreprocess{\avr@bit@id}%
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\csuse{avr@instr@adder@helper}%
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% Set the result register
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\avr@reg@set{\avr@Rx}{#2#3#4#5#6}%
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@ -139,8 +142,7 @@
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\def\avr@instr@extracarry{1}%
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\avr@debug{SUB - \%#2#3#4#5#6 <- #2#3#4#5#6 + \%#1#7}%
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\avr@debug{SUB - \avr@Rd <- \avr@Rd - \avr@Rr}%
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\def\avr@instr@adder@RrPreprocess{\avr@bit@negate}%
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\csuse{avr@instr@adder@helper}%
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\csuse{avr@instr@subber@helper}%
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% Set the result register
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\avr@reg@set{\avr@Rx}{#2#3#4#5#6}%
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\avr@pc@inc%
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@ -154,8 +156,7 @@
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\xdef \avr@instr@extracarry {\avr@bit@negate \@@carry}%
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\avr@debug{SBC - \%#2#3#4#5#6 <- #2#3#4#5#6 + \%#1#7}%
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\avr@debug{SBC - \avr@Rd <- \avr@Rd - \avr@Rr - \@@carry}%
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\def\avr@instr@adder@RrPreprocess{\avr@bit@negate}%
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\csuse{avr@instr@adder@helper}%
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\csuse{avr@instr@subber@helper}%
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% Set the result register
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\avr@reg@set{\avr@Rx}{#2#3#4#5#6}%
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\avr@pc@inc%
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@ -168,14 +169,13 @@
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\def\avr@Rr{#1#2#3#4#9}%
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\def\avr@instr@extracarry{1}%
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\avr@debug{SUBI - \%#2#3#4#5#6 <- #2#3#4#5#6(=\avr@Rd) - \avr@Rr}%
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\def\avr@instr@adder@RrPreprocess{\avr@bit@negate}%
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\csuse{avr@instr@adder@helper}%
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\csuse{avr@instr@subber@helper}%
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% Set the result register
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\avr@reg@set{\avr@Rx}{1#5#6#7#8}%
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\avr@pc@inc%
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}
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% SBCI - Substract Immediate
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% SBCI - Substract Immediate with Carry
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\def\avr@instr@SBCI{\avr@instr@gen@regconst{0100}}
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\csdef{avr@instr@0100}#1#2#3#4#5#6#7#8#9\@nnil{%
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\avr@reg@get{1#5#6#7#8}{\avr@Rd}%
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@ -183,8 +183,7 @@
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\avr@flag@get C \@@carry%
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\xdef \avr@instr@extracarry {\avr@bit@negate \@@carry}%
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\avr@debug{SBCI - \%#2#3#4#5#6 <- #2#3#4#5#6(=\avr@Rd) - \avr@Rr -\@@carry}%
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\def\avr@instr@adder@RrPreprocess{\avr@bit@negate}%
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\csuse{avr@instr@adder@helper}%
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\csuse{avr@instr@subber@helper}%
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% Set the result register
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\avr@reg@set{\avr@Rx}{1#5#6#7#8}%
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\avr@pc@inc%
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@ -197,8 +196,7 @@
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\avr@reg@get{#2#3#4#5#6}{\avr@Rd}%
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\def\avr@instr@extracarry{1}%
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\avr@debug{CP - #2#3#4#5#6(=\avr@Rd) - \%#1#7(=\avr@Rr)}%
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\def\avr@instr@adder@RrPreprocess{\avr@bit@negate}%
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\csuse{avr@instr@adder@helper}%
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\csuse{avr@instr@subber@helper}%
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% Do not set the output register
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\avr@pc@inc%
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}
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@ -211,8 +209,7 @@
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\avr@flag@get C \@@carry%
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\xdef \avr@instr@extracarry {\avr@bit@negate \@@carry}%
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\avr@debug{CP - #2#3#4#5#6(=\avr@Rd) - \%#1#7(=\avr@Rr)}%
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\def\avr@instr@adder@RrPreprocess{\avr@bit@negate}%
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\csuse{avr@instr@adder@helper}%
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\csuse{avr@instr@subber@helper}%
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% Do not set the output register
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\avr@pc@inc%
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}
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@ -223,10 +220,9 @@
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\avr@reg@get{1#5#6#7#8}{\avr@Rd}%
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\def\avr@Rr{#1#2#3#4#9}%
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\avr@flag@get C \@@carry%
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\xdef \avr@instr@extracarry {\avr@bit@negate \@@carry}%
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\xdef \avr@instr@extracarry{1}%
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\avr@debug{CPI - \%#2#3#4#5#6 <- #2#3#4#5#6(=\avr@Rd) - \avr@Rr -\@@carry}%
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\def\avr@instr@adder@RrPreprocess{\avr@bit@negate}%
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\csuse{avr@instr@adder@helper}%
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\csuse{avr@instr@subber@helper}%
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% Set the result register
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\avr@pc@inc%
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}
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@ -234,7 +230,6 @@
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\csdef{avr@instr@adder@helper}{%
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% Convert the Bitstring to Integer values
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\avr@bin@tocount{\avr@Rd}{\avr@accA}%
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\avr@bin@map{\avr@instr@adder@RrPreprocess}{\avr@Rr}{\avr@Rr}%
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\avr@bin@tocount{\avr@Rr}{\avr@accB}%
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\advance \avr@accA by \avr@accB\relax%
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\advance \avr@accA by \avr@instr@extracarry\relax%
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@ -248,13 +243,14 @@
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\avr@bin@msb@get{\avr@Rr}{\@@R}%
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\avr@bin@msb@get{\avr@Rd}{\@@D}%
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\avr@bin@msb@get{\avr@Rx}{\@@X}%
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\avr@debug{{Rr7:\@@R} {Rd7:\@@D} {R7:\@@X}}%
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% \avr@debug{R: \@@R D: \@@D X:\@@X}%
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\def\avr@ADD@carry{%
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\@@or {\@@and \@@D {\@@not \@@X}}%
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\@@or {\@@and \@@R \@@D}%
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{%
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\@@or{\@@and \@@R \@@D}%
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{\@@and \@@R {\@@not \@@X}}}}%
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\avr@flag@set C {\avr@instr@adder@RrPreprocess{\avr@ADD@carry}}%
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\@@or{\@@and \@@R {\@@not \@@X}}%
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{\@@and \@@X {\@@not \@@D}}}}%
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\avr@flag@set C {\avr@ADD@carry}%
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% Two's Complement Overflow
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\def\@@tmp{\@@or%
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{\@@and \@@D {\@@and \@@R {\@@not \@@X}}}%
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@ -269,11 +265,55 @@
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{%
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\@@or{\@@and \@@R \@@D}%
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{\@@and \@@R {\@@not \@@X}}}}%
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\avr@flag@set H {\avr@instr@adder@RrPreprocess{\avr@ADD@carry}}%
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\avr@flag@set H {\avr@ADD@carry}%
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%% Update Dependend Flags (N, Z, S)
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\avr@flags@update \avr@Rx%
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}
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\csdef{avr@instr@subber@helper}{%
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% Convert the Bitstring to Integer values
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\avr@bin@tocount{\avr@Rd}{\avr@accA}%
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\avr@bin@negate{\avr@Rr}{\@@Rr}%
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\avr@bin@tocount{\@@Rr}{\avr@accB}%
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\advance \avr@accA by \avr@accB\relax%
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\advance \avr@accA by \avr@instr@extracarry\relax%
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\avr@count@modulo@byte{\avr@accA}%
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\avr@count@tobin@b{\avr@accA}{\avr@Rx}%
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% Calculate the Flags
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\let\@@not=\avr@bit@negate%
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\let\@@and=\avr@bit@and%
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\let\@@or=\avr@bit@or%
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%% Carry
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\avr@bin@msb@get{\avr@Rr}{\@@R}%
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\avr@bin@msb@get{\avr@Rd}{\@@D}%
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\avr@bin@msb@get{\avr@Rx}{\@@X}%
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\avr@debug{{Rr7:\@@R} {Rd7:\@@D} {R7:\@@X}}%
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\def\avr@ADD@carry{%
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\@@or {\@@and {\@@not \@@D} \@@R}%
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{%
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\@@or{\@@and \@@R \@@X}%
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{\@@and \@@X {\@@not \@@D}}}}%
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\avr@flag@set C {\avr@ADD@carry}%
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% Two's Complement Overflow
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\def\@@tmp{\@@or%
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{\@@and \@@D {\@@and {\@@not \@@R} {\@@not \@@X}}}%
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{\@@and {\@@not \@@D} {\@@and \@@R \@@X}}}%
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\avr@flag@set V \@@tmp%
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% Half Carry
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\avr@bin@getbit{\avr@Rr}{3}{\@@R}%
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\avr@bin@getbit{\avr@Rd}{3}{\@@D}%
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\avr@bin@getbit{\avr@Rx}{3}{\@@X}%
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\def\avr@ADD@carry{%
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\@@or {\@@and {\@@not \@@D} \@@R}%
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{%
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\@@or{\@@and \@@R \@@X}%
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{\@@and \@@X {\@@not \@@D}}}}%
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\avr@flag@set H {\avr@ADD@carry}%
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%% Update Dependend Flags (N, Z, S)
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\avr@flags@update \avr@Rx%
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}
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% LDI -- Load Immediate Value
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\def\avr@instr@LDI{\avr@instr@gen@regconst{1110}}
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\def\avr@instr@SER#1#2{\avr@instr@gen@regconst{1110}{#1}{#2}{11111111}}
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@ -308,6 +348,16 @@
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#2=\avr@count@tmpa\relax%
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}
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\def\avr@instr@rjump@dec#1#2{%
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\avr@bin@tocount{0000#1}{\avr@count@tmpa}%
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\ifnum \avr@count@tmpa > 2047%
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\avr@count@tmpb=\avr@count@tmpa%
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\avr@count@tmpa=-4096%
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\advance \avr@count@tmpa by \avr@count@tmpb\relax%
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\fi%
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#2=\avr@count@tmpa\relax%
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}
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% BRBC -- Branch if Bit in SREG is cleared
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\def\avr@instr@BRBC#1#2#3{% ADD PC, Bit, Offset
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\avr@instr@jump@enc{#3}{\@@offset}%
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@ -417,6 +467,52 @@
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\avr@pc@inc%
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}
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% RJMP
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% #1 = Offset
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% FIXME latex assembler
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\csdef{avr@instr@1100}#1\@nnil{
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\avr@instr@rjump@dec{#1}{\avr@count@tmpa}%
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\avr@debug{RJMP \the\avr@count@tmpa}%
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\avr@pc@add{\avr@count@tmpa}%
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\avr@pc@inc%
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}
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% RCALL
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\csdef{avr@instr@1101}#1\@nnil{
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\avr@count@tobin@w{\the\avr@pc}{\@@pc}%
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\avr@instr@rjump@dec{#1}{\avr@count@tmpa}%
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\avr@reg@get{\csuse{avr@r24}}{\@@A}%
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\avr@reg@get{\csuse{avr@r25}}{\@@B}%
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\avr@reg@get{\csuse{avr@r26}}{\@@C}%
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\avr@debug{RCALL \the\avr@count@tmpa {r24:\@@A} {r25:\@@B} {r26:\@@C}}%
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\avr@pc@add{\avr@count@tmpa}%
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\avr@bin@word@low{\@@pc}{\@@low}%
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\avr@bin@word@high{\@@pc}{\@@high}%
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\avr@mem@set{\@@low}{\the\avr@stackptr}%
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\advance\avr@stackptr by -1\relax%
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\avr@mem@set{\@@high}{\the\avr@stackptr}%
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\advance\avr@stackptr by -1\relax%
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\avr@pc@inc%
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\avr@debug{ done}%
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}
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% RET
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\def\avr@instr@RET#1{%
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\avr@code@set{1001010100001000}{#1}%
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}
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\csdef{avr@instr@1001010100001000}\@nnil{%
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\avr@reg@get{\csuse{avr@r24}}{\@@X}%
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\avr@debug{RET (r24=\@@X)}%
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\advance\avr@stackptr by 1\relax
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\avr@mem@get{\the\avr@stackptr}{\@@high}%
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\advance\avr@stackptr by 1\relax
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\avr@mem@get{\the\avr@stackptr}{\@@low}%
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\avr@bin@tocount{\@@high \@@low}{\avr@pc}%
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\avr@pc@inc\relax%
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\avr@debug{ done }%
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}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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% Data transfert instructions
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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@ -444,6 +540,30 @@
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\avr@pc@inc%
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}
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% PUSH
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\def\avr@instr@PUSH#1#2{% PC, Reg
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\avr@code@set{1001001#21111}{#1}%
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}
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\csdef{avr@instr@1001001:1111}#1\@nnil{%
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\avr@reg@get{#1}{\avr@Rr}%
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\avr@debug{PUSH #1(=\avr@Rr)}%
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\avr@mem@set{\avr@Rr}{\the\avr@stackptr}%
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\advance\avr@stackptr by -1\relax%
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\avr@pc@inc%
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}
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% POP
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\def\avr@instr@POP#1#2{% PC, Reg
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\avr@code@set{1001000#21111}{#1}%
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}
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\csdef{avr@instr@1001000:1111}#1\@nnil{%
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\advance\avr@stackptr by 1\relax%
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\avr@debug{POP #1}%
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\avr@mem@get{\the\avr@stackptr}{\avr@Rr}%
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\avr@reg@set{\avr@Rr}{#1}%
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\avr@pc@inc%
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}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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@ -615,8 +735,7 @@
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\avr@debug{NEG: #1(=\avr@Rr)}%
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\def\avr@Rd{00000000}%
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\def\avr@instr@extracarry{1}%
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\def\avr@instr@adder@RrPreprocess{\avr@bit@negate}%
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\csuse{avr@instr@adder@helper}%
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\csuse{avr@instr@subber@helper}%
|
||||
% Set the result register
|
||||
\avr@reg@set{\avr@Rx}{#1}%
|
||||
\avr@pc@inc%
|
||||
|
||||
@ -5,6 +5,7 @@
|
||||
\avr@flag@init%
|
||||
\avr@reg@init%
|
||||
\avr@pc@init%
|
||||
\avr@stack@init%
|
||||
}
|
||||
|
||||
\newcount\avr@accA
|
||||
@ -94,8 +95,8 @@
|
||||
|
||||
\def\avr@flags@update#1{%
|
||||
% Negate Flag
|
||||
\avr@bin@msb@get{#1}{\@@X}%
|
||||
\avr@flag@set N \@@X%
|
||||
\avr@bin@msb@get{#1}{\@@N}%
|
||||
\avr@flag@set N \@@N%
|
||||
% Zero Flag
|
||||
\avr@bin@tocount{#1}{\avr@count@tmpa}%
|
||||
\ifnum \avr@count@tmpa = 0%
|
||||
@ -105,8 +106,8 @@
|
||||
\fi%
|
||||
% Signed Flag
|
||||
\avr@flag@get V \@@V%
|
||||
\edef\@@tmp{\avr@bit@xor \@@X \@@V}%
|
||||
\avr@flag@set S \@@V%
|
||||
\edef\@@tmp{\avr@bit@xor \@@N \@@V}%
|
||||
\avr@flag@set S \@@tmp%
|
||||
}
|
||||
|
||||
%% Registers
|
||||
@ -211,6 +212,47 @@
|
||||
\csxdef{avr@code@#2}{#1}%
|
||||
}
|
||||
%% RAM
|
||||
\newcount\avr@stackptr
|
||||
\def\avr@stack@init{
|
||||
\avr@stackptr=0%
|
||||
}
|
||||
|
||||
\def\avr@stack@SPL@get#1{%
|
||||
\avr@count@tobin@w{\avr@stackptr}{\@@stack}%
|
||||
\avr@bin@word@low{\@@stack}{#1}%
|
||||
}
|
||||
\def\avr@stack@SPH@get#1{%
|
||||
\avr@count@tobin@w{\avr@stackptr}{\@@stack}%
|
||||
\avr@bin@word@high{\@@stack}{#1}%
|
||||
}
|
||||
|
||||
\def\avr@stack@SPL@set#1{%
|
||||
\avr@count@tobin@w{\avr@stackptr}{\@@stack}%
|
||||
\avr@bin@word@high{\@@stack}{\@@high}%
|
||||
\avr@bin@tocount{\@@high #1}{\avr@stackptr}%
|
||||
\avr@debug{ SP=\the\avr@stackptr}
|
||||
}
|
||||
|
||||
\def\avr@stack@SPH@set#1{%
|
||||
\avr@count@tobin@w{\avr@stackptr}{\@@stack}%
|
||||
\avr@bin@word@low{\@@stack}{\@@low}%
|
||||
\avr@bin@tocount{#1\@@low}{\avr@stackptr}%
|
||||
\avr@debug{ SP=\the\avr@stackptr}
|
||||
}
|
||||
|
||||
\def\avr@mem@set#1#2{% Bitstring, Address (as number)
|
||||
\avr@debug{ MEM W *#2=#1}%
|
||||
\csxdef{avr@mem@#2}{#1}%
|
||||
}
|
||||
|
||||
\def\avr@mem@get#1#2{% Address (as number), Target Macro
|
||||
\ifcsdef{avr@mem@#1}{%
|
||||
\edef#2{\csuse{avr@mem@#1}}%
|
||||
}{%
|
||||
\edef#2{00000000}%
|
||||
}%
|
||||
\avr@debug{ MEM R *#1==#2}%
|
||||
}
|
||||
|
||||
|
||||
%%% Local Variables:
|
||||
|
||||
@ -87,7 +87,7 @@
|
||||
|
||||
\avr@test@helper{00001111}{00010000}%
|
||||
\avr@test@REG{r17}{11111111}%
|
||||
\avr@test@SREG{00000101}%
|
||||
\avr@test@SREG{00010101}%
|
||||
}
|
||||
\appto\avr@test{\avr@test@SUB}
|
||||
|
||||
@ -110,7 +110,7 @@
|
||||
\avr@test@helper{00000000}{00000000}{00000000}{00000001}%
|
||||
\avr@test@REG{r17}{11111111}%
|
||||
\avr@test@REG{r18}{11111111}%
|
||||
\avr@test@SREG{00100101}%
|
||||
\avr@test@SREG{00110101}%
|
||||
|
||||
\avr@test@helper{00000000}{10000000}{00000000}{00000001}%
|
||||
\avr@test@REG{r17}{00000000}%
|
||||
@ -204,11 +204,11 @@
|
||||
|
||||
\avr@instr@stepn{2}%
|
||||
\avr@test@REG{r30}{11111111}
|
||||
\avr@test@SREG{00000101}
|
||||
\avr@test@SREG{00010101}
|
||||
|
||||
\avr@instr@stepn{1}%
|
||||
\avr@test@REG{r30}{11111101}
|
||||
\avr@test@SREG{00000100}
|
||||
\avr@test@SREG{00010100}
|
||||
}
|
||||
\preto\avr@test{\avr@test@SUBI}
|
||||
|
||||
@ -279,7 +279,7 @@
|
||||
|
||||
\avr@instr@stepn{2}%
|
||||
\avr@test@REG{r20}{11111111}
|
||||
\avr@test@SREG{00100101}
|
||||
\avr@test@SREG{00110101}
|
||||
|
||||
\avr@instr@stepn{1}%
|
||||
\avr@test@REG{r20}{00000001}
|
||||
@ -296,7 +296,7 @@
|
||||
|
||||
\avr@instr@stepn{2}%
|
||||
\avr@test@REG{r20}{11111110}
|
||||
\avr@test@SREG{00000101}
|
||||
\avr@test@SREG{00010101}
|
||||
|
||||
\avr@instr@stepn{1}%
|
||||
\avr@test@REG{r20}{00000001}
|
||||
@ -336,7 +336,7 @@
|
||||
|
||||
\avr@instr@stepn{2}%
|
||||
\avr@test@REG{r20}{11000100}
|
||||
\avr@test@SREG{00000101}
|
||||
\avr@test@SREG{00010101}
|
||||
}
|
||||
\preto\avr@test{\avr@test@ASR}
|
||||
|
||||
@ -372,7 +372,7 @@
|
||||
|
||||
\avr@instr@stepn{1}%
|
||||
\avr@test@REG{r20}{10000000}
|
||||
\avr@test@SREG{00011100}
|
||||
\avr@test@SREG{00001100}
|
||||
|
||||
\avr@instr@stepn{1}%
|
||||
\avr@test@REG{r20}{01000000}
|
||||
@ -385,11 +385,64 @@ int main() { }
|
||||
\end{filecontents*}
|
||||
|
||||
\def\avr@test@emptymain{%
|
||||
\avr@test@setup{Empty Main Function}%
|
||||
\avrloadc{empty-main.c}
|
||||
\avr@instr@stepn{3}
|
||||
\avr@instr@stepn{50}
|
||||
}
|
||||
\preto\avr@test{\avr@test@emptymain}
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
\begin{filecontents*}{sum-rec.c}
|
||||
#include <avr/io.h>
|
||||
|
||||
char sum(char n) {
|
||||
if (n <= 1) {
|
||||
return n;
|
||||
}
|
||||
return n + sum(n-1);
|
||||
}
|
||||
|
||||
int main() {
|
||||
UDR = sum(4);
|
||||
asm volatile ("break");
|
||||
}
|
||||
\end{filecontents*}
|
||||
|
||||
\def\avr@test@sumRec{%
|
||||
\avr@test@setup{Summing Recursive}%
|
||||
\avrloadc{sum-rec.c}
|
||||
\avr@instr@stepn{1000}
|
||||
\avr@test@REG{r24}{00001010}
|
||||
}
|
||||
|
||||
\preto\avr@test{\avr@test@sumRec}
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
\begin{filecontents*}{fibonacci-rec.c}
|
||||
#include <avr/io.h>
|
||||
|
||||
char fib(char n) {
|
||||
if (n <= 1) {
|
||||
return 1;
|
||||
}
|
||||
return fib(n-1) + fib(n-2);
|
||||
}
|
||||
|
||||
int main() {
|
||||
UDR = fib(5);
|
||||
asm volatile ("break");
|
||||
}
|
||||
\end{filecontents*}
|
||||
|
||||
\def\avr@test@fibRec{%
|
||||
\avr@test@setup{Fibonacci Recursive}%
|
||||
\avrloadc{fibonacci-rec.c}
|
||||
\avr@instr@stepn{1000}
|
||||
\avr@test@REG{r24}{00001000}
|
||||
}
|
||||
\preto\avr@test{\avr@test@fibRec}
|
||||
|
||||
|
||||
|
||||
%%% Local Variables:
|
||||
%%% mode: latex
|
||||
|
||||
Loading…
Reference in New Issue
Block a user