Implement Load and Store Command for Memory
This commit is contained in:
parent
35427842d8
commit
214ec7b24d
@ -37,6 +37,13 @@
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% \avr@bin@id{A}{\result} -> \result = A
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% \avr@bin@id{A}{\result} -> \result = A
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\def\avr@bin@id{\avr@bin@map{\avr@bit@id}}
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\def\avr@bin@id{\avr@bin@map{\avr@bit@id}}
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\csdef{avr@bit@mask@00}{.}
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\csdef{avr@bit@mask@01}{0}
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\csdef{avr@bit@mask@10}{.}
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\csdef{avr@bit@mask@11}{1}
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\def\avr@bit@mask#1#2{\csuse{avr@bit@mask@#1#2}}
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% \avr@bin@mask{value}{mask}{\result} -> \result = ...
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\def\avr@bin@mask{\avr@bin@zipmap{\avr@bit@mask}}
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\csdef{avr@bit@and@00}{0}
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\csdef{avr@bit@and@00}{0}
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\csdef{avr@bit@and@01}{0}
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\csdef{avr@bit@and@01}{0}
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197
avr.instr.tex
197
avr.instr.tex
@ -52,7 +52,7 @@
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}{\ifcsdef{avr@instr@#1}{%
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}{\ifcsdef{avr@instr@#1}{%
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\csuse{avr@instr@#1}#2#3#4#5#6#7#8#9\@nnil%
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\csuse{avr@instr@#1}#2#3#4#5#6#7#8#9\@nnil%
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}{% Not found
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}{% Not found
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\avr@error{Unkown Instruction: #1#2#3#4#5#6#7#8#9}%
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\avr@instr@matchspecial{#1#2#3#4#5#6#7#8#9}%
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}}}}}}}}}%
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}}}}}}}}}%
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}
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}
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@ -72,9 +72,21 @@
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}{\ifcsdef{avr@instr@#1:#9}{%
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}{\ifcsdef{avr@instr@#1:#9}{%
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\csuse{avr@instr@#1:#9}#2#3#4#5#6#7#8\@nnil%
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\csuse{avr@instr@#1:#9}#2#3#4#5#6#7#8\@nnil%
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}{% Not found
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}{% Not found
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\avr@error{Unkown Instruction: #1:#2#3#4#5#6#7#8#9}%
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\avr@instr@matchspecial{#1#2#3#4#5#6#7#8#9}%
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}}}}}}}%
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}}}}}}}%
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}
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}
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\def\avr@instr@matchspecial#1{%
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\avr@bin@mask{#1}{1101001000001000}{\@@masked}%
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\avr@bin@mask{#1}{0010110111110111}{\@@args}%
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\ifcsdef{avr@instr@special@\@@masked}{%
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\def\@tempa{\csuse{avr@instr@special@\@@masked}}%
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\expandafter\@tempa\@@args\@nnil%
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}{%
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\avr@error{Unkown Instruction: #1}%
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}%
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}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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% Match also from end for these prefixes
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% Match also from end for these prefixes
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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@ -82,6 +94,9 @@
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% POP/PUSH
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% POP/PUSH
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\csdef{avr@instr@1001000}{\avr@instr@matchend{1001000}}
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\csdef{avr@instr@1001000}{\avr@instr@matchend{1001000}}
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\csdef{avr@instr@1001001}{\avr@instr@matchend{1001001}}
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\csdef{avr@instr@1001001}{\avr@instr@matchend{1001001}}
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% LD(XYZ)
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\csdef{avr@instr@1000000}{\avr@instr@matchend{1000000}}
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\csdef{avr@instr@1000001}{\avr@instr@matchend{1000001}}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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@ -101,6 +116,10 @@
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\avr@code@set{#1\avr@LDI@H\avr@LDI@dddd\avr@LDI@L}{#2}%
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\avr@code@set{#1\avr@LDI@H\avr@LDI@dddd\avr@LDI@L}{#2}%
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}
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}
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\def\avr@instr@gen@onereg#1#2#3#4{%
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\avr@code@set{#1#4#2}{#3}%
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}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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% Arithmetic instructions
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% Arithmetic instructions
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@ -565,6 +584,180 @@
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\avr@pc@inc%
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\avr@pc@inc%
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}
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}
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\newcount\avr@addr
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\def\avr@instr@LDD@helper#1#2#3#4{%
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% PreIncrement, RegisterW, PostIncrement, Target
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\avr@regw@get{\csuse{avr@#2}}{\@@addr}%
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\avr@debug{LD *(#1:#2:#3,#2=\@@addr)}%
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\avr@bin@tocount{\@@addr}{\avr@addr}%
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\advance \avr@addr by #1\relax%
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\avr@count@overflow{\avr@addr}\relax%
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\avr@mem@get{\the\avr@addr}{\avr@Rx}%
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\advance \avr@addr by #3\relax%
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\avr@count@overflow{\avr@addr}\relax%
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\avr@count@tobin@w{\avr@addr}{\@@addr}%
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\avr@regw@set{\@@addr}{\csuse{avr@#2}}%
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\avr@reg@set{\avr@Rx}{#4}%
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\avr@pc@inc%
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}
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\def\avr@instr@STS@helper#1#2#3#4{%
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% PreIncrement, RegisterW, PostIncrement, SourceReg
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\avr@regw@get{\csuse{avr@#2}}{\@@addr}%
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\avr@reg@get{#4}{\avr@Rd}%
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\avr@debug{ST *(#1:#2:#3,#2=\@@addr)}%
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\avr@bin@tocount{\@@addr}{\avr@addr}%
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\advance \avr@addr by #1\relax%
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\avr@count@overflow{\avr@addr}\relax%
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\avr@mem@set{\avr@Rd}{\the\avr@addr}%
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\advance \avr@addr by #3\relax%
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\avr@count@overflow{\avr@addr}\relax%
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\avr@count@tobin@w{\avr@addr}{\@@addr}%
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\avr@regw@set{\@@addr}{\csuse{avr@#2}}%
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\avr@pc@inc%
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}
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% LD(X)
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\def\avr@instr@LDX{\avr@instr@gen@onereg{1001000}{1100}}
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\def\avr@instr@LDXp{\avr@instr@gen@onereg{1001000}{1101}}
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\def\avr@instr@LDmX{\avr@instr@gen@onereg{1001000}{1110}}
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\csdef{avr@instr@1001000:1100}#1\@nnil{%
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\avr@instr@LDD@helper{0}{X}{0}{#1}%
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}
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\csdef{avr@instr@1001000:1101}#1\@nnil{%
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\avr@instr@LDD@helper{0}{X}{1}{#1}%
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}
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\csdef{avr@instr@1001000:1110}#1\@nnil{%
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\avr@instr@LDD@helper{-1}{X}{0}{#1}%
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}
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% LD(Y)
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\def\avr@instr@LDY{\avr@instr@gen@onereg{1000000}{1000}}
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\def\avr@instr@LDYp{\avr@instr@gen@onereg{1001000}{1001}}
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\def\avr@instr@LDmY{\avr@instr@gen@onereg{1001000}{1010}}
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\csdef{avr@instr@1000000:1000}#1\@nnil{%
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\avr@instr@LDD@helper{0}{Y}{0}{#1}%
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}
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\csdef{avr@instr@1001000:1001}#1\@nnil{%
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\avr@instr@LDD@helper{0}{Y}{1}{#1}%
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}
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\csdef{avr@instr@1001000:1010}#1\@nnil{%
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\avr@instr@LDD@helper{-1}{Y}{0}{#1}%
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}
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% LD(Z)
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\def\avr@instr@LDZ{\avr@instr@gen@onereg{1000000}{0000}}
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\def\avr@instr@LDZp{\avr@instr@gen@onereg{1001000}{0001}}
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\def\avr@instr@LDmZ{\avr@instr@gen@onereg{1001000}{0010}}
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\csdef{avr@instr@1000000:0000}#1\@nnil{%
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\avr@instr@LDD@helper{0}{Z}{0}{#1}%
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}
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\csdef{avr@instr@1001000:0001}#1\@nnil{%
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\avr@instr@LDD@helper{0}{Z}{1}{#1}%
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}
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\csdef{avr@instr@1001000:0010}#1\@nnil{%
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\avr@instr@LDD@helper{-1}{Z}{0}{#1}%
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}
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% ST(X,Y,Z)
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\def\avr@instr@STX{\avr@instr@gen@onereg{1001001}{1100}}
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\def\avr@instr@STXp{\avr@instr@gen@onereg{1001001}{1101}}
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\def\avr@instr@STmX{\avr@instr@gen@onereg{1001001}{1110}}
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\csdef{avr@instr@1001001:1100}#1\@nnil{%
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\avr@instr@STS@helper{0}{X}{0}{#1}%
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}
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\csdef{avr@instr@1001001:1101}#1\@nnil{%
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\avr@instr@STS@helper{0}{X}{1}{#1}%
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}
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\csdef{avr@instr@1001001:1110}#1\@nnil{%
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\avr@instr@STS@helper{-1}{X}{0}{#1}%
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}
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\def\avr@instr@STY{\avr@instr@gen@onereg{1000001}{1000}}
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\def\avr@instr@STYp{\avr@instr@gen@onereg{1001001}{1001}}
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\def\avr@instr@STmY{\avr@instr@gen@onereg{1001001}{1010}}
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\csdef{avr@instr@1000001:1000}#1\@nnil{%
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\avr@instr@STS@helper{0}{Y}{0}{#1}%
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}
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\csdef{avr@instr@1001001:1001}#1\@nnil{%
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\avr@instr@STS@helper{0}{Y}{1}{#1}%
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}
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\csdef{avr@instr@1001001:1010}#1\@nnil{%
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\avr@instr@STS@helper{-1}{Y}{0}{#1}%
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}
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\def\avr@instr@STZ{\avr@instr@gen@onereg{1000001}{0000}}
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\def\avr@instr@STZp{\avr@instr@gen@onereg{1001001}{0001}}
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\def\avr@instr@STmZ{\avr@instr@gen@onereg{1001001}{0010}}
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\csdef{avr@instr@1000001:0000}#1\@nnil{%
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\avr@instr@STS@helper{0}{Z}{0}{#1}%
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}
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\csdef{avr@instr@1001001:0001}#1\@nnil{%
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\avr@instr@STS@helper{0}{Z}{1}{#1}%
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}
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\csdef{avr@instr@1001001:0010}#1\@nnil{%
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\avr@instr@STS@helper{-1}{Z}{0}{#1}%
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}
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% Special Stores & Loads
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% LD R <- Y+q
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\csdef{avr@instr@special@10.0..0.....1...}..#1.#2.#3.#4\@nnil{%
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\avr@debug{LD reg(#3) <- Y+#1#2#4}%
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\avr@regw@get{\csuse{avr@Y}}{\@@addr}%
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\avr@bin@tocount{\@@addr}{\avr@addr}%
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\avr@bin@tocount{00#1#2#4}{\avr@count@tmpa}%
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\advance \avr@addr by \avr@count@tmpa\relax%
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\avr@count@overflow{\avr@addr}\relax%
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\avr@mem@get{\the\avr@addr}{\avr@Rd}%
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\avr@reg@set{\avr@Rd}{#3}%
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\avr@pc@inc%
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}
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% LD R <- Z+q
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\csdef{avr@instr@special@10.0..0.....0...}..#1.#2.#3.#4\@nnil{%
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\avr@debug{LD reg(#3) <- Z+#1#2#4}%
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\avr@regw@get{\csuse{avr@Z}}{\@@addr}%
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\avr@bin@tocount{\@@addr}{\avr@addr}%
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\avr@bin@tocount{00#1#2#4}{\avr@count@tmpa}%
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\advance \avr@addr by \avr@count@tmpa\relax%
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\avr@count@overflow{\avr@addr}\relax%
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\avr@mem@get{\the\avr@addr}{\avr@Rd}%
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\avr@reg@set{\avr@Rd}{#3}%
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\avr@pc@inc%
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}
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% ST Y+q <- R
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\csdef{avr@instr@special@10.0..1.....1...}..#1.#2.#3.#4\@nnil{%
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\avr@debug{ST Y+#1#2#4 <- reg(#3)}%
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\avr@regw@get{\csuse{avr@Y}}{\@@addr}%
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\avr@reg@get{#3}{\avr@Rd}%
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\avr@bin@tocount{\@@addr}{\avr@addr}%
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\avr@bin@tocount{00#1#2#4}{\avr@count@tmpa}%
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\advance \avr@addr by \avr@count@tmpa\relax%
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\avr@count@overflow{\avr@addr}\relax%
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\avr@mem@set{\avr@Rd}{\the\avr@addr}%
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\avr@pc@inc%
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}
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% ST Z+q <- R
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\csdef{avr@instr@special@10.0..1.....0...}..#1.#2.#3.#4\@nnil{%
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\avr@debug{ST Z+#1#2#4 <- reg(#3)}%
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\avr@regw@get{\csuse{avr@Z}}{\@@addr}%
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\avr@reg@get{#3}{\avr@Rd}%
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\avr@bin@tocount{\@@addr}{\avr@addr}%
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\avr@bin@tocount{00#1#2#4}{\avr@count@tmpa}%
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\advance \avr@addr by \avr@count@tmpa\relax%
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\avr@count@overflow{\avr@addr}\relax%
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\avr@mem@set{\avr@Rd}{\the\avr@addr}%
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\avr@pc@inc%
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}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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% Misc
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% Misc
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\edef#2{\csuse{avr@reg@#1}}%
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\edef#2{\csuse{avr@reg@#1}}%
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}
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}
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\csdef{avr@X}{1101}
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\csdef{avr@Y}{1110}
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\csdef{avr@Z}{1111}
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\def\avr@regw@get#1#2{%
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\avr@reg@get{#11}{\@@high}%
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\avr@reg@get{#10}{\@@low}%
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\edef#2{\@@high \@@low}%
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}
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\def\avr@regw@set#1#2{%
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\edef\@@value{#1}%
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\avr@bin@word@low{\@@value}{\@@low}%
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\avr@bin@word@high{\@@value}{\@@high}%
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\avr@reg@set{\@@high}{#21}%
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\avr@reg@set{\@@low}{#20}%
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}
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\def\avr@reg@init{%
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\def\avr@reg@init{%
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\avr@reg@set{\avr@zeroes}{00000}%
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\avr@reg@set{\avr@zeroes}{00000}%
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\avr@reg@set{\avr@zeroes}{00001}%
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\avr@reg@set{\avr@zeroes}{00001}%
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}
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}
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\def\avr@mem@set#1#2{% Bitstring, Address (as number)
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\def\avr@mem@set#1#2{% Bitstring, Address (as number)
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\ifnum #2 < 96 % 0x60
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% FIXME
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\avr@error{Not implement access to IO/Regs through memory}%
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\fi%
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\avr@debug{ MEM W *#2=#1}%
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\avr@debug{ MEM W *#2=#1}%
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\csxdef{avr@mem@#2}{#1}%
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\csxdef{avr@mem@#2}{#1}%
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}
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}
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\def\avr@mem@get#1#2{% Address (as number), Target Macro
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\def\avr@mem@get#1#2{% Address (as number), Target Macro
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\ifnum #1 < 96 % 0x60
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% FIXME
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\avr@error{Not implement access to IO/Regs through memory}%
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\fi%
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\ifcsdef{avr@mem@#1}{%
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\ifcsdef{avr@mem@#1}{%
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\edef#2{\csuse{avr@mem@#1}}%
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\edef#2{\csuse{avr@mem@#1}}%
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}{%
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}{%
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@ -21,6 +21,14 @@
|
|||||||
}%
|
}%
|
||||||
}
|
}
|
||||||
|
|
||||||
|
\def\avr@test@MEM#1#2{% Tests MEM for value
|
||||||
|
\avr@mem@get{#1}{\@@MEM}%
|
||||||
|
\expandafter\ifstrequal\expandafter{\@@MEM}{#2}{%Success
|
||||||
|
}{%
|
||||||
|
\avr@error{MEM unequal: #2 != \@@MEM}%
|
||||||
|
}%
|
||||||
|
}
|
||||||
|
|
||||||
% Hook Macro for the tests
|
% Hook Macro for the tests
|
||||||
\def\avr@test{}
|
\def\avr@test{}
|
||||||
|
|
||||||
@ -381,7 +389,9 @@
|
|||||||
\preto\avr@test{\avr@test@ROR}
|
\preto\avr@test{\avr@test@ROR}
|
||||||
|
|
||||||
\begin{filecontents*}{empty-main.c}
|
\begin{filecontents*}{empty-main.c}
|
||||||
int main() { }
|
int main() {
|
||||||
|
asm volatile ("break");
|
||||||
|
}
|
||||||
\end{filecontents*}
|
\end{filecontents*}
|
||||||
|
|
||||||
\def\avr@test@emptymain{%
|
\def\avr@test@emptymain{%
|
||||||
@ -443,6 +453,79 @@ int main() {
|
|||||||
\preto\avr@test{\avr@test@fibRec}
|
\preto\avr@test{\avr@test@fibRec}
|
||||||
|
|
||||||
|
|
||||||
|
\def\avr@test@LDX{%
|
||||||
|
\avr@test@setup{LDX}%
|
||||||
|
\avr@mem@set{11110111}{257}%
|
||||||
|
\avr@mem@set{11110000}{258}%
|
||||||
|
\avr@mem@set{11110001}{259}%
|
||||||
|
|
||||||
|
\avr@instr@LDI{0}{\csuse{avr@r27}}{00000001}%
|
||||||
|
\avr@instr@LDI{1}{\csuse{avr@r26}}{00000010}%
|
||||||
|
\avr@instr@LDX{2}{\csuse{avr@r20}}%
|
||||||
|
\avr@instr@LDXp{3}{\csuse{avr@r21}}%
|
||||||
|
\avr@instr@LDmX{4}{\csuse{avr@r22}}%
|
||||||
|
\avr@instr@LDmX{5}{\csuse{avr@r23}}%
|
||||||
|
\avr@instr@LDmX{6}{\csuse{avr@r24}}%
|
||||||
|
\avr@instr@LDmX{7}{\csuse{avr@r24}}%
|
||||||
|
|
||||||
|
\avr@instr@stepn{8}%
|
||||||
|
\avr@test@REG{r20}{11110000}
|
||||||
|
\avr@test@REG{r21}{11110000}
|
||||||
|
\avr@test@REG{r22}{11110000}
|
||||||
|
\avr@test@REG{r23}{11110111}
|
||||||
|
\avr@test@REG{r24}{00000000}
|
||||||
|
\avr@test@REG{r26}{11111111}
|
||||||
|
\avr@test@REG{r27}{00000000}
|
||||||
|
}
|
||||||
|
\preto\avr@test{\avr@test@LDX}
|
||||||
|
|
||||||
|
\def\avr@test@STZ{%
|
||||||
|
\avr@test@setup{STZ}%
|
||||||
|
|
||||||
|
\avr@instr@LDI{0}{\csuse{avr@r31}}{00000001}%
|
||||||
|
\avr@instr@LDI{1}{\csuse{avr@r30}}{00000010}%
|
||||||
|
\avr@instr@STZ{2}{\csuse{avr@r30}}%
|
||||||
|
\avr@instr@STmZ{3}{\csuse{avr@r30}}%
|
||||||
|
\avr@instr@STZp{4}{\csuse{avr@r0}}%
|
||||||
|
\avr@instr@STZp{5}{\csuse{avr@r0}}%
|
||||||
|
|
||||||
|
\avr@instr@stepn{4}%
|
||||||
|
\avr@test@MEM{258}{00000010}
|
||||||
|
\avr@test@MEM{257}{00000010}
|
||||||
|
|
||||||
|
\avr@instr@stepn{2}%
|
||||||
|
\avr@test@MEM{258}{00000000}
|
||||||
|
\avr@test@MEM{257}{00000000}
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
\preto\avr@test{\avr@test@STZ}
|
||||||
|
|
||||||
|
\begin{filecontents*}{complex-memory.c}
|
||||||
|
#include <avr/io.h>
|
||||||
|
|
||||||
|
volatile char foo[30];
|
||||||
|
|
||||||
|
int main() {
|
||||||
|
foo[0] = 23;
|
||||||
|
foo[1] = 42;
|
||||||
|
foo[2] = foo[0] + foo[1];
|
||||||
|
|
||||||
|
asm volatile ("break");
|
||||||
|
}
|
||||||
|
\end{filecontents*}
|
||||||
|
|
||||||
|
\def\avr@test@complexMemory{%
|
||||||
|
\avr@test@setup{Complex Memory Operations}%
|
||||||
|
\avrloadc{complex-memory.c}
|
||||||
|
\avr@instr@stepn{1000}
|
||||||
|
|
||||||
|
\avr@test@MEM{96}{00010111} % 23
|
||||||
|
\avr@test@MEM{97}{00101010} % 42
|
||||||
|
\avr@test@MEM{98}{01000001} % 65
|
||||||
|
}
|
||||||
|
\preto\avr@test{\avr@test@complexMemory}
|
||||||
|
|
||||||
|
|
||||||
%%% Local Variables:
|
%%% Local Variables:
|
||||||
%%% mode: latex
|
%%% mode: latex
|
||||||
|
Loading…
Reference in New Issue
Block a user