81 lines
2.4 KiB
C
81 lines
2.4 KiB
C
/*
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* Code to write data to two daisychained TPIC6B595 SIPO shift registers.
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*
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* http://appelsiini.net/2011/driving-595-shift-registers
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*
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* The TPIC6B595 is a monolithic, high-voltage, medium-current power 8-bit
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* shift register designed for use in systems that require relatively high
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* load power.
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*
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* This device contains an 8-bit serial-in, parallel-out shift register that
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* feeds an 8-bit D-type storage register. Data transfers through both the
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* shift and storage registers on the rising edge of the shift-register clock
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* (SRCK) and the register clock (RCK), respectively. The storage register
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* transfers data to the output buffer when shift-register clear (SRCLR) is
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* high. When SRCLR is low, the input shift register is cleared. When output
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* enable (G) is held high, all data in the output buffers is held low and all
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* drain outputs are off. When G is held low, data from the storage register
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* is transparent to the output buffers. When data in the output buffers is
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* low, the DMOS-transistor outputs are off. When data is high, the DMOS-
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* transistor outputs have sink-current capability. The serial output (SER
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* OUT) allows for cascading of the data from the shift register to additional
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* devices.
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*
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* http://www.adafruit.com/datasheets/tpic6b595.pdf
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*
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* To compile and upload run: make clean; make; make program;
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*
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* Copyright 2012 Mika Tuupola
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*
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* Licensed under the MIT license:
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* http://www.opensource.org/licenses/mit-license.php
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*
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*/
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#include <util/delay.h>
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#include "main.h"
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#include "pins/digital.h"
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#define SS B0
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#define SCLK B1
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#define MOSI B2
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#define MISO B3
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void spi_init(void) {
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pin_mode(SCLK, OUTPUT);
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pin_mode(MOSI, OUTPUT);
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pin_mode(SS, OUTPUT); /* Should be output in Master mode. */
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SPCR &= ~(_BV(DORD)); /* MSB first. */
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SPCR |= _BV(MSTR); /* Act as master. */
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SPCR |= _BV(SPE); /* Enable SPI. */
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}
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uint8_t spi_transfer(volatile uint8_t data) {
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SPDR = data;
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loop_until_bit_is_set(SPSR, SPIF);
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return SPDR;
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}
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int main(void) {
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spi_init();
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for(uint16_t i = 0; i < 0xffff; i++) {
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/* Shift high byte first to shift registers. */
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spi_transfer(i >> 8);
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spi_transfer(i & 0xff);
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/* Pulse latch to transfer data from shift registers */
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/* to storage registers. */
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digital_write(SS, LOW);
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digital_write(SS, HIGH);
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_delay_ms(50);
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}
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return 0;
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}
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