450 lines
17 KiB
Plaintext
450 lines
17 KiB
Plaintext
1 .file "uart_async.c"
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2 __SREG__ = 0x3f
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3 __SP_H__ = 0x3e
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4 __SP_L__ = 0x3d
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5 __tmp_reg__ = 0
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6 __zero_reg__ = 1
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7 .global __do_copy_data
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8 .global __do_clear_bss
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9 .text
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10 .Ltext0:
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11 .global uart_init
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13 uart_init:
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14 .LFB1:
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15 .file 1 "uart_async.c"
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1:uart_async.c **** /* Based on Atmel Application Note AVR 306 */
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2:uart_async.c ****
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3:uart_async.c **** #include <avr/io.h>
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4:uart_async.c **** #include <avr/interrupt.h>
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5:uart_async.c **** #include <stdio.h>
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6:uart_async.c ****
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7:uart_async.c **** #ifndef BAUD
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8:uart_async.c **** #define BAUD 9600
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9:uart_async.c **** #endif
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10:uart_async.c **** #include <util/setbaud.h>
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11:uart_async.c ****
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12:uart_async.c **** #ifndef UART_RX_BUFFER_SIZE
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13:uart_async.c **** #define UART_RX_BUFFER_SIZE 32
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14:uart_async.c **** #endif
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15:uart_async.c ****
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16:uart_async.c **** #ifndef UART_TX_BUFFER_SIZE
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17:uart_async.c **** #define UART_TX_BUFFER_SIZE 512
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18:uart_async.c **** #endif
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19:uart_async.c ****
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20:uart_async.c **** struct tx_ring {
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21:uart_async.c **** int buffer[UART_TX_BUFFER_SIZE];
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22:uart_async.c **** int start;
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23:uart_async.c **** int end;
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24:uart_async.c **** };
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25:uart_async.c ****
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26:uart_async.c **** struct rx_ring {
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27:uart_async.c **** int buffer[UART_RX_BUFFER_SIZE];
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28:uart_async.c **** int start;
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29:uart_async.c **** int end;
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30:uart_async.c **** };
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31:uart_async.c ****
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32:uart_async.c **** static struct tx_ring tx_buffer;
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33:uart_async.c **** static struct rx_ring rx_buffer;
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34:uart_async.c ****
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35:uart_async.c **** /* http://www.cs.mun.ca/~rod/Winter2007/4723/notes/serial/serial.html */
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36:uart_async.c ****
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37:uart_async.c **** void uart_init(void) {
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16 .loc 1 37 0
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17 /* prologue: function */
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18 /* frame size = 0 */
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19 /* stack size = 0 */
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20 .L__stack_usage = 0
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38:uart_async.c ****
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39:uart_async.c **** tx_buffer.start = 0;
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21 .loc 1 39 0
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22 0000 1092 0000 sts tx_buffer+1024+1,__zero_reg__
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23 0004 1092 0000 sts tx_buffer+1024,__zero_reg__
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40:uart_async.c **** tx_buffer.end = 0;
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24 .loc 1 40 0
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25 0008 1092 0000 sts tx_buffer+1026+1,__zero_reg__
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26 000c 1092 0000 sts tx_buffer+1026,__zero_reg__
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41:uart_async.c ****
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42:uart_async.c **** rx_buffer.start = 0;
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27 .loc 1 42 0
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28 0010 1092 0000 sts rx_buffer+64+1,__zero_reg__
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29 0014 1092 0000 sts rx_buffer+64,__zero_reg__
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43:uart_async.c **** rx_buffer.end = 0;
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30 .loc 1 43 0
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31 0018 1092 0000 sts rx_buffer+66+1,__zero_reg__
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32 001c 1092 0000 sts rx_buffer+66,__zero_reg__
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44:uart_async.c ****
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45:uart_async.c **** UBRR0H = UBRRH_VALUE;
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33 .loc 1 45 0
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34 0020 1092 C500 sts 197,__zero_reg__
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46:uart_async.c **** UBRR0L = UBRRL_VALUE;
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35 .loc 1 46 0
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36 0024 87E6 ldi r24,lo8(103)
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37 0026 8093 C400 sts 196,r24
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47:uart_async.c ****
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48:uart_async.c **** UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); /* 8-bit data */
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38 .loc 1 48 0
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39 002a 86E0 ldi r24,lo8(6)
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40 002c 8093 C200 sts 194,r24
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49:uart_async.c **** UCSR0B = _BV(RXEN0) | _BV(TXEN0); /* Enable RX and TX */
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41 .loc 1 49 0
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42 0030 88E1 ldi r24,lo8(24)
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43 0032 8093 C100 sts 193,r24
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50:uart_async.c ****
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51:uart_async.c **** sei();
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44 .loc 1 51 0
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45 /* #APP */
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46 ; 51 "uart_async.c" 1
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47 0036 7894 sei
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48 ; 0 "" 2
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49 /* epilogue start */
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52:uart_async.c **** }
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50 .loc 1 52 0
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51 /* #NOAPP */
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52 0038 0895 ret
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53 .LFE1:
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55 .global uart_putchar
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57 uart_putchar:
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58 .LFB2:
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53:uart_async.c ****
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54:uart_async.c **** int uart_putchar(char c, FILE *stream) {
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59 .loc 1 54 0
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60 .LVL0:
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61 003a 1F93 push r17
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62 .LCFI0:
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63 /* prologue: function */
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64 /* frame size = 0 */
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65 /* stack size = 1 */
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66 .L__stack_usage = 1
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67 003c 182F mov r17,r24
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55:uart_async.c **** if (c == '\n') {
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68 .loc 1 55 0
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69 003e 8A30 cpi r24,lo8(10)
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70 0040 01F4 brne .L3
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71 .LVL1:
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56:uart_async.c **** uart_putchar('\r', stream);
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72 .loc 1 56 0
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73 0042 8DE0 ldi r24,lo8(13)
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74 0044 0E94 0000 call uart_putchar
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75 .LVL2:
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76 .L3:
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57:uart_async.c **** }
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58:uart_async.c ****
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59:uart_async.c **** int write_pointer = (tx_buffer.end + 1) % UART_TX_BUFFER_SIZE;
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77 .loc 1 59 0
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78 0048 2091 0000 lds r18,tx_buffer+1026
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79 004c 3091 0000 lds r19,tx_buffer+1026+1
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80 0050 C901 movw r24,r18
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81 0052 0196 adiw r24,1
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82 0054 60E0 ldi r22,lo8(512)
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83 0056 72E0 ldi r23,hi8(512)
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84 0058 0E94 0000 call __divmodhi4
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85 .LVL3:
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60:uart_async.c ****
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61:uart_async.c **** if (write_pointer != tx_buffer.start){
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86 .loc 1 61 0
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87 005c 4091 0000 lds r20,tx_buffer+1024
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88 0060 5091 0000 lds r21,tx_buffer+1024+1
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89 0064 8417 cp r24,r20
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90 0066 9507 cpc r25,r21
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91 0068 01F0 breq .L4
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62:uart_async.c **** tx_buffer.buffer[tx_buffer.end] = c;
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92 .loc 1 62 0
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93 006a F901 movw r30,r18
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94 006c EE0F lsl r30
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95 006e FF1F rol r31
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96 0070 E050 subi r30,lo8(-(tx_buffer))
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97 0072 F040 sbci r31,hi8(-(tx_buffer))
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98 0074 1083 st Z,r17
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99 0076 1182 std Z+1,__zero_reg__
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63:uart_async.c **** tx_buffer.end = write_pointer;
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100 .loc 1 63 0
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101 0078 9093 0000 sts tx_buffer+1026+1,r25
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102 007c 8093 0000 sts tx_buffer+1026,r24
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64:uart_async.c ****
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65:uart_async.c **** /* Data available. Enable the transmit interrupt for serial port 0. */
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66:uart_async.c **** UCSR0B |= _BV(UDRIE0);
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103 .loc 1 66 0
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104 0080 8091 C100 lds r24,193
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105 .LVL4:
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106 0084 8062 ori r24,lo8(32)
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107 0086 8093 C100 sts 193,r24
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108 .LVL5:
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109 .L4:
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67:uart_async.c **** }
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68:uart_async.c ****
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69:uart_async.c **** return 0;
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70:uart_async.c **** }
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110 .loc 1 70 0
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111 008a 80E0 ldi r24,lo8(0)
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112 008c 90E0 ldi r25,hi8(0)
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113 /* epilogue start */
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114 008e 1F91 pop r17
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115 .LVL6:
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116 0090 0895 ret
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117 .LFE2:
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119 .global uart_getchar
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121 uart_getchar:
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122 .LFB3:
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71:uart_async.c ****
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72:uart_async.c **** int uart_getchar(FILE *stream) {
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123 .loc 1 72 0
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124 .LVL7:
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125 /* prologue: function */
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126 /* frame size = 0 */
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127 /* stack size = 0 */
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128 .L__stack_usage = 0
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73:uart_async.c **** int read_pointer = (rx_buffer.start + 1) % UART_RX_BUFFER_SIZE;
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129 .loc 1 73 0
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130 0092 8091 0000 lds r24,rx_buffer+64
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131 0096 9091 0000 lds r25,rx_buffer+64+1
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132 .LVL8:
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133 009a 0196 adiw r24,1
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134 009c 60E2 ldi r22,lo8(32)
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135 009e 70E0 ldi r23,hi8(32)
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136 00a0 0E94 0000 call __divmodhi4
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137 .LVL9:
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74:uart_async.c ****
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75:uart_async.c **** rx_buffer.start = read_pointer;
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138 .loc 1 75 0
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139 00a4 9093 0000 sts rx_buffer+64+1,r25
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140 00a8 8093 0000 sts rx_buffer+64,r24
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76:uart_async.c **** return rx_buffer.buffer[read_pointer];
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141 .loc 1 76 0
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142 00ac FC01 movw r30,r24
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143 00ae EE0F lsl r30
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144 00b0 FF1F rol r31
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145 00b2 E050 subi r30,lo8(-(rx_buffer))
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146 00b4 F040 sbci r31,hi8(-(rx_buffer))
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77:uart_async.c **** }
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147 .loc 1 77 0
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148 00b6 8081 ld r24,Z
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149 .LVL10:
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150 00b8 9181 ldd r25,Z+1
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151 /* epilogue start */
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152 00ba 0895 ret
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153 .LFE3:
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155 .global __vector_18
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157 __vector_18:
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158 .LFB4:
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78:uart_async.c ****
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79:uart_async.c **** ISR(USART_RX_vect) {
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159 .loc 1 79 0
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160 00bc 1F92 push r1
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161 .LCFI1:
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162 00be 0F92 push r0
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163 .LCFI2:
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164 00c0 0FB6 in r0,__SREG__
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165 00c2 0F92 push r0
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166 00c4 1124 clr __zero_reg__
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167 00c6 2F93 push r18
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168 .LCFI3:
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169 00c8 3F93 push r19
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170 .LCFI4:
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171 00ca 4F93 push r20
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172 .LCFI5:
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173 00cc 5F93 push r21
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174 .LCFI6:
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175 00ce 6F93 push r22
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176 .LCFI7:
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177 00d0 7F93 push r23
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178 .LCFI8:
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179 00d2 8F93 push r24
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180 .LCFI9:
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181 00d4 9F93 push r25
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182 .LCFI10:
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183 00d6 AF93 push r26
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184 .LCFI11:
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185 00d8 BF93 push r27
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186 .LCFI12:
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187 00da EF93 push r30
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188 .LCFI13:
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189 00dc FF93 push r31
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190 .LCFI14:
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191 /* prologue: Signal */
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192 /* frame size = 0 */
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193 /* stack size = 15 */
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194 .L__stack_usage = 15
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80:uart_async.c **** int write_pointer = (rx_buffer.end + 1) % UART_RX_BUFFER_SIZE;
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195 .loc 1 80 0
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196 00de 2091 0000 lds r18,rx_buffer+66
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197 00e2 3091 0000 lds r19,rx_buffer+66+1
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198 00e6 C901 movw r24,r18
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199 00e8 0196 adiw r24,1
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200 00ea 60E2 ldi r22,lo8(32)
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201 00ec 70E0 ldi r23,hi8(32)
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202 00ee 0E94 0000 call __divmodhi4
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203 .LVL11:
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81:uart_async.c ****
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82:uart_async.c **** /* Add next byte to ringbuffer if it has space available. */
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83:uart_async.c **** if (write_pointer != rx_buffer.start){
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204 .loc 1 83 0
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205 00f2 4091 0000 lds r20,rx_buffer+64
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206 00f6 5091 0000 lds r21,rx_buffer+64+1
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207 00fa 8417 cp r24,r20
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208 00fc 9507 cpc r25,r21
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209 00fe 01F0 breq .L6
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84:uart_async.c **** rx_buffer.buffer[rx_buffer.end] = UDR0;
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210 .loc 1 84 0
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211 0100 4091 C600 lds r20,198
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212 0104 F901 movw r30,r18
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213 0106 EE0F lsl r30
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214 0108 FF1F rol r31
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215 010a E050 subi r30,lo8(-(rx_buffer))
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216 010c F040 sbci r31,hi8(-(rx_buffer))
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217 010e 4083 st Z,r20
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218 0110 1182 std Z+1,__zero_reg__
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85:uart_async.c **** rx_buffer.end = write_pointer;
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219 .loc 1 85 0
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220 0112 9093 0000 sts rx_buffer+66+1,r25
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221 0116 8093 0000 sts rx_buffer+66,r24
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222 .L6:
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223 /* epilogue start */
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86:uart_async.c **** }
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87:uart_async.c **** }
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224 .loc 1 87 0
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225 011a FF91 pop r31
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226 011c EF91 pop r30
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227 011e BF91 pop r27
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228 0120 AF91 pop r26
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229 0122 9F91 pop r25
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230 0124 8F91 pop r24
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231 .LVL12:
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232 0126 7F91 pop r23
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233 0128 6F91 pop r22
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234 012a 5F91 pop r21
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235 012c 4F91 pop r20
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236 012e 3F91 pop r19
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237 0130 2F91 pop r18
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238 0132 0F90 pop r0
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239 0134 0FBE out __SREG__,r0
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240 0136 0F90 pop r0
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241 0138 1F90 pop r1
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242 013a 1895 reti
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243 .LFE4:
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245 .global __vector_19
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247 __vector_19:
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248 .LFB5:
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88:uart_async.c ****
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89:uart_async.c **** ISR(USART_UDRE_vect){
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249 .loc 1 89 0
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250 013c 1F92 push r1
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251 .LCFI15:
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252 013e 0F92 push r0
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253 .LCFI16:
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254 0140 0FB6 in r0,__SREG__
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255 0142 0F92 push r0
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256 0144 1124 clr __zero_reg__
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257 0146 2F93 push r18
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258 .LCFI17:
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259 0148 3F93 push r19
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260 .LCFI18:
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261 014a 5F93 push r21
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262 .LCFI19:
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263 014c 6F93 push r22
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264 .LCFI20:
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265 014e 7F93 push r23
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266 .LCFI21:
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267 0150 8F93 push r24
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268 .LCFI22:
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269 0152 9F93 push r25
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270 .LCFI23:
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271 0154 AF93 push r26
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272 .LCFI24:
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273 0156 BF93 push r27
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274 .LCFI25:
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275 0158 EF93 push r30
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276 .LCFI26:
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277 015a FF93 push r31
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278 .LCFI27:
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279 /* prologue: Signal */
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280 /* frame size = 0 */
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281 /* stack size = 14 */
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282 .L__stack_usage = 14
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90:uart_async.c **** int read_pointer = (tx_buffer.start + 1) % UART_TX_BUFFER_SIZE;
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283 .loc 1 90 0
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284 015c 8091 0000 lds r24,tx_buffer+1024
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285 0160 9091 0000 lds r25,tx_buffer+1024+1
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286 0164 0196 adiw r24,1
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287 0166 60E0 ldi r22,lo8(512)
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288 0168 72E0 ldi r23,hi8(512)
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289 016a 0E94 0000 call __divmodhi4
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290 .LVL13:
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91:uart_async.c ****
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92:uart_async.c **** /* Transmit next byte if data available in ringbuffer. */
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93:uart_async.c **** if (read_pointer != tx_buffer.end) {
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291 .loc 1 93 0
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292 016e 2091 0000 lds r18,tx_buffer+1026
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293 0172 3091 0000 lds r19,tx_buffer+1026+1
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294 0176 8217 cp r24,r18
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295 0178 9307 cpc r25,r19
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296 017a 01F0 breq .L9
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94:uart_async.c **** UDR0 = tx_buffer.buffer[read_pointer];
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297 .loc 1 94 0
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298 017c FC01 movw r30,r24
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299 017e EE0F lsl r30
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300 0180 FF1F rol r31
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301 0182 E050 subi r30,lo8(-(tx_buffer))
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302 0184 F040 sbci r31,hi8(-(tx_buffer))
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303 0186 2081 ld r18,Z
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304 0188 2093 C600 sts 198,r18
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95:uart_async.c **** tx_buffer.start = read_pointer;
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305 .loc 1 95 0
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306 018c 9093 0000 sts tx_buffer+1024+1,r25
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307 0190 8093 0000 sts tx_buffer+1024,r24
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308 0194 00C0 rjmp .L8
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309 .L9:
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96:uart_async.c **** } else {
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97:uart_async.c **** /* Nothing to send. Disable the transmit interrupt for serial port 0. */
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98:uart_async.c **** UCSR0B &= ~_BV(UDRIE0);
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310 .loc 1 98 0
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311 0196 8091 C100 lds r24,193
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312 .LVL14:
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313 019a 8F7D andi r24,lo8(-33)
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314 019c 8093 C100 sts 193,r24
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315 .L8:
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316 /* epilogue start */
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99:uart_async.c **** }
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100:uart_async.c **** }
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317 .loc 1 100 0
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318 01a0 FF91 pop r31
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319 01a2 EF91 pop r30
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320 01a4 BF91 pop r27
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321 01a6 AF91 pop r26
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322 01a8 9F91 pop r25
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323 01aa 8F91 pop r24
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324 01ac 7F91 pop r23
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325 01ae 6F91 pop r22
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326 01b0 5F91 pop r21
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327 01b2 3F91 pop r19
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328 01b4 2F91 pop r18
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329 01b6 0F90 pop r0
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330 01b8 0FBE out __SREG__,r0
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331 01ba 0F90 pop r0
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332 01bc 1F90 pop r1
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333 01be 1895 reti
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334 .LFE5:
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336 .lcomm tx_buffer,1028
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337 .lcomm rx_buffer,68
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564 .Letext0:
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565 .file 2 "/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdio.h"
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566 .file 3 "/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdint.h"
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DEFINED SYMBOLS
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*ABS*:0000000000000000 uart_async.c
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/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchq05jZ.s:2 *ABS*:000000000000003f __SREG__
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/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchq05jZ.s:3 *ABS*:000000000000003e __SP_H__
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/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchq05jZ.s:4 *ABS*:000000000000003d __SP_L__
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/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchq05jZ.s:5 *ABS*:0000000000000000 __tmp_reg__
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/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchq05jZ.s:6 *ABS*:0000000000000001 __zero_reg__
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/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchq05jZ.s:13 .text:0000000000000000 uart_init
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.bss:0000000000000000 tx_buffer
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/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchq05jZ.s:336 .bss:0000000000000404 rx_buffer
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/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchq05jZ.s:57 .text:000000000000003a uart_putchar
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/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchq05jZ.s:121 .text:0000000000000092 uart_getchar
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/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchq05jZ.s:157 .text:00000000000000bc __vector_18
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/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchq05jZ.s:247 .text:000000000000013c __vector_19
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UNDEFINED SYMBOLS
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__do_copy_data
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__do_clear_bss
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__divmodhi4
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