avr/avr_demo
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Driving 595 shift register with SPI.

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This commit is contained in:
Mika Tuupola 2011-11-20 19:11:58 +02:00
parent 4850412316
commit 9512a0dd97
25 changed files with 5098 additions and 2 deletions
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2
hello_uart/uart.c
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@ -29,5 +29,3 @@ int uart_getchar(FILE *stream) {
loop_until_bit_is_set(UCSR0A, RXC0);
return UDR0;
}

64
tpic6b595_spi/.dep/main.o.d Normal file
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@ -0,0 +1,64 @@
main.o: main.c \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdlib.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/include/stddef.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdio.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/inttypes.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/include/stdint.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdint.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/include/stdarg.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h \
main.h uart.h pins.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/sfr_defs.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/io.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/iom328p.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/portpins.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/common.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/version.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/fuse.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/lock.h \
digital.h spi.h
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdlib.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/include/stddef.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdio.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/inttypes.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/include/stdint.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdint.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/include/stdarg.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h:
main.h:
uart.h:
pins.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/sfr_defs.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/io.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/iom328p.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/portpins.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/common.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/version.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/fuse.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/lock.h:
digital.h:
spi.h:

41
tpic6b595_spi/.dep/spi.o.d Normal file
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@ -0,0 +1,41 @@
spi.o: spi.c digital.h pins.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/sfr_defs.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/inttypes.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/include/stdint.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdint.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/io.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/iom328p.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/portpins.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/common.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/version.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/fuse.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/lock.h \
spi.h
digital.h:
pins.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/sfr_defs.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/inttypes.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/include/stdint.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdint.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/io.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/iom328p.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/portpins.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/common.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/version.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/fuse.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/lock.h:
spi.h:

49
tpic6b595_spi/.dep/uart_async.o.d Normal file
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@ -0,0 +1,49 @@
uart_async.o: uart_async.c \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/io.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/sfr_defs.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/inttypes.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/include/stdint.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdint.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/iom328p.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/portpins.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/common.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/version.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/fuse.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/lock.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/interrupt.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdio.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/include/stdarg.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/include/stddef.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/setbaud.h
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/io.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/sfr_defs.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/inttypes.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/include/stdint.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdint.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/iom328p.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/portpins.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/common.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/version.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/fuse.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/lock.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/interrupt.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdio.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/include/stdarg.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/include/stddef.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/setbaud.h:

501
tpic6b595_spi/Makefile Normal file
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@ -0,0 +1,501 @@
# ----------------------------------------------------------------------------
# Makefile based on WinAVR Makefile Template written by Eric B. Weddington,
# Jörg Wunsch, et al.
#
# Adjust F_CPU below to the clock frequency in Mhz of your AVR target
#
# Adjust the size of the uart receive and transmit ringbuffer in bytes using
# defines -DUART_RX_BUFFER_SIZE=128 and -DUART_TX_BUFFER_SIZE=128 in the
# CDEF section below
#
#----------------------------------------------------------------------------
# On command line:
#
# make all = Make software.
#
# make clean = Clean out built project files.
#
# make coff = Convert ELF to AVR COFF.
#
# make extcoff = Convert ELF to AVR Extended COFF.
#
# make program = Download the hex file to the device, using avrdude.
# Please customize the avrdude settings below first!
#
# make debug = Start either simulavr or avarice as specified for debugging,
# with avr-gdb or avr-insight as the front end for debugging.
#
# make filename.s = Just compile filename.c into the assembler code only.
#
# make filename.i = Create a preprocessed source file for use in submitting
# bug reports to the GCC project.
#
# To rebuild project do "make clean" then "make all".
#----------------------------------------------------------------------------
# MCU name
MCU = atmega328p
# Processor frequency.
# This will define a symbol, F_CPU, in all source code files equal to the
# processor frequency. You can then use this symbol in your source code to
# calculate timings. Do NOT tack on a 'UL' at the end, this will be done
# automatically to create a 32-bit value in your source code.
F_CPU = 16000000
# Output format. (can be srec, ihex, binary)
FORMAT = ihex
# Target file name (without extension).
TARGET = main
# List C source files here. (C dependencies are automatically generated.)
SRC = $(TARGET).c uart_async.c spi.c
# List Assembler source files here.
# Make them always end in a capital .S. Files ending in a lowercase .s
# will not be considered source files but generated files (assembler
# output from the compiler), and will be deleted upon "make clean"!
# Even though the DOS/Win* filesystem matches both .s and .S the same,
# it will preserve the spelling of the filenames, and gcc itself does
# care about how the name is spelled on its command-line.
ASRC =
# Optimization level, can be [0, 1, 2, 3, s].
# 0 = turn off optimization. s = optimize for size.
# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
OPT = s
# Debugging format.
# Native formats for AVR-GCC's -g are dwarf-2 [default] or stabs.
# AVR Studio 4.10 requires dwarf-2.
# AVR [Extended] COFF format requires stabs, plus an avr-objcopy run.
DEBUG = dwarf-2
# List any extra directories to look for include files here.
# Each directory must be seperated by a space.
# Use forward slashes for directory separators.
# For a directory that has spaces, enclose it in quotes.
EXTRAINCDIRS =
# Compiler flag to set the C Standard level.
# c89 = "ANSI" C
# gnu89 = c89 plus GCC extensions
# c99 = ISO C99 standard (not yet fully implemented)
# gnu99 = c99 plus GCC extensions
CSTANDARD = -std=gnu99
# Place -D or -U options here
CDEFS = -DF_CPU=$(F_CPU)UL
# uncomment and adapt these line if you want different UART library buffer size
#CDEFS += -DUART_RX_BUFFER_SIZE=128
#CDEFS += -DUART_TX_BUFFER_SIZE=128
# Place -I options here
CINCS =
#---------------- Compiler Options ----------------
# -g*: generate debugging information
# -O*: optimization level
# -f...: tuning, see GCC manual and avr-libc documentation
# -Wall...: warning level
# -Wa,...: tell GCC to pass this to the assembler.
# -adhlns...: create assembler listing
CFLAGS = -g$(DEBUG)
CFLAGS += $(CDEFS) $(CINCS)
CFLAGS += -O$(OPT)
CFLAGS += -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums
CFLAGS += -Wall -Wstrict-prototypes
CFLAGS += -Wa,-adhlns=$(<:.c=.lst)
CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
CFLAGS += $(CSTANDARD)
#---------------- Assembler Options ----------------
# -Wa,...: tell GCC to pass this to the assembler.
# -ahlms: create listing
# -gstabs: have the assembler create line number information; note that
# for use in COFF files, additional information about filenames
# and function names needs to be present in the assembler source
# files -- see avr-libc docs [FIXME: not yet described there]
ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs
#---------------- Library Options ----------------
# Minimalistic printf version
PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min
# Floating point printf version (requires MATH_LIB = -lm below)
PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt
# If this is left blank, then it will use the Standard printf version.
PRINTF_LIB =
#PRINTF_LIB = $(PRINTF_LIB_MIN)
#PRINTF_LIB = $(PRINTF_LIB_FLOAT)
# Minimalistic scanf version
SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min
# Floating point + %[ scanf version (requires MATH_LIB = -lm below)
SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt
# If this is left blank, then it will use the Standard scanf version.
SCANF_LIB =
#SCANF_LIB = $(SCANF_LIB_MIN)
#SCANF_LIB = $(SCANF_LIB_FLOAT)
MATH_LIB = -lm
#---------------- External Memory Options ----------------
# 64 KB of external RAM, starting after internal RAM (ATmega128!),
# used for variables (.data/.bss) and heap (malloc()).
#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff
# 64 KB of external RAM, starting after internal RAM (ATmega128!),
# only used for heap (malloc()).
#EXTMEMOPTS = -Wl,--defsym=__heap_start=0x801100,--defsym=__heap_end=0x80ffff
EXTMEMOPTS =
#---------------- Linker Options ----------------
# -Wl,...: tell GCC to pass this to linker.
# -Map: create map file
# --cref: add cross reference to map file
LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
LDFLAGS += $(EXTMEMOPTS)
LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
#---------------- Programming Options (avrdude) ----------------
# Programming hardware: alf avr910 avrisp bascom bsd
# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500
#
# Type: avrdude -c ?
# to get a full listing.
#
AVRDUDE_PROGRAMMER = arduino
# com1 = serial port. Use lpt1 to connect to parallel port.
AVRDUDE_PORT = /dev/tty.usb* # programmer connected to serial device
AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex
#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep
# Uncomment the following if you want avrdude's erase cycle counter.
# Note that this counter needs to be initialized first using -Yn,
# see avrdude manual.
#AVRDUDE_ERASE_COUNTER = -y
# Uncomment the following if you do /not/ wish a verification to be
# performed after programming the device.
#AVRDUDE_NO_VERIFY = -V
# Increase verbosity level. Please use this when submitting bug
# reports about avrdude. See <http://savannah.nongnu.org/projects/avrdude>
# to submit bug reports.
#AVRDUDE_VERBOSE = -v -v
AVRDUDE_FLAGS = -p $(MCU) -P $(AVRDUDE_PORT) -c $(AVRDUDE_PROGRAMMER) -b 57600
AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY)
AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE)
AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER)
#---------------- Debugging Options ----------------
# For simulavr only - target MCU frequency.
DEBUG_MFREQ = $(F_CPU)
# Set the DEBUG_UI to either gdb or insight.
# DEBUG_UI = gdb
DEBUG_UI = insight
# Set the debugging back-end to either avarice, simulavr.
DEBUG_BACKEND = avarice
#DEBUG_BACKEND = simulavr
# GDB Init Filename.
GDBINIT_FILE = __avr_gdbinit
# When using avarice settings for the JTAG
JTAG_DEV = /dev/com1
# Debugging port used to communicate between GDB / avarice / simulavr.
DEBUG_PORT = 4242
# Debugging host used to communicate between GDB / avarice / simulavr, normally
# just set to localhost unless doing some sort of crazy debugging when
# avarice is running on a different computer.
DEBUG_HOST = localhost
#============================================================================
# Define programs and commands.
SHELL = sh
CC = avr-gcc
OBJCOPY = avr-objcopy
OBJDUMP = avr-objdump
SIZE = avr-size
NM = avr-nm
AVRDUDE = avrdude
REMOVE = rm -f
COPY = cp
WINSHELL = cmd
# Define Messages
# English
MSG_ERRORS_NONE = Errors: none
MSG_BEGIN = -------- begin --------
MSG_END = -------- end --------
MSG_SIZE_BEFORE = Size before:
MSG_SIZE_AFTER = Size after:
MSG_COFF = Converting to AVR COFF:
MSG_EXTENDED_COFF = Converting to AVR Extended COFF:
MSG_FLASH = Creating load file for Flash:
MSG_EEPROM = Creating load file for EEPROM:
MSG_EXTENDED_LISTING = Creating Extended Listing:
MSG_SYMBOL_TABLE = Creating Symbol Table:
MSG_LINKING = Linking:
MSG_COMPILING = Compiling:
MSG_ASSEMBLING = Assembling:
MSG_CLEANING = Cleaning project:
# Define all object files.
OBJ = $(SRC:.c=.o) $(ASRC:.S=.o)
# Define all listing files.
LST = $(SRC:.c=.lst) $(ASRC:.S=.lst)
# Compiler flags to generate dependency files.
GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d
# Combine all necessary flags and optional flags.
# Add target processor to flags.
ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS)
ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS)
# Default target.
all: begin gccversion sizebefore build sizeafter end
build: elf hex eep lss sym
elf: $(TARGET).elf
hex: $(TARGET).hex
eep: $(TARGET).eep
lss: $(TARGET).lss
sym: $(TARGET).sym
# Eye candy.
# AVR Studio 3.x does not check make's exit code but relies on
# the following magic strings to be generated by the compile job.
begin:
@echo
@echo $(MSG_BEGIN)
end:
@echo $(MSG_END)
@echo
# Display size of file.
HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
ELFSIZE = $(SIZE) -A $(TARGET).elf
AVRMEM = avr-mem.sh $(TARGET).elf $(MCU)
sizebefore:
@if test -f $(TARGET).elf; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); \
$(AVRMEM) 2>/dev/null; echo; fi
sizeafter:
@if test -f $(TARGET).elf; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); \
$(AVRMEM) 2>/dev/null; echo; fi
# Display compiler version information.
gccversion :
@$(CC) --version
# Program the device.
program: $(TARGET).hex $(TARGET).eep
$(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH) $(AVRDUDE_WRITE_EEPROM)
# Generate avr-gdb config/init file which does the following:
# define the reset signal, load the target file, connect to target, and set
# a breakpoint at main().
gdb-config:
@$(REMOVE) $(GDBINIT_FILE)
@echo define reset >> $(GDBINIT_FILE)
@echo SIGNAL SIGHUP >> $(GDBINIT_FILE)
@echo end >> $(GDBINIT_FILE)
@echo file $(TARGET).elf >> $(GDBINIT_FILE)
@echo target remote $(DEBUG_HOST):$(DEBUG_PORT) >> $(GDBINIT_FILE)
ifeq ($(DEBUG_BACKEND),simulavr)
@echo load >> $(GDBINIT_FILE)
endif
@echo break main >> $(GDBINIT_FILE)
debug: gdb-config $(TARGET).elf
ifeq ($(DEBUG_BACKEND), avarice)
@echo Starting AVaRICE - Press enter when "waiting to connect" message displays.
@$(WINSHELL) /c start avarice --jtag $(JTAG_DEV) --erase --program --file \
$(TARGET).elf $(DEBUG_HOST):$(DEBUG_PORT)
@$(WINSHELL) /c pause
else
@$(WINSHELL) /c start simulavr --gdbserver --device $(MCU) --clock-freq \
$(DEBUG_MFREQ) --port $(DEBUG_PORT)
endif
@$(WINSHELL) /c start avr-$(DEBUG_UI) --command=$(GDBINIT_FILE)
# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB.
COFFCONVERT=$(OBJCOPY) --debugging \
--change-section-address .data-0x800000 \
--change-section-address .bss-0x800000 \
--change-section-address .noinit-0x800000 \
--change-section-address .eeprom-0x810000
coff: $(TARGET).elf
@echo
@echo $(MSG_COFF) $(TARGET).cof
$(COFFCONVERT) -O coff-avr $< $(TARGET).cof
extcoff: $(TARGET).elf
@echo
@echo $(MSG_EXTENDED_COFF) $(TARGET).cof
$(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof
# Create final output files (.hex, .eep) from ELF output file.
%.hex: %.elf
@echo
@echo $(MSG_FLASH) $@
$(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@
%.eep: %.elf
@echo
@echo $(MSG_EEPROM) $@
-$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \
--change-section-lma .eeprom=0 -O $(FORMAT) $< $@
# Create extended listing file from ELF output file.
%.lss: %.elf
@echo
@echo $(MSG_EXTENDED_LISTING) $@
$(OBJDUMP) -h -S $< > $@
# Create a symbol table from ELF output file.
%.sym: %.elf
@echo
@echo $(MSG_SYMBOL_TABLE) $@
$(NM) -n $< > $@
# Link: create ELF output file from object files.
.SECONDARY : $(TARGET).elf
.PRECIOUS : $(OBJ)
%.elf: $(OBJ)
@echo
@echo $(MSG_LINKING) $@
$(CC) $(ALL_CFLAGS) $^ --output $@ $(LDFLAGS)
# Compile: create object files from C source files.
%.o : %.c
@echo
@echo $(MSG_COMPILING) $<
$(CC) -c $(ALL_CFLAGS) $< -o $@
# Compile: create assembler files from C source files.
%.s : %.c
$(CC) -S $(ALL_CFLAGS) $< -o $@
# Assemble: create object files from assembler source files.
%.o : %.S
@echo
@echo $(MSG_ASSEMBLING) $<
$(CC) -c $(ALL_ASFLAGS) $< -o $@
# Create preprocessed source for use in sending a bug report.
%.i : %.c
$(CC) -E -mmcu=$(MCU) -I. $(CFLAGS) $< -o $@
# Target: clean project.
clean: begin clean_list end
clean_list :
@echo
@echo $(MSG_CLEANING)
$(REMOVE) $(TARGET).hex
$(REMOVE) $(TARGET).eep
$(REMOVE) $(TARGET).cof
$(REMOVE) $(TARGET).elf
$(REMOVE) $(TARGET).map
$(REMOVE) $(TARGET).sym
$(REMOVE) $(TARGET).lss
$(REMOVE) $(OBJ)
$(REMOVE) $(LST)
$(REMOVE) $(SRC:.c=.s)
$(REMOVE) $(SRC:.c=.d)
$(REMOVE) .dep/*
# Include the dependency files.
-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
# Listing of phony targets.
.PHONY : all begin finish end sizebefore sizeafter gccversion \
build elf hex eep lss sym coff extcoff \
clean clean_list program debug gdb-config

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/*
* digital.h
*
* Lightweight macro implementation of Arduino style pin numbering
* for AVR microprocessors. Because only thing I want to use from
* Arduino libraries is the pin numbering scheme.
*
* This file taken 99% from the excellent ArduinoLite project by
* Shikai Chen <csk@live.com>. Some minor changes to suite my personal
* coding taste.
*
* http://code.google.com/p/arduino-lite/
* http://www.csksoft.net/
*
* Copyright (c) 2010-2011 Shikai Chen
*
* Licensed under the LGPL 2.1 license:
* http://www.opensource.org/licenses/lgpl-2.1.php
*/
#ifndef DIGITAL_H
#define DIGITAL_H
#include "pins.h"
#define digital_read(pin) EXPAND_WRAPPER(_D_READ, ARDUINOPIN_TO_PORTID(pin), ARDUINOPIN_TO_PORTMSK(pin) )
#define digital_read_raw(pin) EXPAND_WRAPPER(_D_READ_RAW, ARDUINOPIN_TO_PORTID(pin), ARDUINOPIN_TO_PORTMSK(pin) )
#define digital_write(pin, val) D_WRITE_##val(pin)
#endif /* DIGITAL_H */

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/*
* Code to write data to TPIC6B595 SIPO shift register.
*
* The TPIC6B595 is a monolithic, high-voltage, medium-current power 8-bit
* shift register designed for use in systems that require relatively high
* load power.
*
* This device contains an 8-bit serial-in, parallel-out shift register that
* feeds an 8-bit D-type storage register. Data transfers through both the
* shift and storage registers on the rising edge of the shift-register clock
* (SRCK) and the register clock (RCK), respectively. The storage register
* transfers data to the output buffer when shift-register clear (SRCLR) is
* high. When SRCLR is low, the input shift register is cleared. When output
* enable (G) is held high, all data in the output buffers is held low and all
* drain outputs are off. When G is held low, data from the storage register
* is transparent to the output buffers. When data in the output buffers is
* low, the DMOS-transistor outputs are off. When data is high, the DMOS-
* transistor outputs have sink-current capability. The serial output (SER
* OUT) allows for cascading of the data from the shift register to additional
* devices.
*
* http://www.adafruit.com/datasheets/tpic6b595.pdf
* http://www.atmel.com/dyn/resources/prod_documents/doc2585.pdf
* http://www.atmel.com/dyn/resources/prod_documents/doc8025.pdf
*
* To compile and upload run: make clean; make; make program;
*
* Copyright 2011 Mika Tuupola
*
* Licensed under the MIT license:
* http://www.opensource.org/licenses/mit-license.php
*
*/
#include <stdlib.h>
#include <stdio.h>
#include <util/delay.h>
//#include <avr/io.h>
#include "main.h"
#include "uart.h"
#include "pins.h"
#include "digital.h"
#include "spi.h"
static void init(void) {
}
/* Assumes MSB first. */
void shift_out(uint8_t data) {
spi_transfer(data);
}
int main(void) {
init();
uart_init();
spi_init();
stdout = &uart_output;
stdin = &uart_input;
char binary[17];
/* Show pattern for 5 seconds. */
shift_out(0b10101010);
shift_out(0b11110000);
digital_write(SPI_SS, LOW);
digital_write(SPI_SS, HIGH);
_delay_ms(5000);
while (1) {
for(uint16_t i = 0; i < 0xffff; i++) {
/* Print the number to serial for debugging. */
itoa(i, binary, 2);
printf("%s %d \n", binary, i);
/* Shift high byte first to shift register. */
shift_out(i >> 8);
shift_out(i & 0xff);
/* Pulse latch to transfer data from shift registers */
/* to storage registers. */
//digital_write(LATCH, LOW);
//digital_write(LATCH, HIGH);
digital_write(SPI_SS, LOW);
digital_write(SPI_SS, HIGH);
_delay_ms(50);
}
}
return 0;
}

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:00000001FF

BIN
tpic6b595_spi/main.elf Executable file
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2
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static void init(void);
int main(void);

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1 .file "main.c"
2 __SREG__ = 0x3f
3 __SP_H__ = 0x3e
4 __SP_L__ = 0x3d
5 __tmp_reg__ = 0
6 __zero_reg__ = 1
7 .global __do_copy_data
8 .global __do_clear_bss
9 .text
10 .Ltext0:
11 .global shift_out
13 shift_out:
14 .LFB6:
15 .file 1 "main.c"
1:main.c **** /*
2:main.c **** * Code to write data to TPIC6B595 SIPO shift register.
3:main.c **** *
4:main.c **** * The TPIC6B595 is a monolithic, high-voltage, medium-current power 8-bit
5:main.c **** * shift register designed for use in systems that require relatively high
6:main.c **** * load power.
7:main.c **** *
8:main.c **** * This device contains an 8-bit serial-in, parallel-out shift register that
9:main.c **** * feeds an 8-bit D-type storage register. Data transfers through both the
10:main.c **** * shift and storage registers on the rising edge of the shift-register clock
11:main.c **** * (SRCK) and the register clock (RCK), respectively. The storage register
12:main.c **** * transfers data to the output buffer when shift-register clear (SRCLR) is
13:main.c **** * high. When SRCLR is low, the input shift register is cleared. When output
14:main.c **** * enable (G) is held high, all data in the output buffers is held low and all
15:main.c **** * drain outputs are off. When G is held low, data from the storage register
16:main.c **** * is transparent to the output buffers. When data in the output buffers is
17:main.c **** * low, the DMOS-transistor outputs are off. When data is high, the DMOS-
18:main.c **** * transistor outputs have sink-current capability. The serial output (SER
19:main.c **** * OUT) allows for cascading of the data from the shift register to additional
20:main.c **** * devices.
21:main.c **** *
22:main.c **** * http://www.adafruit.com/datasheets/tpic6b595.pdf
23:main.c **** * http://www.atmel.com/dyn/resources/prod_documents/doc2585.pdf
24:main.c **** * http://www.atmel.com/dyn/resources/prod_documents/doc8025.pdf
25:main.c **** *
26:main.c **** * To compile and upload run: make clean; make; make program;
27:main.c **** *
28:main.c **** * Copyright 2011 Mika Tuupola
29:main.c **** *
30:main.c **** * Licensed under the MIT license:
31:main.c **** * http://www.opensource.org/licenses/mit-license.php
32:main.c **** *
33:main.c **** */
34:main.c ****
35:main.c **** #include <stdlib.h>
36:main.c **** #include <stdio.h>
37:main.c **** #include <util/delay.h>
38:main.c **** //#include <avr/io.h>
39:main.c ****
40:main.c **** #include "main.h"
41:main.c **** #include "uart.h"
42:main.c **** #include "pins.h"
43:main.c **** #include "digital.h"
44:main.c **** #include "spi.h"
45:main.c ****
46:main.c **** static void init(void) {
47:main.c **** }
48:main.c ****
49:main.c **** /* Assumes MSB first. */
50:main.c **** void shift_out(uint8_t data) {
16 .loc 1 50 0
17 .LVL0:
18 /* prologue: function */
19 /* frame size = 0 */
20 /* stack size = 0 */
21 .L__stack_usage = 0
51:main.c **** spi_transfer(data);
22 .loc 1 51 0
23 0000 0E94 0000 call spi_transfer
24 .LVL1:
25 /* epilogue start */
52:main.c **** }
26 .loc 1 52 0
27 0004 0895 ret
28 .LFE6:
30 .data
31 .LC0:
32 0000 2573 2025 .string "%s %d \n"
32 6420 0A00
33 .section .text.startup,"ax",@progbits
34 .global main
36 main:
37 .LFB7:
53:main.c ****
54:main.c **** int main(void) {
38 .loc 1 54 0
39 0000 CF93 push r28
40 .LCFI0:
41 0002 DF93 push r29
42 .LCFI1:
43 0004 CDB7 in r28,__SP_L__
44 0006 DEB7 in r29,__SP_H__
45 0008 6197 sbiw r28,17
46 .LCFI2:
47 000a 0FB6 in __tmp_reg__,__SREG__
48 000c F894 cli
49 000e DEBF out __SP_H__,r29
50 0010 0FBE out __SREG__,__tmp_reg__
51 0012 CDBF out __SP_L__,r28
52 /* prologue: function */
53 /* frame size = 17 */
54 /* stack size = 19 */
55 .L__stack_usage = 19
55:main.c ****
56:main.c **** init();
57:main.c **** uart_init();
56 .loc 1 57 0
57 0014 0E94 0000 call uart_init
58:main.c **** spi_init();
58 .loc 1 58 0
59 0018 0E94 0000 call spi_init
59:main.c **** stdout = &uart_output;
60 .loc 1 59 0
61 001c 80E0 ldi r24,lo8(uart_output)
62 001e 90E0 ldi r25,hi8(uart_output)
63 0020 9093 0000 sts __iob+2+1,r25
64 0024 8093 0000 sts __iob+2,r24
60:main.c **** stdin = &uart_input;
65 .loc 1 60 0
66 0028 80E0 ldi r24,lo8(uart_input)
67 002a 90E0 ldi r25,hi8(uart_input)
68 002c 9093 0000 sts __iob+1,r25
69 0030 8093 0000 sts __iob,r24
61:main.c ****
62:main.c **** char binary[17];
63:main.c ****
64:main.c **** /* Show pattern for 5 seconds. */
65:main.c **** shift_out(0b10101010);
70 .loc 1 65 0
71 0034 8AEA ldi r24,lo8(-86)
72 0036 0E94 0000 call shift_out
66:main.c **** shift_out(0b11110000);
73 .loc 1 66 0
74 003a 80EF ldi r24,lo8(-16)
75 003c 0E94 0000 call shift_out
67:main.c **** digital_write(SPI_SS, LOW);
76 .loc 1 67 0
77 0040 2A98 cbi 37-0x20,2
68:main.c **** digital_write(SPI_SS, HIGH);
78 .loc 1 68 0
79 0042 2A9A sbi 37-0x20,2
80 .LVL2:
81 0044 80E5 ldi r24,lo8(-15536)
82 0046 93EC ldi r25,hi8(-15536)
83 .LBB21:
84 .LBB22:
85 .LBB23:
86 .LBB24:
87 .file 2 "/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basi
1:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** /* Copyright (c) 2002, Marek Michalkiewicz
2:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** Copyright (c) 2007 Joerg Wunsch
3:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** All rights reserved.
4:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
5:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** Redistribution and use in source and binary forms, with or without
6:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** modification, are permitted provided that the following conditions are met:
7:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
8:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** * Redistributions of source code must retain the above copyright
9:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** notice, this list of conditions and the following disclaimer.
10:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
11:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** * Redistributions in binary form must reproduce the above copyright
12:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** notice, this list of conditions and the following disclaimer in
13:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** the documentation and/or other materials provided with the
14:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** distribution.
15:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
16:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** * Neither the name of the copyright holders nor the names of
17:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** contributors may be used to endorse or promote products derived
18:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** from this software without specific prior written permission.
19:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
20:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** POSSIBILITY OF SUCH DAMAGE. */
31:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
32:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** /* $Id: delay_basic.h 2143 2010-06-08 21:19:51Z joerg_wunsch $ */
33:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
34:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** #ifndef _UTIL_DELAY_BASIC_H_
35:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** #define _UTIL_DELAY_BASIC_H_ 1
36:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
37:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** #include <inttypes.h>
38:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
39:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** #if !defined(__DOXYGEN__)
40:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** static inline void _delay_loop_1(uint8_t __count) __attribute__((always_inline));
41:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** static inline void _delay_loop_2(uint16_t __count) __attribute__((always_inline));
42:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** #endif
43:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
44:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** /** \file */
45:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** /** \defgroup util_delay_basic <util/delay_basic.h>: Basic busy-wait delay loops
46:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** \code
47:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** #include <util/delay_basic.h>
48:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** \endcode
49:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
50:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** The functions in this header file implement simple delay loops
51:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** that perform a busy-waiting. They are typically used to
52:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** facilitate short delays in the program execution. They are
53:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** implemented as count-down loops with a well-known CPU cycle
54:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** count per loop iteration. As such, no other processing can
55:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** occur simultaneously. It should be kept in mind that the
56:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** functions described here do not disable interrupts.
57:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
58:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** In general, for long delays, the use of hardware timers is
59:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** much preferrable, as they free the CPU, and allow for
60:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** concurrent processing of other events while the timer is
61:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** running. However, in particular for very short delays, the
62:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** overhead of setting up a hardware timer is too much compared
63:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** to the overall delay time.
64:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
65:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** Two inline functions are provided for the actual delay algorithms.
66:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
67:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** */
68:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
69:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** /** \ingroup util_delay_basic
70:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
71:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** Delay loop using an 8-bit counter \c __count, so up to 256
72:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** iterations are possible. (The value 256 would have to be passed
73:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** as 0.) The loop executes three CPU cycles per iteration, not
74:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** including the overhead the compiler needs to setup the counter
75:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** register.
76:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
77:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** Thus, at a CPU speed of 1 MHz, delays of up to 768 microseconds
78:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** can be achieved.
79:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** */
80:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** void
81:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** _delay_loop_1(uint8_t __count)
82:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** {
83:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** __asm__ volatile (
84:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** "1: dec %0" "\n\t"
85:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** "brne 1b"
86:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** : "=r" (__count)
87:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** : "0" (__count)
88:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** );
89:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** }
90:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
91:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** /** \ingroup util_delay_basic
92:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
93:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** Delay loop using a 16-bit counter \c __count, so up to 65536
94:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** iterations are possible. (The value 65536 would have to be
95:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** passed as 0.) The loop executes four CPU cycles per iteration,
96:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** not including the overhead the compiler requires to setup the
97:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** counter register pair.
98:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
99:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** Thus, at a CPU speed of 1 MHz, delays of up to about 262.1
100:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** milliseconds can be achieved.
101:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** */
102:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** void
103:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** _delay_loop_2(uint16_t __count)
104:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** {
105:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** __asm__ volatile (
88 .loc 2 105 0
89 0048 20E9 ldi r18,lo8(400)
90 004a 31E0 ldi r19,hi8(400)
91 .LVL3:
92 .L3:
93 004c F901 movw r30,r18
94 /* #APP */
95 ; 105 "/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic
96 004e 3197 1: sbiw r30,1
97 0050 01F4 brne 1b
98 ; 0 "" 2
99 .LVL4:
100 /* #NOAPP */
101 0052 0197 sbiw r24,1
102 .LBE24:
103 .LBE23:
104 .file 3 "/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h"
1:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** /* Copyright (c) 2002, Marek Michalkiewicz
2:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** Copyright (c) 2004,2005,2007 Joerg Wunsch
3:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** Copyright (c) 2007 Florin-Viorel Petrov
4:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** All rights reserved.
5:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
6:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** Redistribution and use in source and binary forms, with or without
7:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** modification, are permitted provided that the following conditions are met:
8:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
9:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** * Redistributions of source code must retain the above copyright
10:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** notice, this list of conditions and the following disclaimer.
11:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
12:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** * Redistributions in binary form must reproduce the above copyright
13:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** notice, this list of conditions and the following disclaimer in
14:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** the documentation and/or other materials provided with the
15:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** distribution.
16:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
17:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** * Neither the name of the copyright holders nor the names of
18:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** contributors may be used to endorse or promote products derived
19:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** from this software without specific prior written permission.
20:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
21:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** POSSIBILITY OF SUCH DAMAGE. */
32:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
33:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** /* $Id: delay.h.in 2189 2010-10-13 09:39:34Z aboyapati $ */
34:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
35:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #ifndef _UTIL_DELAY_H_
36:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #define _UTIL_DELAY_H_ 1
37:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
38:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #ifndef __HAS_DELAY_CYCLES
39:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #define __HAS_DELAY_CYCLES 0
40:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #endif
41:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
42:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #include <inttypes.h>
43:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #include <util/delay_basic.h>
44:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
45:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** /** \file */
46:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** /** \defgroup util_delay <util/delay.h>: Convenience functions for busy-wait delay loops
47:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** \code
48:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #define F_CPU 1000000UL // 1 MHz
49:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** //#define F_CPU 14.7456E6
50:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #include <util/delay.h>
51:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** \endcode
52:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
53:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** \note As an alternative method, it is possible to pass the
54:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** F_CPU macro down to the compiler from the Makefile.
55:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** Obviously, in that case, no \c \#define statement should be
56:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** used.
57:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
58:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** The functions in this header file are wrappers around the basic
59:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** busy-wait functions from <util/delay_basic.h>. They are meant as
60:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** convenience functions where actual time values can be specified
61:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** rather than a number of cycles to wait for. The idea behind is
62:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** that compile-time constant expressions will be eliminated by
63:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** compiler optimization so floating-point expressions can be used
64:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** to calculate the number of delay cycles needed based on the CPU
65:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** frequency passed by the macro F_CPU.
66:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
67:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** \note In order for these functions to work as intended, compiler
68:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** optimizations <em>must</em> be enabled, and the delay time
69:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** <em>must</em> be an expression that is a known constant at
70:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** compile-time. If these requirements are not met, the resulting
71:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** delay will be much longer (and basically unpredictable), and
72:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** applications that otherwise do not use floating-point calculations
73:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** will experience severe code bloat by the floating-point library
74:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** routines linked into the application.
75:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
76:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** The functions available allow the specification of microsecond, and
77:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** millisecond delays directly, using the application-supplied macro
78:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** F_CPU as the CPU clock frequency (in Hertz).
79:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
80:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** */
81:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
82:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #if !defined(__DOXYGEN__)
83:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** static inline void _delay_us(double __us) __attribute__((always_inline));
84:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** static inline void _delay_ms(double __ms) __attribute__((always_inline));
85:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #endif
86:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
87:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #ifndef F_CPU
88:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** /* prevent compiler error by supplying a default */
89:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** # warning "F_CPU not defined for <util/delay.h>"
90:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** # define F_CPU 1000000UL
91:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #endif
92:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
93:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #ifndef __OPTIMIZE__
94:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** # warning "Compiler optimizations disabled; functions from <util/delay.h> won't work as designed"
95:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #endif
96:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
97:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** /**
98:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** \ingroup util_delay
99:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
100:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** Perform a delay of \c __ms milliseconds, using _delay_loop_2().
101:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
102:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** The macro F_CPU is supposed to be defined to a
103:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** constant defining the CPU clock frequency (in Hertz).
104:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
105:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** The maximal possible delay is 262.14 ms / F_CPU in MHz.
106:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
107:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** When the user request delay which exceed the maximum possible one,
108:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** _delay_ms() provides a decreased resolution functionality. In this
109:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** mode _delay_ms() will work with a resolution of 1/10 ms, providing
110:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** delays up to 6.5535 seconds (independent from CPU frequency). The
111:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** user will not be informed about decreased resolution.
112:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
113:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** If the avr-gcc toolchain has __builtin_avr_delay_cycles(unsigned long)
114:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** support, maximal possible delay is 4294967.295 ms/ F_CPU in MHz. For
115:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** values greater than the maximal possible delay, overflows results in
116:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** no delay i.e., 0ms.
117:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
118:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** Conversion of __us into clock cycles may not always result in integer.
119:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** By default, the clock cycles rounded up to next integer. This ensures that
120:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** the user gets atleast __us microseconds of delay.
121:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
122:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** Alternatively, user can define __DELAY_ROUND_DOWN__ and __DELAY_ROUND_CLOSEST__
123:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** to round down and round to closest integer.
124:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
125:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** Note: The new implementation of _delay_ms(double __ms) with
126:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** __builtin_avr_delay_cycles(unsigned long) support is not backward compatible.
127:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** User can define __DELAY_BACKWARD_COMPATIBLE__ to get a backward compatible delay
128:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** although this will be deprecated in future.
129:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
130:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** */
131:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** void
132:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** _delay_ms(double __ms)
133:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** {
134:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** uint16_t __ticks;
135:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** double __tmp ;
136:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #if __HAS_DELAY_CYCLES && defined(__OPTIMIZE__) && !defined(__DELAY_BACKWARD_COMPATIBLE__)
137:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** uint32_t __ticks_dc;
138:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** extern void __builtin_avr_delay_cycles(unsigned long);
139:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** __tmp = ((F_CPU) / 1e3) * __ms;
140:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
141:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #if defined(__DELAY_ROUND_DOWN__)
142:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** __ticks_dc = (uint32_t)fabs(__tmp);
143:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
144:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #elif defined(__DELAY_ROUND_CLOSEST__)
145:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** __ticks_dc = (uint32_t)(fabs(__tmp)+0.5);
146:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
147:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #else
148:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** //round up by default
149:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** __ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
150:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #endif
151:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
152:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** __builtin_avr_delay_cycles(__ticks_dc);
153:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
154:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #elif !__HAS_DELAY_CYCLES || (__HAS_DELAY_CYCLES && !defined(__OPTIMIZE__)) || defined (__DELAY_BAC
155:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** __tmp = ((F_CPU) / 4e3) * __ms;
156:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** if (__tmp < 1.0)
157:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** __ticks = 1;
158:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** else if (__tmp > 65535)
159:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** {
160:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** // __ticks = requested delay in 1/10 ms
161:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** __ticks = (uint16_t) (__ms * 10.0);
162:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** while(__ticks)
105 .loc 3 162 0
106 0054 01F4 brne .L3
107 0056 00E0 ldi r16,lo8(0)
108 0058 10E0 ldi r17,hi8(0)
109 .LBE22:
110 .LBE21:
111 .LBB25:
69:main.c **** _delay_ms(5000);
70:main.c ****
71:main.c **** while (1) {
72:main.c **** for(uint16_t i = 0; i < 0xffff; i++) {
73:main.c ****
74:main.c **** /* Print the number to serial for debugging. */
75:main.c **** itoa(i, binary, 2);
112 .loc 1 75 0
113 005a 7E01 movw r14,r28
114 005c 0894 sec
115 005e E11C adc r14,__zero_reg__
116 0060 F11C adc r15,__zero_reg__
76:main.c **** printf("%s %d \n", binary, i);
117 .loc 1 76 0
118 0062 80E0 ldi r24,lo8(.LC0)
119 0064 C82E mov r12,r24
120 0066 80E0 ldi r24,hi8(.LC0)
121 0068 D82E mov r13,r24
122 .LBB26:
123 .LBB27:
124 .LBB28:
125 .LBB29:
126 .loc 2 105 0
127 006a 90E9 ldi r25,lo8(400)
128 006c A92E mov r10,r25
129 006e 91E0 ldi r25,hi8(400)
130 0070 B92E mov r11,r25
131 .L11:
132 .LBE29:
133 .LBE28:
134 .LBE27:
135 .LBE26:
75:main.c **** itoa(i, binary, 2);
136 .loc 1 75 0 discriminator 2
137 0072 C801 movw r24,r16
138 0074 B701 movw r22,r14
139 0076 42E0 ldi r20,lo8(2)
140 0078 50E0 ldi r21,hi8(2)
141 007a 0E94 0000 call itoa
142 .loc 1 76 0 discriminator 2
143 007e 00D0 rcall .
144 0080 00D0 rcall .
145 0082 00D0 rcall .
146 0084 EDB7 in r30,__SP_L__
147 0086 FEB7 in r31,__SP_H__
148 0088 3196 adiw r30,1
149 008a ADB7 in r26,__SP_L__
150 008c BEB7 in r27,__SP_H__
151 008e 1296 adiw r26,1+1
152 0090 DC92 st X,r13
153 0092 CE92 st -X,r12
154 0094 1197 sbiw r26,1
155 0096 F382 std Z+3,r15
156 0098 E282 std Z+2,r14
157 009a 1583 std Z+5,r17
158 009c 0483 std Z+4,r16
159 .LCFI3:
160 009e 0E94 0000 call printf
77:main.c ****
78:main.c **** /* Shift high byte first to shift register. */
79:main.c **** shift_out(i >> 8);
161 .loc 1 79 0 discriminator 2
162 00a2 8DB7 in r24,__SP_L__
163 00a4 9EB7 in r25,__SP_H__
164 00a6 0696 adiw r24,6
165 00a8 0FB6 in __tmp_reg__,__SREG__
166 00aa F894 cli
167 00ac 9EBF out __SP_H__,r25
168 00ae 0FBE out __SREG__,__tmp_reg__
169 00b0 8DBF out __SP_L__,r24
170 00b2 812F mov r24,r17
171 .LCFI4:
172 00b4 0E94 0000 call shift_out
80:main.c **** shift_out(i & 0xff);
173 .loc 1 80 0 discriminator 2
174 00b8 802F mov r24,r16
175 00ba 0E94 0000 call shift_out
81:main.c ****
82:main.c **** /* Pulse latch to transfer data from shift registers */
83:main.c **** /* to storage registers. */
84:main.c **** //digital_write(LATCH, LOW);
85:main.c **** //digital_write(LATCH, HIGH);
86:main.c **** digital_write(SPI_SS, LOW);
176 .loc 1 86 0 discriminator 2
177 00be 2A98 cbi 37-0x20,2
87:main.c **** digital_write(SPI_SS, HIGH);
178 .loc 1 87 0 discriminator 2
179 00c0 2A9A sbi 37-0x20,2
180 .LVL5:
181 00c2 24EF ldi r18,lo8(500)
182 00c4 31E0 ldi r19,hi8(500)
183 .LVL6:
184 .L5:
185 .LBB33:
186 .LBB32:
187 .LBB31:
188 .LBB30:
189 .loc 2 105 0
190 00c6 C501 movw r24,r10
191 /* #APP */
192 ; 105 "/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic
193 00c8 0197 1: sbiw r24,1
194 00ca 01F4 brne 1b
195 ; 0 "" 2
196 .LVL7:
197 /* #NOAPP */
198 00cc 2150 subi r18,lo8(-(-1))
199 00ce 3040 sbci r19,hi8(-(-1))
200 .LBE30:
201 .LBE31:
202 .loc 3 162 0
203 00d0 01F4 brne .L5
204 .LBE32:
205 .LBE33:
72:main.c **** for(uint16_t i = 0; i < 0xffff; i++) {
206 .loc 1 72 0 discriminator 2
207 00d2 0F5F subi r16,lo8(-(1))
208 00d4 1F4F sbci r17,hi8(-(1))
209 .LVL8:
210 00d6 9FEF ldi r25,hi8(-1)
211 00d8 0F3F cpi r16,lo8(-1)
212 00da 1907 cpc r17,r25
213 00dc 01F4 brne .L11
72:main.c **** for(uint16_t i = 0; i < 0xffff; i++) {
214 .loc 1 72 0 is_stmt 0
215 00de 00E0 ldi r16,lo8(0)
216 00e0 10E0 ldi r17,hi8(0)
217 .LVL9:
218 00e2 00C0 rjmp .L11
219 .LBE25:
220 .LFE7:
222 .global uart_input
223 .data
226 uart_input:
227 0008 0000 00 .skip 3,0
228 000b 01 .byte 1
229 000c 0000 0000 .skip 4,0
230 0010 0000 .word 0
231 0012 0000 .word gs(uart_getchar)
232 0014 0000 .word 0
233 .global uart_output
236 uart_output:
237 0016 0000 00 .skip 3,0
238 0019 02 .byte 2
239 001a 0000 0000 .skip 4,0
240 001e 0000 .word gs(uart_putchar)
241 0020 0000 .word 0
242 0022 0000 .word 0
302 .Letext0:
303 .file 4 "/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdint.h"
304 .file 5 "/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdio.h"
305 .file 6 "uart.h"
DEFINED SYMBOLS
*ABS*:0000000000000000 main.c
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//ccXFnouu.s:2 *ABS*:000000000000003f __SREG__
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//ccXFnouu.s:3 *ABS*:000000000000003e __SP_H__
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//ccXFnouu.s:4 *ABS*:000000000000003d __SP_L__
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//ccXFnouu.s:5 *ABS*:0000000000000000 __tmp_reg__
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//ccXFnouu.s:6 *ABS*:0000000000000001 __zero_reg__
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//ccXFnouu.s:13 .text:0000000000000000 shift_out
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//ccXFnouu.s:36 .text.startup:0000000000000000 main
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//ccXFnouu.s:236 .data:0000000000000016 uart_output
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//ccXFnouu.s:226 .data:0000000000000008 uart_input
UNDEFINED SYMBOLS
__do_copy_data
__do_clear_bss
spi_transfer
uart_init
spi_init
__iob
itoa
printf
uart_getchar
uart_putchar

680
tpic6b595_spi/main.map Normal file
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@ -0,0 +1,680 @@
Archive member included because of file (symbol)
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Allocating common symbols
Common symbol size file
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Memory Configuration
Name Origin Length Attributes
text 0x0000000000000000 0x0000000000020000 xr
data 0x0000000000800060 0x000000000000ffa0 rw !x
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*default* 0x0000000000000000 0xffffffffffffffff
Linker script and memory map
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LOAD /usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/lib/avr5/crtm328p.o
LOAD main.o
LOAD uart_async.o
LOAD spi.o
LOAD /usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/lib/avr5/libm.a
LOAD /usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/avr5/libgcc.a
LOAD /usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/lib/avr5/libc.a
LOAD /usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/avr5/libgcc.a
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*(.debug_str)
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0x154 (size before relaxing)
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0x169 (size before relaxing)
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0xd4 (size before relaxing)
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0x104 (size before relaxing)
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0x137 (size before relaxing)
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0x189 (size before relaxing)
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0x10d (size before relaxing)
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*(.debug_loc)
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.debug_loc 0x00000000000003bd 0x51c /usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/lib/avr5/libc.a(vfprintf_std.o)
.debug_loc 0x00000000000008d9 0x99 /usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/lib/avr5/libc.a(fputc.o)
.debug_macinfo
*(.debug_macinfo)
OUTPUT(main.elf elf32-avr)
LOAD linker stubs
.debug_ranges 0x0000000000000000 0x90
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.debug_ranges 0x0000000000000060 0x10 /usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/lib/avr5/libc.a(printf.o)
.debug_ranges 0x0000000000000070 0x10 /usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/lib/avr5/libc.a(vfprintf_std.o)
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Cross Reference Table
Symbol File
__bad_interrupt /usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/lib/avr5/crtm328p.o
__bss_end /usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/avr5/libgcc.a(_clear_bss.o)
__bss_start /usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/avr5/libgcc.a(_clear_bss.o)
__data_end /usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/avr5/libgcc.a(_copy_data.o)
__data_load_start /usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/avr5/libgcc.a(_copy_data.o)
__data_start /usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/avr5/libgcc.a(_copy_data.o)
__divmodhi4 /usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/avr5/libgcc.a(_divmodhi4.o)
uart_async.o
__do_clear_bss /usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/avr5/libgcc.a(_clear_bss.o)
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/lib/avr5/libc.a(fputc.o)
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/lib/avr5/libc.a(vfprintf_std.o)
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/lib/avr5/libc.a(printf.o)
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/lib/avr5/libc.a(iob.o)
spi.o
uart_async.o
main.o
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uart_async.o
main.o
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main.o
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/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/lib/avr5/crtm328p.o
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main.o
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BIN
tpic6b595_spi/main.o Normal file
View File

Binary file not shown.

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569
tpic6b595_spi/pins.h Normal file
View File

@ -0,0 +1,569 @@
/*
* pins.h
*
* Lightweight macro implementation of Arduino style pin numbering
* for AVR microprocessors. Because only thing I want to use from
* Arduino libraries is the pin numbering scheme.
*
* This file taken 99% from the excellent ArduinoLite project by
* Shikai Chen <csk@live.com>. Some minor changes to suite my personal
* coding taste.
*
* http://code.google.com/p/arduino-lite/
* http://www.csksoft.net/
*
* Copyright (c) 2010-2011 Shikai Chen
*
* Licensed under the LGPL 2.1 license:
* http://www.opensource.org/licenses/lgpl-2.1.php
*/
#ifndef PINS_H
#define PINS_H
#include <avr/sfr_defs.h>
#include <avr/io.h>
#define HIGH 0x1
#define LOW 0x0
#define INPUT 0x0
#define OUTPUT 0x1
#define ENABLE 0x1
#define DISABLE 0x0
#define ARDUINOPIN_TO_TIMERID(x) TIMER_AT_PIN_##x
#define ARDUINOPIN_TO_TCCRID(x) TCCR_AT_PIN_##x
#define ARDUINOPIN_TO_PORTID(x) PORT_AT_PIN_##x
#define ARDUINOPIN_TO_PORTMSK(x) PORTMSK_AT_PIN_##x
#define PORTID_TO_DIR_REG(x) DIR_REG_AT_##x
#define PORTID_TO_OUTPUT_REG(x) OUTPUT_REG_AT_##x
#define PORTID_TO_INPUT_REG(x) INPUT_REG_AT_##x
#if defined(__AVR_ATmega1280__)
#define PORT_AT_PIN_0 PortE // PE 0 ** 0 ** USART0_RX
#define PORT_AT_PIN_1 PortE // PE 1 ** 1 ** USART0_TX
#define PORT_AT_PIN_2 PortE // PE 4 ** 2 ** PWM2
#define PORT_AT_PIN_3 PortE // PE 5 ** 3 ** PWM3
#define PORT_AT_PIN_4 PortG // PG 5 ** 4 ** PWM4
#define PORT_AT_PIN_5 PortE // PE 3 ** 5 ** PWM5
#define PORT_AT_PIN_6 PortH // PH 3 ** 6 ** PWM6
#define PORT_AT_PIN_7 PortH // PH 4 ** 7 ** PWM7
#define PORT_AT_PIN_8 PortH // PH 5 ** 8 ** PWM8
#define PORT_AT_PIN_9 PortH // PH 6 ** 9 ** PWM9
#define PORT_AT_PIN_10 PortB // PB 4 ** 10 ** PWM10
#define PORT_AT_PIN_11 PortB // PB 5 ** 11 ** PWM11
#define PORT_AT_PIN_12 PortB // PB 6 ** 12 ** PWM12
#define PORT_AT_PIN_13 PortB // PB 7 ** 13 ** PWM13
#define PORT_AT_PIN_14 PortJ // PJ 1 ** 14 ** USART3_TX
#define PORT_AT_PIN_15 PortJ // PJ 0 ** 15 ** USART3_RX
#define PORT_AT_PIN_16 PortH // PH 1 ** 16 ** USART2_TX
#define PORT_AT_PIN_17 PortH // PH 0 ** 17 ** USART2_RX
#define PORT_AT_PIN_18 PortD // PD 3 ** 18 ** USART1_TX
#define PORT_AT_PIN_19 PortD // PD 2 ** 19 ** USART1_RX
#define PORT_AT_PIN_20 PortD // PD 1 ** 20 ** I2C_SDA
#define PORT_AT_PIN_21 PortD // PD 0 ** 21 ** I2C_SCL
#define PORT_AT_PIN_22 PortA // PA 0 ** 22 ** D22
#define PORT_AT_PIN_23 PortA // PA 1 ** 23 ** D23
#define PORT_AT_PIN_24 PortA // PA 2 ** 24 ** D24
#define PORT_AT_PIN_25 PortA // PA 3 ** 25 ** D25
#define PORT_AT_PIN_26 PortA // PA 4 ** 26 ** D26
#define PORT_AT_PIN_27 PortA // PA 5 ** 27 ** D27
#define PORT_AT_PIN_28 PortA // PA 6 ** 28 ** D28
#define PORT_AT_PIN_29 PortA // PA 7 ** 29 ** D29
#define PORT_AT_PIN_30 PortC // PC 7 ** 30 ** D30
#define PORT_AT_PIN_31 PortC // PC 6 ** 31 ** D31
#define PORT_AT_PIN_32 PortC // PC 5 ** 32 ** D32
#define PORT_AT_PIN_33 PortC // PC 4 ** 33 ** D33
#define PORT_AT_PIN_34 PortC // PC 3 ** 34 ** D34
#define PORT_AT_PIN_35 PortC // PC 2 ** 35 ** D35
#define PORT_AT_PIN_36 PortC // PC 1 ** 36 ** D36
#define PORT_AT_PIN_37 PortC // PC 0 ** 37 ** D37
#define PORT_AT_PIN_38 PortD // PD 7 ** 38 ** D38
#define PORT_AT_PIN_39 PortG // PG 2 ** 39 ** D39
#define PORT_AT_PIN_40 PortG // PG 1 ** 40 ** D40
#define PORT_AT_PIN_41 PortG // PG 0 ** 41 ** D41
#define PORT_AT_PIN_42 PortL // PL 7 ** 42 ** D42
#define PORT_AT_PIN_43 PortL // PL 6 ** 43 ** D43
#define PORT_AT_PIN_44 PortL // PL 5 ** 44 ** D44
#define PORT_AT_PIN_45 PortL // PL 4 ** 45 ** D45
#define PORT_AT_PIN_46 PortL // PL 3 ** 46 ** D46
#define PORT_AT_PIN_47 PortL // PL 2 ** 47 ** D47
#define PORT_AT_PIN_48 PortL // PL 1 ** 48 ** D48
#define PORT_AT_PIN_49 PortL // PL 0 ** 49 ** D49
#define PORT_AT_PIN_50 PortB // PB 3 ** 50 ** SPI_MISO
#define PORT_AT_PIN_51 PortB // PB 2 ** 51 ** SPI_MOSI
#define PORT_AT_PIN_52 PortB // PB 1 ** 52 ** SPI_SCK
#define PORT_AT_PIN_53 PortB // PB 0 ** 53 ** SPI_SS
#define PORT_AT_PIN_54 PortF // PF 0 ** 54 ** A0
#define PORT_AT_PIN_55 PortF // PF 1 ** 55 ** A1
#define PORT_AT_PIN_56 PortF // PF 2 ** 56 ** A2
#define PORT_AT_PIN_57 PortF // PF 3 ** 57 ** A3
#define PORT_AT_PIN_58 PortF // PF 4 ** 58 ** A4
#define PORT_AT_PIN_59 PortF // PF 5 ** 59 ** A5
#define PORT_AT_PIN_60 PortF // PF 6 ** 60 ** A6
#define PORT_AT_PIN_61 PortF // PF 7 ** 61 ** A7
#define PORT_AT_PIN_62 PortK // PK 0 ** 62 ** A8
#define PORT_AT_PIN_63 PortK // PK 1 ** 63 ** A9
#define PORT_AT_PIN_64 PortK // PK 2 ** 64 ** A10
#define PORT_AT_PIN_65 PortK // PK 3 ** 65 ** A11
#define PORT_AT_PIN_66 PortK // PK 4 ** 66 ** A12
#define PORT_AT_PIN_67 PortK // PK 5 ** 67 ** A13
#define PORT_AT_PIN_68 PortK // PK 6 ** 68 ** A14
#define PORT_AT_PIN_69 PortK // PK 7 ** 69 ** A15
#define PORTMSK_AT_PIN_0 _BV( 0 ) // PE 0 ** 0 ** USART0_RX
#define PORTMSK_AT_PIN_1 _BV( 1 ) // PE 1 ** 1 ** USART0_TX
#define PORTMSK_AT_PIN_2 _BV( 4 ) // PE 4 ** 2 ** PWM2
#define PORTMSK_AT_PIN_3 _BV( 5 ) // PE 5 ** 3 ** PWM3
#define PORTMSK_AT_PIN_4 _BV( 5 ) // PG 5 ** 4 ** PWM4
#define PORTMSK_AT_PIN_5 _BV( 3 ) // PE 3 ** 5 ** PWM5
#define PORTMSK_AT_PIN_6 _BV( 3 ) // PH 3 ** 6 ** PWM6
#define PORTMSK_AT_PIN_7 _BV( 4 ) // PH 4 ** 7 ** PWM7
#define PORTMSK_AT_PIN_8 _BV( 5 ) // PH 5 ** 8 ** PWM8
#define PORTMSK_AT_PIN_9 _BV( 6 ) // PH 6 ** 9 ** PWM9
#define PORTMSK_AT_PIN_10 _BV( 4 ) // PB 4 ** 10 ** PWM10
#define PORTMSK_AT_PIN_11 _BV( 5 ) // PB 5 ** 11 ** PWM11
#define PORTMSK_AT_PIN_12 _BV( 6 ) // PB 6 ** 12 ** PWM12
#define PORTMSK_AT_PIN_13 _BV( 7 ) // PB 7 ** 13 ** PWM13
#define PORTMSK_AT_PIN_14 _BV( 1 ) // PJ 1 ** 14 ** USART3_TX
#define PORTMSK_AT_PIN_15 _BV( 0 ) // PJ 0 ** 15 ** USART3_RX
#define PORTMSK_AT_PIN_16 _BV( 1 ) // PH 1 ** 16 ** USART2_TX
#define PORTMSK_AT_PIN_17 _BV( 0 ) // PH 0 ** 17 ** USART2_RX
#define PORTMSK_AT_PIN_18 _BV( 3 ) // PD 3 ** 18 ** USART1_TX
#define PORTMSK_AT_PIN_19 _BV( 2 ) // PD 2 ** 19 ** USART1_RX
#define PORTMSK_AT_PIN_20 _BV( 1 ) // PD 1 ** 20 ** I2C_SDA
#define PORTMSK_AT_PIN_21 _BV( 0 ) // PD 0 ** 21 ** I2C_SCL
#define PORTMSK_AT_PIN_22 _BV( 0 ) // PA 0 ** 22 ** D22
#define PORTMSK_AT_PIN_23 _BV( 1 ) // PA 1 ** 23 ** D23
#define PORTMSK_AT_PIN_24 _BV( 2 ) // PA 2 ** 24 ** D24
#define PORTMSK_AT_PIN_25 _BV( 3 ) // PA 3 ** 25 ** D25
#define PORTMSK_AT_PIN_26 _BV( 4 ) // PA 4 ** 26 ** D26
#define PORTMSK_AT_PIN_27 _BV( 5 ) // PA 5 ** 27 ** D27
#define PORTMSK_AT_PIN_28 _BV( 6 ) // PA 6 ** 28 ** D28
#define PORTMSK_AT_PIN_29 _BV( 7 ) // PA 7 ** 29 ** D29
#define PORTMSK_AT_PIN_30 _BV( 7 ) // PC 7 ** 30 ** D30
#define PORTMSK_AT_PIN_31 _BV( 6 ) // PC 6 ** 31 ** D31
#define PORTMSK_AT_PIN_32 _BV( 5 ) // PC 5 ** 32 ** D32
#define PORTMSK_AT_PIN_33 _BV( 4 ) // PC 4 ** 33 ** D33
#define PORTMSK_AT_PIN_34 _BV( 3 ) // PC 3 ** 34 ** D34
#define PORTMSK_AT_PIN_35 _BV( 2 ) // PC 2 ** 35 ** D35
#define PORTMSK_AT_PIN_36 _BV( 1 ) // PC 1 ** 36 ** D36
#define PORTMSK_AT_PIN_37 _BV( 0 ) // PC 0 ** 37 ** D37
#define PORTMSK_AT_PIN_38 _BV( 7 ) // PD 7 ** 38 ** D38
#define PORTMSK_AT_PIN_39 _BV( 2 ) // PG 2 ** 39 ** D39
#define PORTMSK_AT_PIN_40 _BV( 1 ) // PG 1 ** 40 ** D40
#define PORTMSK_AT_PIN_41 _BV( 0 ) // PG 0 ** 41 ** D41
#define PORTMSK_AT_PIN_42 _BV( 7 ) // PL 7 ** 42 ** D42
#define PORTMSK_AT_PIN_43 _BV( 6 ) // PL 6 ** 43 ** D43
#define PORTMSK_AT_PIN_44 _BV( 5 ) // PL 5 ** 44 ** D44
#define PORTMSK_AT_PIN_45 _BV( 4 ) // PL 4 ** 45 ** D45
#define PORTMSK_AT_PIN_46 _BV( 3 ) // PL 3 ** 46 ** D46
#define PORTMSK_AT_PIN_47 _BV( 2 ) // PL 2 ** 47 ** D47
#define PORTMSK_AT_PIN_48 _BV( 1 ) // PL 1 ** 48 ** D48
#define PORTMSK_AT_PIN_49 _BV( 0 ) // PL 0 ** 49 ** D49
#define PORTMSK_AT_PIN_50 _BV( 3 ) // PB 3 ** 50 ** SPI_MISO
#define PORTMSK_AT_PIN_51 _BV( 2 ) // PB 2 ** 51 ** SPI_MOSI
#define PORTMSK_AT_PIN_52 _BV( 1 ) // PB 1 ** 52 ** SPI_SCK
#define PORTMSK_AT_PIN_53 _BV( 0 ) // PB 0 ** 53 ** SPI_SS
#define PORTMSK_AT_PIN_54 _BV( 0 ) // PF 0 ** 54 ** A0
#define PORTMSK_AT_PIN_55 _BV( 1 ) // PF 1 ** 55 ** A1
#define PORTMSK_AT_PIN_56 _BV( 2 ) // PF 2 ** 56 ** A2
#define PORTMSK_AT_PIN_57 _BV( 3 ) // PF 3 ** 57 ** A3
#define PORTMSK_AT_PIN_58 _BV( 4 ) // PF 4 ** 58 ** A4
#define PORTMSK_AT_PIN_59 _BV( 5 ) // PF 5 ** 59 ** A5
#define PORTMSK_AT_PIN_60 _BV( 6 ) // PF 6 ** 60 ** A6
#define PORTMSK_AT_PIN_61 _BV( 7 ) // PF 7 ** 61 ** A7
#define PORTMSK_AT_PIN_62 _BV( 0 ) // PK 0 ** 62 ** A8
#define PORTMSK_AT_PIN_63 _BV( 1 ) // PK 1 ** 63 ** A9
#define PORTMSK_AT_PIN_64 _BV( 2 ) // PK 2 ** 64 ** A10
#define PORTMSK_AT_PIN_65 _BV( 3 ) // PK 3 ** 65 ** A11
#define PORTMSK_AT_PIN_66 _BV( 4 ) // PK 4 ** 66 ** A12
#define PORTMSK_AT_PIN_67 _BV( 5 ) // PK 5 ** 67 ** A13
#define PORTMSK_AT_PIN_68 _BV( 6 ) // PK 6 ** 68 ** A14
#define PORTMSK_AT_PIN_69 _BV( 7 ) // PK 7 ** 69 ** A15
////////////Arduino pin to Timer Regs mapping
#define TIMER_AT_PIN_2 3B
#define TCCR_AT_PIN_2 TCCR3A
#define TIMER_AT_PIN_3 3C
#define TCCR_AT_PIN_3 TCCR3A
#define TIMER_AT_PIN_4 0B
#define TCCR_AT_PIN_4 TCCR0A
#define TIMER_AT_PIN_5 3A
#define TCCR_AT_PIN_5 TCCR3A
#define TIMER_AT_PIN_6 4A
#define TCCR_AT_PIN_6 TCCR4A
#define TIMER_AT_PIN_7 4B
#define TCCR_AT_PIN_7 TCCR4A
#define TIMER_AT_PIN_8 4C
#define TCCR_AT_PIN_8 TCCR4A
#define TIMER_AT_PIN_9 2B
#define TCCR_AT_PIN_9 TCCR2A
#define TIMER_AT_PIN_10 2A
#define TCCR_AT_PIN_10 TCCR2A
#define TIMER_AT_PIN_11 1A
#define TCCR_AT_PIN_11 TCCR1A
#define TIMER_AT_PIN_12 1B
#define TCCR_AT_PIN_12 TCCR1A
#define TIMER_AT_PIN_13 0A
#define TCCR_AT_PIN_13 TCCR0A
#define TIMER_AT_PIN_44 5C
#define TCCR_AT_PIN_44 TCCR5A
#define TIMER_AT_PIN_45 5B
#define TCCR_AT_PIN_45 TCCR5A
#define TIMER_AT_PIN_46 5A
#define TCCR_AT_PIN_46 TCCR5A
////////////PORT to DDRX mapping
#define DIR_REG_AT_PortA DDRA
#define DIR_REG_AT_PortB DDRB
#define DIR_REG_AT_PortC DDRC
#define DIR_REG_AT_PortD DDRD
#define DIR_REG_AT_PortE DDRE
#define DIR_REG_AT_PortF DDRF
#define DIR_REG_AT_PortG DDRG
#define DIR_REG_AT_PortH DDRH
#define DIR_REG_AT_PortJ DDRJ
#define DIR_REG_AT_PortK DDRK
#define DIR_REG_AT_PortL DDRL
////////////PORT to PORTX mapping
#define OUTPUT_REG_AT_PortA PORTA
#define OUTPUT_REG_AT_PortB PORTB
#define OUTPUT_REG_AT_PortC PORTC
#define OUTPUT_REG_AT_PortD PORTD
#define OUTPUT_REG_AT_PortE PORTE
#define OUTPUT_REG_AT_PortF PORTF
#define OUTPUT_REG_AT_PortG PORTG
#define OUTPUT_REG_AT_PortH PORTH
#define OUTPUT_REG_AT_PortJ PORTJ
#define OUTPUT_REG_AT_PortK PORTK
#define OUTPUT_REG_AT_PortL PORTL
////////////PORT to PINX(input regs) mapping
#define INPUT_REG_AT_PortA PINA
#define INPUT_REG_AT_PortB PINB
#define INPUT_REG_AT_PortC PINC
#define INPUT_REG_AT_PortD PIND
#define INPUT_REG_AT_PortE PINE
#define INPUT_REG_AT_PortF PINF
#define INPUT_REG_AT_PortG PING
#define INPUT_REG_AT_PortH PINH
#define INPUT_REG_AT_PortJ PINJ
#define INPUT_REG_AT_PortK PINK
#define INPUT_REG_AT_PortL PINL
#else /* not __AVR_ATmega1280__ */
#if defined(__AVR_ATtiny2313__)
//no PortC on tiny2313
//Pin[0-6] -> PortD[0-6]
#define PORT_AT_PIN_0 PortD /* 0 */
#define PORT_AT_PIN_1 PortD
#define PORT_AT_PIN_2 PortD
#define PORT_AT_PIN_3 PortD
#define PORT_AT_PIN_4 PortD
#define PORT_AT_PIN_5 PortD
#define PORT_AT_PIN_6 PortD
//Pin[7-14] -> PortB[0-7]
#define PORT_AT_PIN_7 PortB
#define PORT_AT_PIN_8 PortB /* 8 */
#define PORT_AT_PIN_9 PortB
#define PORT_AT_PIN_10 PortB
#define PORT_AT_PIN_11 PortB
#define PORT_AT_PIN_12 PortB
#define PORT_AT_PIN_13 PortB
#define PORT_AT_PIN_14 PortB
#elif defined(__AVR_ATtiny26__)
//Pin[0-6] -> PortD[0-6]
#define PORT_AT_PIN_0 PortB /* 0 */
#define PORT_AT_PIN_1 PortB
#define PORT_AT_PIN_2 PortB
#define PORT_AT_PIN_3 PortB
#define PORT_AT_PIN_4 PortB
#define PORT_AT_PIN_5 PortB
#define PORT_AT_PIN_6 PortB
//D[7-13] and A[0-9] share the same pins on Attiny26
#define PORT_AT_PIN_7 PortA /* 0 */
#define PORT_AT_PIN_8 PortA
#define PORT_AT_PIN_9 PortA
#define PORT_AT_PIN_10 PortA
#define PORT_AT_PIN_11 PortA
#define PORT_AT_PIN_12 PortA
#define PORT_AT_PIN_13 PortA
#else // Atmega8 / Atmegax8
#define PORT_AT_PIN_0 PortD /* 0 */
#define PORT_AT_PIN_1 PortD
#define PORT_AT_PIN_2 PortD
#define PORT_AT_PIN_3 PortD
#define PORT_AT_PIN_4 PortD
#define PORT_AT_PIN_5 PortD
#define PORT_AT_PIN_6 PortD
#define PORT_AT_PIN_7 PortD
#define PORT_AT_PIN_8 PortB /* 8 */
#define PORT_AT_PIN_9 PortB
#define PORT_AT_PIN_10 PortB
#define PORT_AT_PIN_11 PortB
#define PORT_AT_PIN_12 PortB
#define PORT_AT_PIN_13 PortB
#define PORT_AT_PIN_14 PortC /* 14 */
#define PORT_AT_PIN_15 PortC
#define PORT_AT_PIN_16 PortC
#define PORT_AT_PIN_17 PortC
#define PORT_AT_PIN_18 PortC
#define PORT_AT_PIN_19 PortC
#define PORT_AT_PIN_20 PortB
#define PORT_AT_PIN_21 PortB
#endif
#if defined(__AVR_ATtiny2313__)
#define PORTMSK_AT_PIN_0 _BV(0)
#define PORTMSK_AT_PIN_1 _BV(1)
#define PORTMSK_AT_PIN_2 _BV(2)
#define PORTMSK_AT_PIN_3 _BV(3)
#define PORTMSK_AT_PIN_4 _BV(4)
#define PORTMSK_AT_PIN_5 _BV(5)
#define PORTMSK_AT_PIN_6 _BV(6)
#define PORTMSK_AT_PIN_7 _BV(0)
#define PORTMSK_AT_PIN_8 _BV(1)
#define PORTMSK_AT_PIN_9 _BV(2)
#define PORTMSK_AT_PIN_10 _BV(3)
#define PORTMSK_AT_PIN_11 _BV(4)
#define PORTMSK_AT_PIN_12 _BV(5)
#define PORTMSK_AT_PIN_13 _BV(6)
#define PORTMSK_AT_PIN_14 _BV(7)
#elif defined(__AVR_ATtiny26__)
#define PORTMSK_AT_PIN_0 _BV(0)
#define PORTMSK_AT_PIN_1 _BV(1)
#define PORTMSK_AT_PIN_2 _BV(2)
#define PORTMSK_AT_PIN_3 _BV(3)
#define PORTMSK_AT_PIN_4 _BV(4)
#define PORTMSK_AT_PIN_5 _BV(5)
#define PORTMSK_AT_PIN_6 _BV(6)
#define PORTMSK_AT_PIN_7 _BV(0)
#define PORTMSK_AT_PIN_8 _BV(1)
#define PORTMSK_AT_PIN_9 _BV(2)
#define PORTMSK_AT_PIN_10 _BV(3)
#define PORTMSK_AT_PIN_11 _BV(4)
#define PORTMSK_AT_PIN_12 _BV(5)
#define PORTMSK_AT_PIN_13 _BV(6)
#else //Atmega8/ Atmegax8
#define PORTMSK_AT_PIN_0 _BV(0) /* 0 port D */
#define PORTMSK_AT_PIN_1 _BV(1)
#define PORTMSK_AT_PIN_2 _BV(2)
#define PORTMSK_AT_PIN_3 _BV(3)
#define PORTMSK_AT_PIN_4 _BV(4)
#define PORTMSK_AT_PIN_5 _BV(5)
#define PORTMSK_AT_PIN_6 _BV(6)
#define PORTMSK_AT_PIN_7 _BV(7)
#define PORTMSK_AT_PIN_8 _BV(0) /* 8 port B */
#define PORTMSK_AT_PIN_9 _BV(1)
#define PORTMSK_AT_PIN_10 _BV(2)
#define PORTMSK_AT_PIN_11 _BV(3)
#define PORTMSK_AT_PIN_12 _BV(4)
#define PORTMSK_AT_PIN_13 _BV(5)
#define PORTMSK_AT_PIN_14 _BV(0) /* 14 port C */
#define PORTMSK_AT_PIN_15 _BV(1)
#define PORTMSK_AT_PIN_16 _BV(2)
#define PORTMSK_AT_PIN_17 _BV(3)
#define PORTMSK_AT_PIN_18 _BV(4)
#define PORTMSK_AT_PIN_19 _BV(5)
#define PORTMSK_AT_PIN_20 _BV(6)
#define PORTMSK_AT_PIN_21 _BV(7)
#endif
////////////PORT to DDRX mapping
#define DIR_REG_AT_PortA DDRA
#define DIR_REG_AT_PortB DDRB
#if defined(__AVR_ATtiny2313__)
//no PortC on tiny2313
#else
#define DIR_REG_AT_PortC DDRC
#endif
#define DIR_REG_AT_PortD DDRD
////////////PORT to PORTX mapping
#define OUTPUT_REG_AT_PortA PORTA
#define OUTPUT_REG_AT_PortB PORTB
#if defined(__AVR_ATtiny2313__)
//no PortC on tiny2313
#else
#define OUTPUT_REG_AT_PortC PORTC
#endif
#define OUTPUT_REG_AT_PortD PORTD
////////////PORT to PINX(input regs) mapping
#define INPUT_REG_AT_PortA PINA
#define INPUT_REG_AT_PortB PINB
#if defined(__AVR_ATtiny2313__)
//no PortC on tiny2313
#else
#define INPUT_REG_AT_PortC PINC
#endif
#define INPUT_REG_AT_PortD PIND
#if defined(__AVR_ATtiny2313__)
#define TIMER_AT_PIN_5 0B
#define TCCR_AT_PIN_5 TCCR0A
#define TIMER_AT_PIN_9 0A
#define TCCR_AT_PIN_9 TCCR0A
#define TIMER_AT_PIN_10 1A
#define TCCR_AT_PIN_10 TCCR1A
#define TIMER_AT_PIN_11 1B
#define TCCR_AT_PIN_11 TCCR1A
#elif defined(__AVR_ATtiny26__)
/*
#define TIMER_AT_PIN_0 1A
#define TCCR_AT_PIN_0 TCCR1A
*/
#define TIMER_AT_PIN_1 1A
#define TCCR_AT_PIN_1 TCCR1A
/*
#define TIMER_AT_PIN_2 1B
#define TCCR_AT_PIN_2 TCCR1A
*/
#define TIMER_AT_PIN_3 1B
#define TCCR_AT_PIN_3 TCCR1A
#else
#if !defined(__AVR_ATmega8__) //for Atmega48/88/168/328
#define TIMER_AT_PIN_3 2B
#define TCCR_AT_PIN_3 TCCR2A
#define TIMER_AT_PIN_5 0B
#define TCCR_AT_PIN_5 TCCR0A
#define TIMER_AT_PIN_6 0A
#define TCCR_AT_PIN_6 TCCR0A
#endif
#define TIMER_AT_PIN_9 1A
#define TCCR_AT_PIN_9 TCCR1A
#define TIMER_AT_PIN_10 1B
#define TCCR_AT_PIN_10 TCCR1A
#if defined(__AVR_ATmega8__)
#define TIMER_AT_PIN_11 2
#define TCCR_AT_PIN_11 TCCR2
#else //for Atmega48/88/168/328
#define TIMER_AT_PIN_11 2A
#define TCCR_AT_PIN_11 TCCR2A
#endif
#endif
#endif
#define MERGE_TO_FUNC(prefix, id) prefix##_##id
#define EXPAND_WRAPPER( NEXTLEVEL, ...) NEXTLEVEL( __VA_ARGS__ )
#define _PWM_SET(id, val) \
do{ \
OCR##id = val; \
} \
while(0)
#define _PWM_ENABLE(TCCR, id) sbi(TCCR, COM##id##1)
#define _PWM_DISABLE(TCCR, id) cbi(TCCR, COM##id##1)
#define _SET_OUTPUT(port_id, msk) PORTID_TO_DIR_REG(port_id) |= (msk)
#define _SET_INTPUT(port_id, msk) PORTID_TO_DIR_REG(port_id) &= ~(msk)
#define _D_WRITE_HIGH(port_id, msk) PORTID_TO_OUTPUT_REG(port_id) |= (msk)
#define _D_WRITE_LOW(port_id, msk) PORTID_TO_OUTPUT_REG(port_id) &= ~(msk)
#define _D_READ_RAW(port_id, msk) ((PORTID_TO_INPUT_REG(port_id)) & (msk))
#define _D_READ(port_id, msk) (((PORTID_TO_INPUT_REG(port_id)) & (msk)) != 0 ? 1 : 0)
#define _D_TOGGLE(port_id, msk) PORTID_TO_OUTPUT_REG(port_id) ^= (msk)
/*
*
* NOTICE: for pins at timer0A/0B,
* if the duty cycle to be set equals to zero, using the following code:
* DIGITAL_WRITE(pin, LOW);
* -- or --
* digitalWrite(pin, LOW);
* The caller should make sure the current pin has been set to OUTPUT mode first
*/
#define SET_1(pin) SET_OUTPUT(pin)
#define SET_0(pin) SET_INPUT(pin)
#define SET_0x1(pin) SET_OUTPUT(pin)
#define SET_0x0(pin) SET_INPUT(pin)
#define D_WRITE_HIGH(pin) EXPAND_WRAPPER(_D_WRITE_HIGH, ARDUINOPIN_TO_PORTID(pin), ARDUINOPIN_TO_PORTMSK(pin) )
#define D_WRITE_LOW(pin) EXPAND_WRAPPER(_D_WRITE_LOW, ARDUINOPIN_TO_PORTID(pin), ARDUINOPIN_TO_PORTMSK(pin) )
#define D_WRITE_1(pin) D_WRITE_HIGH(pin)
#define D_WRITE_0(pin) D_WRITE_LOW(pin)
#define D_WRITE_0x1(pin) D_WRITE_HIGH(pin)
#define D_WRITE_0x0(pin) D_WRITE_LOW(pin)
#define D_WRITE_ENABLE(pin) D_WRITE_HIGH(pin)
#define D_WRITE_DISABLE(pin) D_WRITE_LOW(pin)
#define SET_OUTPUT(pin) EXPAND_WRAPPER(_SET_OUTPUT, ARDUINOPIN_TO_PORTID(pin), ARDUINOPIN_TO_PORTMSK(pin) )
#define SET_INPUT(pin) EXPAND_WRAPPER(_SET_INTPUT, ARDUINOPIN_TO_PORTID(pin), ARDUINOPIN_TO_PORTMSK(pin) )
#define pin_mode(pin, mode) SET_##mode(pin)
#define pin_pullup(pin, val) D_WRITE_##val(pin)
#define pin_toggle(pin) EXPAND_WRAPPER(_D_TOGGLE, ARDUINOPIN_TO_PORTID(pin), ARDUINOPIN_TO_PORTMSK(pin) )
#endif /* PINS_H */

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tpic6b595_spi/spi.c Normal file
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/*
* spi.c
*
* Copyright 2011 Mika Tuupola
*
* Licensed under the MIT license:
* http://www.opensource.org/licenses/mit-license.php
*
*/
#include "digital.h"
#include "spi.h"
void spi_init(void) {
pin_mode(SPI_SCK, OUTPUT);
pin_mode(SPI_MOSI, OUTPUT);
pin_mode(SPI_SS, OUTPUT); /* Must be output in Master mode. */
spi_set_msb();
spi_set_master();
spi_enable();
}
uint8_t spi_transfer(volatile uint8_t data) {
SPDR = data;
loop_until_bit_is_set(SPSR, SPIF);
return SPDR;
}

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tpic6b595_spi/spi.h Normal file
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/*
* spi.h
*
* Copyright 2011 Mika Tuupola
*
* Licensed under the MIT license:
* http://www.opensource.org/licenses/mit-license.php
*
*/
#define SPI_SS 10 /* Slave select. PORTB2 LATCH */
#define SPI_MOSI 11 /* Master out slave input. PORTB3 DATA*/
#define SPI_MISO 12 /* Master input slave output. PORTB4 */
#define SPI_SCK 13 /* Serial clock. PORTB5 CLOCK */
#define spi_set_lsb() SPCR |= _BV(DORD)
#define spi_set_msb() SPCR &= ~(_BV(DORD))
#define spi_set_master() SPCR |= _BV(MSTR)
#define spi_set_slave() SPCR &= ~(_BV(MSTR))
#define spi_enable() SPCR |= _BV(SPE)
#define spi_disable() SPCR &= ~(_BV(SPE));
uint8_t spi_transfer(volatile uint8_t data);
void spi_init(void);

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tpic6b595_spi/spi.lst Normal file
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1 .file "spi.c"
2 __SREG__ = 0x3f
3 __SP_H__ = 0x3e
4 __SP_L__ = 0x3d
5 __tmp_reg__ = 0
6 __zero_reg__ = 1
7 .global __do_copy_data
8 .global __do_clear_bss
9 .text
10 .Ltext0:
11 .global spi_init
13 spi_init:
14 .LFB0:
15 .file 1 "spi.c"
1:spi.c **** /*
2:spi.c **** * spi.c
3:spi.c **** *
4:spi.c **** * Copyright 2011 Mika Tuupola
5:spi.c **** *
6:spi.c **** * Licensed under the MIT license:
7:spi.c **** * http://www.opensource.org/licenses/mit-license.php
8:spi.c **** *
9:spi.c **** */
10:spi.c ****
11:spi.c **** #include "digital.h"
12:spi.c **** #include "spi.h"
13:spi.c ****
14:spi.c **** void spi_init(void) {
16 .loc 1 14 0
17 /* prologue: function */
18 /* frame size = 0 */
19 /* stack size = 0 */
20 .L__stack_usage = 0
15:spi.c **** pin_mode(SPI_SCK, OUTPUT);
21 .loc 1 15 0
22 0000 259A sbi 36-0x20,5
16:spi.c **** pin_mode(SPI_MOSI, OUTPUT);
23 .loc 1 16 0
24 0002 239A sbi 36-0x20,3
17:spi.c **** pin_mode(SPI_SS, OUTPUT); /* Must be output in Master mode. */
25 .loc 1 17 0
26 0004 229A sbi 36-0x20,2
18:spi.c **** spi_set_msb();
27 .loc 1 18 0
28 0006 8CB5 in r24,76-0x20
29 0008 8F7D andi r24,lo8(-33)
30 000a 8CBD out 76-0x20,r24
19:spi.c **** spi_set_master();
31 .loc 1 19 0
32 000c 8CB5 in r24,76-0x20
33 000e 8061 ori r24,lo8(16)
34 0010 8CBD out 76-0x20,r24
20:spi.c **** spi_enable();
35 .loc 1 20 0
36 0012 8CB5 in r24,76-0x20
37 0014 8064 ori r24,lo8(64)
38 0016 8CBD out 76-0x20,r24
39 /* epilogue start */
21:spi.c **** }
40 .loc 1 21 0
41 0018 0895 ret
42 .LFE0:
44 .global spi_transfer
46 spi_transfer:
47 .LFB1:
22:spi.c ****
23:spi.c **** uint8_t spi_transfer(volatile uint8_t data) {
48 .loc 1 23 0
49 .LVL0:
50 001a CF93 push r28
51 .LCFI0:
52 001c DF93 push r29
53 .LCFI1:
54 001e 0F92 push __tmp_reg__
55 .LCFI2:
56 0020 CDB7 in r28,__SP_L__
57 0022 DEB7 in r29,__SP_H__
58 .LCFI3:
59 /* prologue: function */
60 /* frame size = 1 */
61 /* stack size = 3 */
62 .L__stack_usage = 3
63 0024 8983 std Y+1,r24
24:spi.c **** SPDR = data;
64 .loc 1 24 0
65 0026 8981 ldd r24,Y+1
66 .LVL1:
67 0028 8EBD out 78-0x20,r24
68 .L3:
25:spi.c **** loop_until_bit_is_set(SPSR, SPIF);
69 .loc 1 25 0 discriminator 1
70 002a 0DB4 in __tmp_reg__,77-0x20
71 002c 07FE sbrs __tmp_reg__,7
72 002e 00C0 rjmp .L3
26:spi.c **** return SPDR;
73 .loc 1 26 0
74 0030 8EB5 in r24,78-0x20
75 /* epilogue start */
27:spi.c **** }...
76 .loc 1 27 0
77 0032 0F90 pop __tmp_reg__
78 0034 DF91 pop r29
79 0036 CF91 pop r28
80 0038 0895 ret
81 .LFE1:
137 .Letext0:
138 .file 2 "/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdint.h"
DEFINED SYMBOLS
*ABS*:0000000000000000 spi.c
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchlYZ7A.s:2 *ABS*:000000000000003f __SREG__
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchlYZ7A.s:3 *ABS*:000000000000003e __SP_H__
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchlYZ7A.s:4 *ABS*:000000000000003d __SP_L__
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchlYZ7A.s:5 *ABS*:0000000000000000 __tmp_reg__
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchlYZ7A.s:6 *ABS*:0000000000000001 __zero_reg__
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchlYZ7A.s:13 .text:0000000000000000 spi_init
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchlYZ7A.s:46 .text:000000000000001a spi_transfer
UNDEFINED SYMBOLS
__do_copy_data
__do_clear_bss

BIN
tpic6b595_spi/spi.o Normal file
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21
tpic6b595_spi/uart.h Normal file
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@ -0,0 +1,21 @@
/*
* uart.h
*
* Copyright 2011 Mika Tuupola
*
* Licensed under the MIT license:
* http://www.opensource.org/licenses/mit-license.php
*
*/
int uart_putchar(char c, FILE *stream);
int uart_getchar(FILE *stream);
void uart_init(void);
struct rx_ring;
struct tx_ring;
/* http://www.ermicro.com/blog/?p=325 */
FILE uart_output = FDEV_SETUP_STREAM(uart_putchar, NULL, _FDEV_SETUP_WRITE);
FILE uart_input = FDEV_SETUP_STREAM(NULL, uart_getchar, _FDEV_SETUP_READ);

112
tpic6b595_spi/uart_async.c Normal file
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/*
* uart_async.c
*
* Copyright 2011 Mika Tuupola
*
* Licensed under the MIT license:
* http://www.opensource.org/licenses/mit-license.php
*
*/
/* Based on Atmel Application Note AVR 306 */
#include <avr/io.h>
#include <avr/interrupt.h>
#include <stdio.h>
#ifndef BAUD
#define BAUD 9600
#endif
#include <util/setbaud.h>
#ifndef UART_RX_BUFFER_SIZE
#define UART_RX_BUFFER_SIZE 32
#endif
#ifndef UART_TX_BUFFER_SIZE
#define UART_TX_BUFFER_SIZE 256
#endif
struct tx_ring {
int buffer[UART_TX_BUFFER_SIZE];
int start;
int end;
};
struct rx_ring {
int buffer[UART_RX_BUFFER_SIZE];
int start;
int end;
};
static struct tx_ring tx_buffer;
static struct rx_ring rx_buffer;
/* http://www.cs.mun.ca/~rod/Winter2007/4723/notes/serial/serial.html */
void uart_init(void) {
tx_buffer.start = 0;
tx_buffer.end = 0;
rx_buffer.start = 0;
rx_buffer.end = 0;
UBRR0H = UBRRH_VALUE;
UBRR0L = UBRRL_VALUE;
UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); /* 8-bit data */
UCSR0B = _BV(RXEN0) | _BV(TXEN0); /* Enable RX and TX */
sei();
}
int uart_putchar(char c, FILE *stream) {
if (c == '\n') {
uart_putchar('\r', stream);
}
int write_pointer = (tx_buffer.end + 1) % UART_TX_BUFFER_SIZE;
if (write_pointer != tx_buffer.start){
tx_buffer.buffer[tx_buffer.end] = c;
tx_buffer.end = write_pointer;
/* Data available. Enable the transmit interrupt for serial port 0. */
UCSR0B |= _BV(UDRIE0);
}
return 0;
}
int uart_getchar(FILE *stream) {
int read_pointer = (rx_buffer.start + 1) % UART_RX_BUFFER_SIZE;
rx_buffer.start = read_pointer;
return rx_buffer.buffer[read_pointer];
}
ISR(USART_RX_vect) {
int write_pointer = (rx_buffer.end + 1) % UART_RX_BUFFER_SIZE;
/* Add next byte to ringbuffer if it has space available. */
if (write_pointer != rx_buffer.start){
rx_buffer.buffer[rx_buffer.end] = UDR0;
rx_buffer.end = write_pointer;
}
}
ISR(USART_UDRE_vect){
int read_pointer = (tx_buffer.start + 1) % UART_TX_BUFFER_SIZE;
/* Transmit next byte if data available in ringbuffer. */
if (read_pointer != tx_buffer.end) {
UDR0 = tx_buffer.buffer[read_pointer];
tx_buffer.start = read_pointer;
} else {
/* Nothing to send. Disable the transmit interrupt for serial port 0. */
UCSR0B &= ~_BV(UDRIE0);
}
}

459
tpic6b595_spi/uart_async.lst Normal file
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@ -0,0 +1,459 @@
1 .file "uart_async.c"
2 __SREG__ = 0x3f
3 __SP_H__ = 0x3e
4 __SP_L__ = 0x3d
5 __tmp_reg__ = 0
6 __zero_reg__ = 1
7 .global __do_copy_data
8 .global __do_clear_bss
9 .text
10 .Ltext0:
11 .global uart_init
13 uart_init:
14 .LFB1:
15 .file 1 "uart_async.c"
1:uart_async.c **** /*
2:uart_async.c **** * uart_async.c
3:uart_async.c **** *
4:uart_async.c **** * Copyright 2011 Mika Tuupola
5:uart_async.c **** *
6:uart_async.c **** * Licensed under the MIT license:
7:uart_async.c **** * http://www.opensource.org/licenses/mit-license.php
8:uart_async.c **** *
9:uart_async.c **** */
10:uart_async.c ****
11:uart_async.c **** /* Based on Atmel Application Note AVR 306 */
12:uart_async.c ****
13:uart_async.c **** #include <avr/io.h>
14:uart_async.c **** #include <avr/interrupt.h>
15:uart_async.c **** #include <stdio.h>
16:uart_async.c ****
17:uart_async.c **** #ifndef BAUD
18:uart_async.c **** #define BAUD 9600
19:uart_async.c **** #endif
20:uart_async.c **** #include <util/setbaud.h>
21:uart_async.c ****
22:uart_async.c **** #ifndef UART_RX_BUFFER_SIZE
23:uart_async.c **** #define UART_RX_BUFFER_SIZE 32
24:uart_async.c **** #endif
25:uart_async.c ****
26:uart_async.c **** #ifndef UART_TX_BUFFER_SIZE
27:uart_async.c **** #define UART_TX_BUFFER_SIZE 256
28:uart_async.c **** #endif
29:uart_async.c ****
30:uart_async.c **** struct tx_ring {
31:uart_async.c **** int buffer[UART_TX_BUFFER_SIZE];
32:uart_async.c **** int start;
33:uart_async.c **** int end;
34:uart_async.c **** };
35:uart_async.c ****
36:uart_async.c **** struct rx_ring {
37:uart_async.c **** int buffer[UART_RX_BUFFER_SIZE];
38:uart_async.c **** int start;
39:uart_async.c **** int end;
40:uart_async.c **** };
41:uart_async.c ****
42:uart_async.c **** static struct tx_ring tx_buffer;
43:uart_async.c **** static struct rx_ring rx_buffer;
44:uart_async.c ****
45:uart_async.c **** /* http://www.cs.mun.ca/~rod/Winter2007/4723/notes/serial/serial.html */
46:uart_async.c ****
47:uart_async.c **** void uart_init(void) {
16 .loc 1 47 0
17 /* prologue: function */
18 /* frame size = 0 */
19 /* stack size = 0 */
20 .L__stack_usage = 0
48:uart_async.c ****
49:uart_async.c **** tx_buffer.start = 0;
21 .loc 1 49 0
22 0000 1092 0000 sts tx_buffer+512+1,__zero_reg__
23 0004 1092 0000 sts tx_buffer+512,__zero_reg__
50:uart_async.c **** tx_buffer.end = 0;
24 .loc 1 50 0
25 0008 1092 0000 sts tx_buffer+514+1,__zero_reg__
26 000c 1092 0000 sts tx_buffer+514,__zero_reg__
51:uart_async.c ****
52:uart_async.c **** rx_buffer.start = 0;
27 .loc 1 52 0
28 0010 1092 0000 sts rx_buffer+64+1,__zero_reg__
29 0014 1092 0000 sts rx_buffer+64,__zero_reg__
53:uart_async.c **** rx_buffer.end = 0;
30 .loc 1 53 0
31 0018 1092 0000 sts rx_buffer+66+1,__zero_reg__
32 001c 1092 0000 sts rx_buffer+66,__zero_reg__
54:uart_async.c ****
55:uart_async.c **** UBRR0H = UBRRH_VALUE;
33 .loc 1 55 0
34 0020 1092 C500 sts 197,__zero_reg__
56:uart_async.c **** UBRR0L = UBRRL_VALUE;
35 .loc 1 56 0
36 0024 87E6 ldi r24,lo8(103)
37 0026 8093 C400 sts 196,r24
57:uart_async.c ****
58:uart_async.c **** UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); /* 8-bit data */
38 .loc 1 58 0
39 002a 86E0 ldi r24,lo8(6)
40 002c 8093 C200 sts 194,r24
59:uart_async.c **** UCSR0B = _BV(RXEN0) | _BV(TXEN0); /* Enable RX and TX */
41 .loc 1 59 0
42 0030 88E1 ldi r24,lo8(24)
43 0032 8093 C100 sts 193,r24
60:uart_async.c ****
61:uart_async.c **** sei();
44 .loc 1 61 0
45 /* #APP */
46 ; 61 "uart_async.c" 1
47 0036 7894 sei
48 ; 0 "" 2
49 /* epilogue start */
62:uart_async.c **** }
50 .loc 1 62 0
51 /* #NOAPP */
52 0038 0895 ret
53 .LFE1:
55 .global uart_putchar
57 uart_putchar:
58 .LFB2:
63:uart_async.c ****
64:uart_async.c **** int uart_putchar(char c, FILE *stream) {
59 .loc 1 64 0
60 .LVL0:
61 003a 1F93 push r17
62 .LCFI0:
63 /* prologue: function */
64 /* frame size = 0 */
65 /* stack size = 1 */
66 .L__stack_usage = 1
67 003c 182F mov r17,r24
65:uart_async.c **** if (c == '\n') {
68 .loc 1 65 0
69 003e 8A30 cpi r24,lo8(10)
70 0040 01F4 brne .L3
71 .LVL1:
66:uart_async.c **** uart_putchar('\r', stream);
72 .loc 1 66 0
73 0042 8DE0 ldi r24,lo8(13)
74 0044 0E94 0000 call uart_putchar
75 .LVL2:
76 .L3:
67:uart_async.c **** }
68:uart_async.c ****
69:uart_async.c **** int write_pointer = (tx_buffer.end + 1) % UART_TX_BUFFER_SIZE;
77 .loc 1 69 0
78 0048 2091 0000 lds r18,tx_buffer+514
79 004c 3091 0000 lds r19,tx_buffer+514+1
80 0050 C901 movw r24,r18
81 0052 0196 adiw r24,1
82 0054 60E0 ldi r22,lo8(256)
83 0056 71E0 ldi r23,hi8(256)
84 0058 0E94 0000 call __divmodhi4
85 .LVL3:
70:uart_async.c ****
71:uart_async.c **** if (write_pointer != tx_buffer.start){
86 .loc 1 71 0
87 005c 4091 0000 lds r20,tx_buffer+512
88 0060 5091 0000 lds r21,tx_buffer+512+1
89 0064 8417 cp r24,r20
90 0066 9507 cpc r25,r21
91 0068 01F0 breq .L4
72:uart_async.c **** tx_buffer.buffer[tx_buffer.end] = c;
92 .loc 1 72 0
93 006a F901 movw r30,r18
94 006c EE0F lsl r30
95 006e FF1F rol r31
96 0070 E050 subi r30,lo8(-(tx_buffer))
97 0072 F040 sbci r31,hi8(-(tx_buffer))
98 0074 1083 st Z,r17
99 0076 1182 std Z+1,__zero_reg__
73:uart_async.c **** tx_buffer.end = write_pointer;
100 .loc 1 73 0
101 0078 9093 0000 sts tx_buffer+514+1,r25
102 007c 8093 0000 sts tx_buffer+514,r24
74:uart_async.c ****
75:uart_async.c **** /* Data available. Enable the transmit interrupt for serial port 0. */
76:uart_async.c **** UCSR0B |= _BV(UDRIE0);
103 .loc 1 76 0
104 0080 8091 C100 lds r24,193
105 .LVL4:
106 0084 8062 ori r24,lo8(32)
107 0086 8093 C100 sts 193,r24
108 .LVL5:
109 .L4:
77:uart_async.c **** }
78:uart_async.c ****
79:uart_async.c **** return 0;
80:uart_async.c **** }
110 .loc 1 80 0
111 008a 80E0 ldi r24,lo8(0)
112 008c 90E0 ldi r25,hi8(0)
113 /* epilogue start */
114 008e 1F91 pop r17
115 .LVL6:
116 0090 0895 ret
117 .LFE2:
119 .global uart_getchar
121 uart_getchar:
122 .LFB3:
81:uart_async.c ****
82:uart_async.c **** int uart_getchar(FILE *stream) {
123 .loc 1 82 0
124 .LVL7:
125 /* prologue: function */
126 /* frame size = 0 */
127 /* stack size = 0 */
128 .L__stack_usage = 0
83:uart_async.c **** int read_pointer = (rx_buffer.start + 1) % UART_RX_BUFFER_SIZE;
129 .loc 1 83 0
130 0092 8091 0000 lds r24,rx_buffer+64
131 0096 9091 0000 lds r25,rx_buffer+64+1
132 .LVL8:
133 009a 0196 adiw r24,1
134 009c 60E2 ldi r22,lo8(32)
135 009e 70E0 ldi r23,hi8(32)
136 00a0 0E94 0000 call __divmodhi4
137 .LVL9:
84:uart_async.c ****
85:uart_async.c **** rx_buffer.start = read_pointer;
138 .loc 1 85 0
139 00a4 9093 0000 sts rx_buffer+64+1,r25
140 00a8 8093 0000 sts rx_buffer+64,r24
86:uart_async.c **** return rx_buffer.buffer[read_pointer];
141 .loc 1 86 0
142 00ac FC01 movw r30,r24
143 00ae EE0F lsl r30
144 00b0 FF1F rol r31
145 00b2 E050 subi r30,lo8(-(rx_buffer))
146 00b4 F040 sbci r31,hi8(-(rx_buffer))
87:uart_async.c **** }
147 .loc 1 87 0
148 00b6 8081 ld r24,Z
149 .LVL10:
150 00b8 9181 ldd r25,Z+1
151 /* epilogue start */
152 00ba 0895 ret
153 .LFE3:
155 .global __vector_18
157 __vector_18:
158 .LFB4:
88:uart_async.c ****
89:uart_async.c **** ISR(USART_RX_vect) {
159 .loc 1 89 0
160 00bc 1F92 push r1
161 .LCFI1:
162 00be 0F92 push r0
163 .LCFI2:
164 00c0 0FB6 in r0,__SREG__
165 00c2 0F92 push r0
166 00c4 1124 clr __zero_reg__
167 00c6 2F93 push r18
168 .LCFI3:
169 00c8 3F93 push r19
170 .LCFI4:
171 00ca 4F93 push r20
172 .LCFI5:
173 00cc 5F93 push r21
174 .LCFI6:
175 00ce 6F93 push r22
176 .LCFI7:
177 00d0 7F93 push r23
178 .LCFI8:
179 00d2 8F93 push r24
180 .LCFI9:
181 00d4 9F93 push r25
182 .LCFI10:
183 00d6 AF93 push r26
184 .LCFI11:
185 00d8 BF93 push r27
186 .LCFI12:
187 00da EF93 push r30
188 .LCFI13:
189 00dc FF93 push r31
190 .LCFI14:
191 /* prologue: Signal */
192 /* frame size = 0 */
193 /* stack size = 15 */
194 .L__stack_usage = 15
90:uart_async.c **** int write_pointer = (rx_buffer.end + 1) % UART_RX_BUFFER_SIZE;
195 .loc 1 90 0
196 00de 2091 0000 lds r18,rx_buffer+66
197 00e2 3091 0000 lds r19,rx_buffer+66+1
198 00e6 C901 movw r24,r18
199 00e8 0196 adiw r24,1
200 00ea 60E2 ldi r22,lo8(32)
201 00ec 70E0 ldi r23,hi8(32)
202 00ee 0E94 0000 call __divmodhi4
203 .LVL11:
91:uart_async.c ****
92:uart_async.c **** /* Add next byte to ringbuffer if it has space available. */
93:uart_async.c **** if (write_pointer != rx_buffer.start){
204 .loc 1 93 0
205 00f2 4091 0000 lds r20,rx_buffer+64
206 00f6 5091 0000 lds r21,rx_buffer+64+1
207 00fa 8417 cp r24,r20
208 00fc 9507 cpc r25,r21
209 00fe 01F0 breq .L6
94:uart_async.c **** rx_buffer.buffer[rx_buffer.end] = UDR0;
210 .loc 1 94 0
211 0100 4091 C600 lds r20,198
212 0104 F901 movw r30,r18
213 0106 EE0F lsl r30
214 0108 FF1F rol r31
215 010a E050 subi r30,lo8(-(rx_buffer))
216 010c F040 sbci r31,hi8(-(rx_buffer))
217 010e 4083 st Z,r20
218 0110 1182 std Z+1,__zero_reg__
95:uart_async.c **** rx_buffer.end = write_pointer;
219 .loc 1 95 0
220 0112 9093 0000 sts rx_buffer+66+1,r25
221 0116 8093 0000 sts rx_buffer+66,r24
222 .L6:
223 /* epilogue start */
96:uart_async.c **** }
97:uart_async.c **** }
224 .loc 1 97 0
225 011a FF91 pop r31
226 011c EF91 pop r30
227 011e BF91 pop r27
228 0120 AF91 pop r26
229 0122 9F91 pop r25
230 0124 8F91 pop r24
231 .LVL12:
232 0126 7F91 pop r23
233 0128 6F91 pop r22
234 012a 5F91 pop r21
235 012c 4F91 pop r20
236 012e 3F91 pop r19
237 0130 2F91 pop r18
238 0132 0F90 pop r0
239 0134 0FBE out __SREG__,r0
240 0136 0F90 pop r0
241 0138 1F90 pop r1
242 013a 1895 reti
243 .LFE4:
245 .global __vector_19
247 __vector_19:
248 .LFB5:
98:uart_async.c ****
99:uart_async.c **** ISR(USART_UDRE_vect){
249 .loc 1 99 0
250 013c 1F92 push r1
251 .LCFI15:
252 013e 0F92 push r0
253 .LCFI16:
254 0140 0FB6 in r0,__SREG__
255 0142 0F92 push r0
256 0144 1124 clr __zero_reg__
257 0146 2F93 push r18
258 .LCFI17:
259 0148 3F93 push r19
260 .LCFI18:
261 014a 5F93 push r21
262 .LCFI19:
263 014c 6F93 push r22
264 .LCFI20:
265 014e 7F93 push r23
266 .LCFI21:
267 0150 8F93 push r24
268 .LCFI22:
269 0152 9F93 push r25
270 .LCFI23:
271 0154 AF93 push r26
272 .LCFI24:
273 0156 BF93 push r27
274 .LCFI25:
275 0158 EF93 push r30
276 .LCFI26:
277 015a FF93 push r31
278 .LCFI27:
279 /* prologue: Signal */
280 /* frame size = 0 */
281 /* stack size = 14 */
282 .L__stack_usage = 14
100:uart_async.c **** int read_pointer = (tx_buffer.start + 1) % UART_TX_BUFFER_SIZE;
283 .loc 1 100 0
284 015c 8091 0000 lds r24,tx_buffer+512
285 0160 9091 0000 lds r25,tx_buffer+512+1
286 0164 0196 adiw r24,1
287 0166 60E0 ldi r22,lo8(256)
288 0168 71E0 ldi r23,hi8(256)
289 016a 0E94 0000 call __divmodhi4
290 .LVL13:
101:uart_async.c ****
102:uart_async.c **** /* Transmit next byte if data available in ringbuffer. */
103:uart_async.c **** if (read_pointer != tx_buffer.end) {
291 .loc 1 103 0
292 016e 2091 0000 lds r18,tx_buffer+514
293 0172 3091 0000 lds r19,tx_buffer+514+1
294 0176 8217 cp r24,r18
295 0178 9307 cpc r25,r19
296 017a 01F0 breq .L9
104:uart_async.c **** UDR0 = tx_buffer.buffer[read_pointer];
297 .loc 1 104 0
298 017c FC01 movw r30,r24
299 017e EE0F lsl r30
300 0180 FF1F rol r31
301 0182 E050 subi r30,lo8(-(tx_buffer))
302 0184 F040 sbci r31,hi8(-(tx_buffer))
303 0186 2081 ld r18,Z
304 0188 2093 C600 sts 198,r18
105:uart_async.c **** tx_buffer.start = read_pointer;
305 .loc 1 105 0
306 018c 9093 0000 sts tx_buffer+512+1,r25
307 0190 8093 0000 sts tx_buffer+512,r24
308 0194 00C0 rjmp .L8
309 .L9:
106:uart_async.c **** } else {
107:uart_async.c **** /* Nothing to send. Disable the transmit interrupt for serial port 0. */
108:uart_async.c **** UCSR0B &= ~_BV(UDRIE0);
310 .loc 1 108 0
311 0196 8091 C100 lds r24,193
312 .LVL14:
313 019a 8F7D andi r24,lo8(-33)
314 019c 8093 C100 sts 193,r24
315 .L8:
316 /* epilogue start */
109:uart_async.c **** }
110:uart_async.c **** }
317 .loc 1 110 0
318 01a0 FF91 pop r31
319 01a2 EF91 pop r30
320 01a4 BF91 pop r27
321 01a6 AF91 pop r26
322 01a8 9F91 pop r25
323 01aa 8F91 pop r24
324 01ac 7F91 pop r23
325 01ae 6F91 pop r22
326 01b0 5F91 pop r21
327 01b2 3F91 pop r19
328 01b4 2F91 pop r18
329 01b6 0F90 pop r0
330 01b8 0FBE out __SREG__,r0
331 01ba 0F90 pop r0
332 01bc 1F90 pop r1
333 01be 1895 reti
334 .LFE5:
336 .lcomm tx_buffer,516
337 .lcomm rx_buffer,68
564 .Letext0:
565 .file 2 "/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdio.h"
566 .file 3 "/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdint.h"
DEFINED SYMBOLS
*ABS*:0000000000000000 uart_async.c
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//ccdhB8dq.s:2 *ABS*:000000000000003f __SREG__
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//ccdhB8dq.s:3 *ABS*:000000000000003e __SP_H__
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//ccdhB8dq.s:4 *ABS*:000000000000003d __SP_L__
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//ccdhB8dq.s:5 *ABS*:0000000000000000 __tmp_reg__
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//ccdhB8dq.s:6 *ABS*:0000000000000001 __zero_reg__
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//ccdhB8dq.s:13 .text:0000000000000000 uart_init
.bss:0000000000000000 tx_buffer
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//ccdhB8dq.s:336 .bss:0000000000000204 rx_buffer
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//ccdhB8dq.s:57 .text:000000000000003a uart_putchar
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//ccdhB8dq.s:121 .text:0000000000000092 uart_getchar
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//ccdhB8dq.s:157 .text:00000000000000bc __vector_18
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//ccdhB8dq.s:247 .text:000000000000013c __vector_19
UNDEFINED SYMBOLS
__do_copy_data
__do_clear_bss
__divmodhi4

BIN
tpic6b595_spi/uart_async.o Normal file
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