avr/avr_demo
avr/avr_demo
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Use Triple-A libraries instead.

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This commit is contained in:
Mika Tuupola 2012-01-22 16:31:47 +02:00
parent d0df80b533
commit 93ac6d434f
11 changed files with 568 additions and 647 deletions
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4
74hc165_shiftin/Makefile
View File

@ -51,7 +51,7 @@ FORMAT = ihex
TARGET = main TARGET = main
# List C source files here. (C dependencies are automatically generated.) # List C source files here. (C dependencies are automatically generated.)
SRC = $(TARGET).c uart_async.c SRC = $(TARGET).c shift/shift.c uart/uart_async.c
# List Assembler source files here. # List Assembler source files here.
# Make them always end in a capital .S. Files ending in a lowercase .s # Make them always end in a capital .S. Files ending in a lowercase .s
@ -92,7 +92,7 @@ CSTANDARD = -std=gnu99
# Place -D or -U options here # Place -D or -U options here
CDEFS = -DF_CPU=$(F_CPU)UL CDEFS = -DF_CPU=$(F_CPU)UL -DDEBUG
# uncomment and adapt these line if you want different UART library buffer size # uncomment and adapt these line if you want different UART library buffer size
#CDEFS += -DUART_RX_BUFFER_SIZE=128 #CDEFS += -DUART_RX_BUFFER_SIZE=128

29
74hc165_shiftin/digital.h
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@ -1,29 +0,0 @@
/*
* digital.h
*
* Lightweight macro implementation of Arduino style pin numbering
* for AVR microprocessors. Because only thing I want to use from
* Arduino libraries is the pin numbering scheme.
*
* This file taken 99% from the excellent ArduinoLite project by
* Shikai Chen <csk@live.com>. Some minor changes to suite my personal
* coding taste.
*
* http://code.google.com/p/arduino-lite/
* http://www.csksoft.net/
*
* Copyright (c) 2010-2011 Shikai Chen
*
* Licensed under the LGPL 2.1 license:
* http://www.opensource.org/licenses/lgpl-2.1.php
*/
#ifndef DIGITAL_H
#define DIGITAL_H
#include "pins.h"
#define digital_read(pin) EXPAND_WRAPPER(_D_READ, ARDUINOPIN_TO_PORTID(pin), ARDUINOPIN_TO_PORTMSK(pin) )
#define digital_read_raw(pin) EXPAND_WRAPPER(_D_READ_RAW, ARDUINOPIN_TO_PORTID(pin), ARDUINOPIN_TO_PORTMSK(pin) )
#define digital_write(pin, val) D_WRITE_##val(pin)
#endif /* DIGITAL_H */

42
74hc165_shiftin/main.c
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@ -36,41 +36,15 @@
#include <avr/sfr_defs.h> #include <avr/sfr_defs.h>
#include "main.h" #include "main.h"
#include "uart.h" #include "uart/uart.h"
#include "pins.h" #include "pins/digital.h"
#include "digital.h"
#define LATCH 8 /* sh/ld */
#define CLOCK 12 /* clk */
#define DATA 13 /* qh */
static void init(void) { static void init(void) {
pin_mode(LATCH, OUTPUT);
pin_mode(CLOCK, OUTPUT);
pin_mode(DATA, INPUT);
} }
int shiftin(void) {
uint8_t byte = 0;
uint8_t pin_value;
for(int i=0; i<8; i++) {
pin_value = digital_read(DATA);
byte |= (pin_value << ((8 - 1) - i));
printf("%d = %d \n", ((8 - 1) - i), pin_value);
/* Pulse clock input (CP) LOW-HIGH to read next bit. */
digital_write(CLOCK, LOW);
//_delay_ms(10);
digital_write(CLOCK, HIGH);
}
return byte;
}
int main(void) { int main(void) {
init(); shift_in_init();
uart_init(); uart_init();
stdout = &uart_output; stdout = &uart_output;
stdin = &uart_input; stdin = &uart_input;
@ -80,20 +54,22 @@ int main(void) {
while (1) { while (1) {
/* Read in parallel input by setting SH/LD low. */ /* Read in parallel input by setting SH/LD low. */
digital_write(LATCH, LOW); //digital_write(LATCH, LOW);
//_delay_ms(10); //_delay_ms(10);
/* Freeze data by setting SH/LD high. When SH/LD is high data enters */ /* Freeze data by setting SH/LD high. When SH/LD is high data enters */
/* to reqisters from SER input and shifts one place to the right */ /* to reqisters from SER input and shifts one place to the right */
/* (Q0 -> Q1 -> Q2, etc.) with each positive-going clock transition. */ /* (Q0 -> Q1 -> Q2, etc.) with each positive-going clock transition. */
digital_write(LATCH, HIGH); //digital_write(LATCH, HIGH);
shift_in_latch();
/* Read in first 74HC165 data. */ /* Read in first 74HC165 data. */
register_value = shiftin(); register_value = shift_in();
printf("%d \n", register_value); printf("%d \n", register_value);
/* Read in second 74HC165 data. */ /* Read in second 74HC165 data. */
register_value = shiftin(); register_value = shift_in();
printf("%d \n", register_value); printf("%d \n", register_value);
_delay_ms(2000); _delay_ms(2000);

567
74hc165_shiftin/pins.h
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@ -1,567 +0,0 @@
/*
* pins.h
*
* Lightweight macro implementation of Arduino style pin numbering
* for AVR microprocessors. Because only thing I want to use from
* Arduino libraries is the pin numbering scheme.
*
* This file taken 99% from the excellent ArduinoLite project by
* Shikai Chen <csk@live.com>. Some minor changes to suite my personal
* coding taste.
*
* http://code.google.com/p/arduino-lite/
* http://www.csksoft.net/
*
* Copyright (c) 2010-2011 Shikai Chen
*
* Licensed under the LGPL 2.1 license:
* http://www.opensource.org/licenses/lgpl-2.1.php
*/
#ifndef PINS_H
#define PINS_H
#define HIGH 0x1
#define LOW 0x0
#define INPUT 0x0
#define OUTPUT 0x1
#define ENABLE 0x1
#define DISABLE 0x0
#define ARDUINOPIN_TO_TIMERID(x) TIMER_AT_PIN_##x
#define ARDUINOPIN_TO_TCCRID(x) TCCR_AT_PIN_##x
#define ARDUINOPIN_TO_PORTID(x) PORT_AT_PIN_##x
#define ARDUINOPIN_TO_PORTMSK(x) PORTMSK_AT_PIN_##x
#define PORTID_TO_DIR_REG(x) DIR_REG_AT_##x
#define PORTID_TO_OUTPUT_REG(x) OUTPUT_REG_AT_##x
#define PORTID_TO_INPUT_REG(x) INPUT_REG_AT_##x
#if defined(__AVR_ATmega1280__)
#define PORT_AT_PIN_0 PortE // PE 0 ** 0 ** USART0_RX
#define PORT_AT_PIN_1 PortE // PE 1 ** 1 ** USART0_TX
#define PORT_AT_PIN_2 PortE // PE 4 ** 2 ** PWM2
#define PORT_AT_PIN_3 PortE // PE 5 ** 3 ** PWM3
#define PORT_AT_PIN_4 PortG // PG 5 ** 4 ** PWM4
#define PORT_AT_PIN_5 PortE // PE 3 ** 5 ** PWM5
#define PORT_AT_PIN_6 PortH // PH 3 ** 6 ** PWM6
#define PORT_AT_PIN_7 PortH // PH 4 ** 7 ** PWM7
#define PORT_AT_PIN_8 PortH // PH 5 ** 8 ** PWM8
#define PORT_AT_PIN_9 PortH // PH 6 ** 9 ** PWM9
#define PORT_AT_PIN_10 PortB // PB 4 ** 10 ** PWM10
#define PORT_AT_PIN_11 PortB // PB 5 ** 11 ** PWM11
#define PORT_AT_PIN_12 PortB // PB 6 ** 12 ** PWM12
#define PORT_AT_PIN_13 PortB // PB 7 ** 13 ** PWM13
#define PORT_AT_PIN_14 PortJ // PJ 1 ** 14 ** USART3_TX
#define PORT_AT_PIN_15 PortJ // PJ 0 ** 15 ** USART3_RX
#define PORT_AT_PIN_16 PortH // PH 1 ** 16 ** USART2_TX
#define PORT_AT_PIN_17 PortH // PH 0 ** 17 ** USART2_RX
#define PORT_AT_PIN_18 PortD // PD 3 ** 18 ** USART1_TX
#define PORT_AT_PIN_19 PortD // PD 2 ** 19 ** USART1_RX
#define PORT_AT_PIN_20 PortD // PD 1 ** 20 ** I2C_SDA
#define PORT_AT_PIN_21 PortD // PD 0 ** 21 ** I2C_SCL
#define PORT_AT_PIN_22 PortA // PA 0 ** 22 ** D22
#define PORT_AT_PIN_23 PortA // PA 1 ** 23 ** D23
#define PORT_AT_PIN_24 PortA // PA 2 ** 24 ** D24
#define PORT_AT_PIN_25 PortA // PA 3 ** 25 ** D25
#define PORT_AT_PIN_26 PortA // PA 4 ** 26 ** D26
#define PORT_AT_PIN_27 PortA // PA 5 ** 27 ** D27
#define PORT_AT_PIN_28 PortA // PA 6 ** 28 ** D28
#define PORT_AT_PIN_29 PortA // PA 7 ** 29 ** D29
#define PORT_AT_PIN_30 PortC // PC 7 ** 30 ** D30
#define PORT_AT_PIN_31 PortC // PC 6 ** 31 ** D31
#define PORT_AT_PIN_32 PortC // PC 5 ** 32 ** D32
#define PORT_AT_PIN_33 PortC // PC 4 ** 33 ** D33
#define PORT_AT_PIN_34 PortC // PC 3 ** 34 ** D34
#define PORT_AT_PIN_35 PortC // PC 2 ** 35 ** D35
#define PORT_AT_PIN_36 PortC // PC 1 ** 36 ** D36
#define PORT_AT_PIN_37 PortC // PC 0 ** 37 ** D37
#define PORT_AT_PIN_38 PortD // PD 7 ** 38 ** D38
#define PORT_AT_PIN_39 PortG // PG 2 ** 39 ** D39
#define PORT_AT_PIN_40 PortG // PG 1 ** 40 ** D40
#define PORT_AT_PIN_41 PortG // PG 0 ** 41 ** D41
#define PORT_AT_PIN_42 PortL // PL 7 ** 42 ** D42
#define PORT_AT_PIN_43 PortL // PL 6 ** 43 ** D43
#define PORT_AT_PIN_44 PortL // PL 5 ** 44 ** D44
#define PORT_AT_PIN_45 PortL // PL 4 ** 45 ** D45
#define PORT_AT_PIN_46 PortL // PL 3 ** 46 ** D46
#define PORT_AT_PIN_47 PortL // PL 2 ** 47 ** D47
#define PORT_AT_PIN_48 PortL // PL 1 ** 48 ** D48
#define PORT_AT_PIN_49 PortL // PL 0 ** 49 ** D49
#define PORT_AT_PIN_50 PortB // PB 3 ** 50 ** SPI_MISO
#define PORT_AT_PIN_51 PortB // PB 2 ** 51 ** SPI_MOSI
#define PORT_AT_PIN_52 PortB // PB 1 ** 52 ** SPI_SCK
#define PORT_AT_PIN_53 PortB // PB 0 ** 53 ** SPI_SS
#define PORT_AT_PIN_54 PortF // PF 0 ** 54 ** A0
#define PORT_AT_PIN_55 PortF // PF 1 ** 55 ** A1
#define PORT_AT_PIN_56 PortF // PF 2 ** 56 ** A2
#define PORT_AT_PIN_57 PortF // PF 3 ** 57 ** A3
#define PORT_AT_PIN_58 PortF // PF 4 ** 58 ** A4
#define PORT_AT_PIN_59 PortF // PF 5 ** 59 ** A5
#define PORT_AT_PIN_60 PortF // PF 6 ** 60 ** A6
#define PORT_AT_PIN_61 PortF // PF 7 ** 61 ** A7
#define PORT_AT_PIN_62 PortK // PK 0 ** 62 ** A8
#define PORT_AT_PIN_63 PortK // PK 1 ** 63 ** A9
#define PORT_AT_PIN_64 PortK // PK 2 ** 64 ** A10
#define PORT_AT_PIN_65 PortK // PK 3 ** 65 ** A11
#define PORT_AT_PIN_66 PortK // PK 4 ** 66 ** A12
#define PORT_AT_PIN_67 PortK // PK 5 ** 67 ** A13
#define PORT_AT_PIN_68 PortK // PK 6 ** 68 ** A14
#define PORT_AT_PIN_69 PortK // PK 7 ** 69 ** A15
#define PORTMSK_AT_PIN_0 _BV( 0 ) // PE 0 ** 0 ** USART0_RX
#define PORTMSK_AT_PIN_1 _BV( 1 ) // PE 1 ** 1 ** USART0_TX
#define PORTMSK_AT_PIN_2 _BV( 4 ) // PE 4 ** 2 ** PWM2
#define PORTMSK_AT_PIN_3 _BV( 5 ) // PE 5 ** 3 ** PWM3
#define PORTMSK_AT_PIN_4 _BV( 5 ) // PG 5 ** 4 ** PWM4
#define PORTMSK_AT_PIN_5 _BV( 3 ) // PE 3 ** 5 ** PWM5
#define PORTMSK_AT_PIN_6 _BV( 3 ) // PH 3 ** 6 ** PWM6
#define PORTMSK_AT_PIN_7 _BV( 4 ) // PH 4 ** 7 ** PWM7
#define PORTMSK_AT_PIN_8 _BV( 5 ) // PH 5 ** 8 ** PWM8
#define PORTMSK_AT_PIN_9 _BV( 6 ) // PH 6 ** 9 ** PWM9
#define PORTMSK_AT_PIN_10 _BV( 4 ) // PB 4 ** 10 ** PWM10
#define PORTMSK_AT_PIN_11 _BV( 5 ) // PB 5 ** 11 ** PWM11
#define PORTMSK_AT_PIN_12 _BV( 6 ) // PB 6 ** 12 ** PWM12
#define PORTMSK_AT_PIN_13 _BV( 7 ) // PB 7 ** 13 ** PWM13
#define PORTMSK_AT_PIN_14 _BV( 1 ) // PJ 1 ** 14 ** USART3_TX
#define PORTMSK_AT_PIN_15 _BV( 0 ) // PJ 0 ** 15 ** USART3_RX
#define PORTMSK_AT_PIN_16 _BV( 1 ) // PH 1 ** 16 ** USART2_TX
#define PORTMSK_AT_PIN_17 _BV( 0 ) // PH 0 ** 17 ** USART2_RX
#define PORTMSK_AT_PIN_18 _BV( 3 ) // PD 3 ** 18 ** USART1_TX
#define PORTMSK_AT_PIN_19 _BV( 2 ) // PD 2 ** 19 ** USART1_RX
#define PORTMSK_AT_PIN_20 _BV( 1 ) // PD 1 ** 20 ** I2C_SDA
#define PORTMSK_AT_PIN_21 _BV( 0 ) // PD 0 ** 21 ** I2C_SCL
#define PORTMSK_AT_PIN_22 _BV( 0 ) // PA 0 ** 22 ** D22
#define PORTMSK_AT_PIN_23 _BV( 1 ) // PA 1 ** 23 ** D23
#define PORTMSK_AT_PIN_24 _BV( 2 ) // PA 2 ** 24 ** D24
#define PORTMSK_AT_PIN_25 _BV( 3 ) // PA 3 ** 25 ** D25
#define PORTMSK_AT_PIN_26 _BV( 4 ) // PA 4 ** 26 ** D26
#define PORTMSK_AT_PIN_27 _BV( 5 ) // PA 5 ** 27 ** D27
#define PORTMSK_AT_PIN_28 _BV( 6 ) // PA 6 ** 28 ** D28
#define PORTMSK_AT_PIN_29 _BV( 7 ) // PA 7 ** 29 ** D29
#define PORTMSK_AT_PIN_30 _BV( 7 ) // PC 7 ** 30 ** D30
#define PORTMSK_AT_PIN_31 _BV( 6 ) // PC 6 ** 31 ** D31
#define PORTMSK_AT_PIN_32 _BV( 5 ) // PC 5 ** 32 ** D32
#define PORTMSK_AT_PIN_33 _BV( 4 ) // PC 4 ** 33 ** D33
#define PORTMSK_AT_PIN_34 _BV( 3 ) // PC 3 ** 34 ** D34
#define PORTMSK_AT_PIN_35 _BV( 2 ) // PC 2 ** 35 ** D35
#define PORTMSK_AT_PIN_36 _BV( 1 ) // PC 1 ** 36 ** D36
#define PORTMSK_AT_PIN_37 _BV( 0 ) // PC 0 ** 37 ** D37
#define PORTMSK_AT_PIN_38 _BV( 7 ) // PD 7 ** 38 ** D38
#define PORTMSK_AT_PIN_39 _BV( 2 ) // PG 2 ** 39 ** D39
#define PORTMSK_AT_PIN_40 _BV( 1 ) // PG 1 ** 40 ** D40
#define PORTMSK_AT_PIN_41 _BV( 0 ) // PG 0 ** 41 ** D41
#define PORTMSK_AT_PIN_42 _BV( 7 ) // PL 7 ** 42 ** D42
#define PORTMSK_AT_PIN_43 _BV( 6 ) // PL 6 ** 43 ** D43
#define PORTMSK_AT_PIN_44 _BV( 5 ) // PL 5 ** 44 ** D44
#define PORTMSK_AT_PIN_45 _BV( 4 ) // PL 4 ** 45 ** D45
#define PORTMSK_AT_PIN_46 _BV( 3 ) // PL 3 ** 46 ** D46
#define PORTMSK_AT_PIN_47 _BV( 2 ) // PL 2 ** 47 ** D47
#define PORTMSK_AT_PIN_48 _BV( 1 ) // PL 1 ** 48 ** D48
#define PORTMSK_AT_PIN_49 _BV( 0 ) // PL 0 ** 49 ** D49
#define PORTMSK_AT_PIN_50 _BV( 3 ) // PB 3 ** 50 ** SPI_MISO
#define PORTMSK_AT_PIN_51 _BV( 2 ) // PB 2 ** 51 ** SPI_MOSI
#define PORTMSK_AT_PIN_52 _BV( 1 ) // PB 1 ** 52 ** SPI_SCK
#define PORTMSK_AT_PIN_53 _BV( 0 ) // PB 0 ** 53 ** SPI_SS
#define PORTMSK_AT_PIN_54 _BV( 0 ) // PF 0 ** 54 ** A0
#define PORTMSK_AT_PIN_55 _BV( 1 ) // PF 1 ** 55 ** A1
#define PORTMSK_AT_PIN_56 _BV( 2 ) // PF 2 ** 56 ** A2
#define PORTMSK_AT_PIN_57 _BV( 3 ) // PF 3 ** 57 ** A3
#define PORTMSK_AT_PIN_58 _BV( 4 ) // PF 4 ** 58 ** A4
#define PORTMSK_AT_PIN_59 _BV( 5 ) // PF 5 ** 59 ** A5
#define PORTMSK_AT_PIN_60 _BV( 6 ) // PF 6 ** 60 ** A6
#define PORTMSK_AT_PIN_61 _BV( 7 ) // PF 7 ** 61 ** A7
#define PORTMSK_AT_PIN_62 _BV( 0 ) // PK 0 ** 62 ** A8
#define PORTMSK_AT_PIN_63 _BV( 1 ) // PK 1 ** 63 ** A9
#define PORTMSK_AT_PIN_64 _BV( 2 ) // PK 2 ** 64 ** A10
#define PORTMSK_AT_PIN_65 _BV( 3 ) // PK 3 ** 65 ** A11
#define PORTMSK_AT_PIN_66 _BV( 4 ) // PK 4 ** 66 ** A12
#define PORTMSK_AT_PIN_67 _BV( 5 ) // PK 5 ** 67 ** A13
#define PORTMSK_AT_PIN_68 _BV( 6 ) // PK 6 ** 68 ** A14
#define PORTMSK_AT_PIN_69 _BV( 7 ) // PK 7 ** 69 ** A15
////////////Arduino pin to Timer Regs mapping
#define TIMER_AT_PIN_2 3B
#define TCCR_AT_PIN_2 TCCR3A
#define TIMER_AT_PIN_3 3C
#define TCCR_AT_PIN_3 TCCR3A
#define TIMER_AT_PIN_4 0B
#define TCCR_AT_PIN_4 TCCR0A
#define TIMER_AT_PIN_5 3A
#define TCCR_AT_PIN_5 TCCR3A
#define TIMER_AT_PIN_6 4A
#define TCCR_AT_PIN_6 TCCR4A
#define TIMER_AT_PIN_7 4B
#define TCCR_AT_PIN_7 TCCR4A
#define TIMER_AT_PIN_8 4C
#define TCCR_AT_PIN_8 TCCR4A
#define TIMER_AT_PIN_9 2B
#define TCCR_AT_PIN_9 TCCR2A
#define TIMER_AT_PIN_10 2A
#define TCCR_AT_PIN_10 TCCR2A
#define TIMER_AT_PIN_11 1A
#define TCCR_AT_PIN_11 TCCR1A
#define TIMER_AT_PIN_12 1B
#define TCCR_AT_PIN_12 TCCR1A
#define TIMER_AT_PIN_13 0A
#define TCCR_AT_PIN_13 TCCR0A
#define TIMER_AT_PIN_44 5C
#define TCCR_AT_PIN_44 TCCR5A
#define TIMER_AT_PIN_45 5B
#define TCCR_AT_PIN_45 TCCR5A
#define TIMER_AT_PIN_46 5A
#define TCCR_AT_PIN_46 TCCR5A
////////////PORT to DDRX mapping
#define DIR_REG_AT_PortA DDRA
#define DIR_REG_AT_PortB DDRB
#define DIR_REG_AT_PortC DDRC
#define DIR_REG_AT_PortD DDRD
#define DIR_REG_AT_PortE DDRE
#define DIR_REG_AT_PortF DDRF
#define DIR_REG_AT_PortG DDRG
#define DIR_REG_AT_PortH DDRH
#define DIR_REG_AT_PortJ DDRJ
#define DIR_REG_AT_PortK DDRK
#define DIR_REG_AT_PortL DDRL
////////////PORT to PORTX mapping
#define OUTPUT_REG_AT_PortA PORTA
#define OUTPUT_REG_AT_PortB PORTB
#define OUTPUT_REG_AT_PortC PORTC
#define OUTPUT_REG_AT_PortD PORTD
#define OUTPUT_REG_AT_PortE PORTE
#define OUTPUT_REG_AT_PortF PORTF
#define OUTPUT_REG_AT_PortG PORTG
#define OUTPUT_REG_AT_PortH PORTH
#define OUTPUT_REG_AT_PortJ PORTJ
#define OUTPUT_REG_AT_PortK PORTK
#define OUTPUT_REG_AT_PortL PORTL
////////////PORT to PINX(input regs) mapping
#define INPUT_REG_AT_PortA PINA
#define INPUT_REG_AT_PortB PINB
#define INPUT_REG_AT_PortC PINC
#define INPUT_REG_AT_PortD PIND
#define INPUT_REG_AT_PortE PINE
#define INPUT_REG_AT_PortF PINF
#define INPUT_REG_AT_PortG PING
#define INPUT_REG_AT_PortH PINH
#define INPUT_REG_AT_PortJ PINJ
#define INPUT_REG_AT_PortK PINK
#define INPUT_REG_AT_PortL PINL
#else /* not __AVR_ATmega1280__ */
#if defined(__AVR_ATtiny2313__)
//no PortC on tiny2313
//Pin[0-6] -> PortD[0-6]
#define PORT_AT_PIN_0 PortD /* 0 */
#define PORT_AT_PIN_1 PortD
#define PORT_AT_PIN_2 PortD
#define PORT_AT_PIN_3 PortD
#define PORT_AT_PIN_4 PortD
#define PORT_AT_PIN_5 PortD
#define PORT_AT_PIN_6 PortD
//Pin[7-14] -> PortB[0-7]
#define PORT_AT_PIN_7 PortB
#define PORT_AT_PIN_8 PortB /* 8 */
#define PORT_AT_PIN_9 PortB
#define PORT_AT_PIN_10 PortB
#define PORT_AT_PIN_11 PortB
#define PORT_AT_PIN_12 PortB
#define PORT_AT_PIN_13 PortB
#define PORT_AT_PIN_14 PortB
#elif defined(__AVR_ATtiny26__)
//Pin[0-6] -> PortD[0-6]
#define PORT_AT_PIN_0 PortB /* 0 */
#define PORT_AT_PIN_1 PortB
#define PORT_AT_PIN_2 PortB
#define PORT_AT_PIN_3 PortB
#define PORT_AT_PIN_4 PortB
#define PORT_AT_PIN_5 PortB
#define PORT_AT_PIN_6 PortB
//D[7-13] and A[0-9] share the same pins on Attiny26
#define PORT_AT_PIN_7 PortA /* 0 */
#define PORT_AT_PIN_8 PortA
#define PORT_AT_PIN_9 PortA
#define PORT_AT_PIN_10 PortA
#define PORT_AT_PIN_11 PortA
#define PORT_AT_PIN_12 PortA
#define PORT_AT_PIN_13 PortA
#else // Atmega8 / Atmegax8
#define PORT_AT_PIN_0 PortD /* 0 */
#define PORT_AT_PIN_1 PortD
#define PORT_AT_PIN_2 PortD
#define PORT_AT_PIN_3 PortD
#define PORT_AT_PIN_4 PortD
#define PORT_AT_PIN_5 PortD
#define PORT_AT_PIN_6 PortD
#define PORT_AT_PIN_7 PortD
#define PORT_AT_PIN_8 PortB /* 8 */
#define PORT_AT_PIN_9 PortB
#define PORT_AT_PIN_10 PortB
#define PORT_AT_PIN_11 PortB
#define PORT_AT_PIN_12 PortB
#define PORT_AT_PIN_13 PortB
#define PORT_AT_PIN_14 PortC /* 14 */
#define PORT_AT_PIN_15 PortC
#define PORT_AT_PIN_16 PortC
#define PORT_AT_PIN_17 PortC
#define PORT_AT_PIN_18 PortC
#define PORT_AT_PIN_19 PortC
#define PORT_AT_PIN_20 PortB
#define PORT_AT_PIN_21 PortB
#endif
#if defined(__AVR_ATtiny2313__)
#define PORTMSK_AT_PIN_0 _BV(0)
#define PORTMSK_AT_PIN_1 _BV(1)
#define PORTMSK_AT_PIN_2 _BV(2)
#define PORTMSK_AT_PIN_3 _BV(3)
#define PORTMSK_AT_PIN_4 _BV(4)
#define PORTMSK_AT_PIN_5 _BV(5)
#define PORTMSK_AT_PIN_6 _BV(6)
#define PORTMSK_AT_PIN_7 _BV(0)
#define PORTMSK_AT_PIN_8 _BV(1)
#define PORTMSK_AT_PIN_9 _BV(2)
#define PORTMSK_AT_PIN_10 _BV(3)
#define PORTMSK_AT_PIN_11 _BV(4)
#define PORTMSK_AT_PIN_12 _BV(5)
#define PORTMSK_AT_PIN_13 _BV(6)
#define PORTMSK_AT_PIN_14 _BV(7)
#elif defined(__AVR_ATtiny26__)
#define PORTMSK_AT_PIN_0 _BV(0)
#define PORTMSK_AT_PIN_1 _BV(1)
#define PORTMSK_AT_PIN_2 _BV(2)
#define PORTMSK_AT_PIN_3 _BV(3)
#define PORTMSK_AT_PIN_4 _BV(4)
#define PORTMSK_AT_PIN_5 _BV(5)
#define PORTMSK_AT_PIN_6 _BV(6)
#define PORTMSK_AT_PIN_7 _BV(0)
#define PORTMSK_AT_PIN_8 _BV(1)
#define PORTMSK_AT_PIN_9 _BV(2)
#define PORTMSK_AT_PIN_10 _BV(3)
#define PORTMSK_AT_PIN_11 _BV(4)
#define PORTMSK_AT_PIN_12 _BV(5)
#define PORTMSK_AT_PIN_13 _BV(6)
#else //Atmega8/ Atmegax8
#define PORTMSK_AT_PIN_0 _BV(0) /* 0 port D */
#define PORTMSK_AT_PIN_1 _BV(1)
#define PORTMSK_AT_PIN_2 _BV(2)
#define PORTMSK_AT_PIN_3 _BV(3)
#define PORTMSK_AT_PIN_4 _BV(4)
#define PORTMSK_AT_PIN_5 _BV(5)
#define PORTMSK_AT_PIN_6 _BV(6)
#define PORTMSK_AT_PIN_7 _BV(7)
#define PORTMSK_AT_PIN_8 _BV(0) /* 8 port B */
#define PORTMSK_AT_PIN_9 _BV(1)
#define PORTMSK_AT_PIN_10 _BV(2)
#define PORTMSK_AT_PIN_11 _BV(3)
#define PORTMSK_AT_PIN_12 _BV(4)
#define PORTMSK_AT_PIN_13 _BV(5)
#define PORTMSK_AT_PIN_14 _BV(0) /* 14 port C */
#define PORTMSK_AT_PIN_15 _BV(1)
#define PORTMSK_AT_PIN_16 _BV(2)
#define PORTMSK_AT_PIN_17 _BV(3)
#define PORTMSK_AT_PIN_18 _BV(4)
#define PORTMSK_AT_PIN_19 _BV(5)
#define PORTMSK_AT_PIN_20 _BV(6)
#define PORTMSK_AT_PIN_21 _BV(7)
#endif
////////////PORT to DDRX mapping
#define DIR_REG_AT_PortA DDRA
#define DIR_REG_AT_PortB DDRB
#if defined(__AVR_ATtiny2313__)
//no PortC on tiny2313
#else
#define DIR_REG_AT_PortC DDRC
#endif
#define DIR_REG_AT_PortD DDRD
////////////PORT to PORTX mapping
#define OUTPUT_REG_AT_PortA PORTA
#define OUTPUT_REG_AT_PortB PORTB
#if defined(__AVR_ATtiny2313__)
//no PortC on tiny2313
#else
#define OUTPUT_REG_AT_PortC PORTC
#endif
#define OUTPUT_REG_AT_PortD PORTD
////////////PORT to PINX(input regs) mapping
#define INPUT_REG_AT_PortA PINA
#define INPUT_REG_AT_PortB PINB
#if defined(__AVR_ATtiny2313__)
//no PortC on tiny2313
#else
#define INPUT_REG_AT_PortC PINC
#endif
#define INPUT_REG_AT_PortD PIND
#if defined(__AVR_ATtiny2313__)
#define TIMER_AT_PIN_5 0B
#define TCCR_AT_PIN_5 TCCR0A
#define TIMER_AT_PIN_9 0A
#define TCCR_AT_PIN_9 TCCR0A
#define TIMER_AT_PIN_10 1A
#define TCCR_AT_PIN_10 TCCR1A
#define TIMER_AT_PIN_11 1B
#define TCCR_AT_PIN_11 TCCR1A
#elif defined(__AVR_ATtiny26__)
/*
#define TIMER_AT_PIN_0 1A
#define TCCR_AT_PIN_0 TCCR1A
*/
#define TIMER_AT_PIN_1 1A
#define TCCR_AT_PIN_1 TCCR1A
/*
#define TIMER_AT_PIN_2 1B
#define TCCR_AT_PIN_2 TCCR1A
*/
#define TIMER_AT_PIN_3 1B
#define TCCR_AT_PIN_3 TCCR1A
#else
#if !defined(__AVR_ATmega8__) //for Atmega48/88/168/328
#define TIMER_AT_PIN_3 2B
#define TCCR_AT_PIN_3 TCCR2A
#define TIMER_AT_PIN_5 0B
#define TCCR_AT_PIN_5 TCCR0A
#define TIMER_AT_PIN_6 0A
#define TCCR_AT_PIN_6 TCCR0A
#endif
#define TIMER_AT_PIN_9 1A
#define TCCR_AT_PIN_9 TCCR1A
#define TIMER_AT_PIN_10 1B
#define TCCR_AT_PIN_10 TCCR1A
#if defined(__AVR_ATmega8__)
#define TIMER_AT_PIN_11 2
#define TCCR_AT_PIN_11 TCCR2
#else //for Atmega48/88/168/328
#define TIMER_AT_PIN_11 2A
#define TCCR_AT_PIN_11 TCCR2A
#endif
#endif
#endif
#define MERGE_TO_FUNC(prefix, id) prefix##_##id
#define EXPAND_WRAPPER( NEXTLEVEL, ...) NEXTLEVEL( __VA_ARGS__ )
#define _PWM_SET(id, val) \
do{ \
OCR##id = val; \
} \
while(0)
#define _PWM_ENABLE(TCCR, id) sbi(TCCR, COM##id##1)
#define _PWM_DISABLE(TCCR, id) cbi(TCCR, COM##id##1)
#define _SET_OUTPUT(port_id, msk) PORTID_TO_DIR_REG(port_id) |= (msk)
#define _SET_INTPUT(port_id, msk) PORTID_TO_DIR_REG(port_id) &= ~(msk)
#define _D_WRITE_HIGH(port_id, msk) PORTID_TO_OUTPUT_REG(port_id) |= (msk)
#define _D_WRITE_LOW(port_id, msk) PORTID_TO_OUTPUT_REG(port_id) &= ~(msk)
#define _D_READ_RAW(port_id, msk) ((PORTID_TO_INPUT_REG(port_id)) & (msk))
#define _D_READ(port_id, msk) (((PORTID_TO_INPUT_REG(port_id)) & (msk)) != 0 ? 1 : 0)
#define _D_TOGGLE(port_id, msk) PORTID_TO_OUTPUT_REG(port_id) ^= (msk)
/*
*
* NOTICE: for pins at timer0A/0B,
* if the duty cycle to be set equals to zero, using the following code:
* DIGITAL_WRITE(pin, LOW);
* -- or --
* digitalWrite(pin, LOW);
* The caller should make sure the current pin has been set to OUTPUT mode first
*/
#define SET_1(pin) SET_OUTPUT(pin)
#define SET_0(pin) SET_INPUT(pin)
#define SET_0x1(pin) SET_OUTPUT(pin)
#define SET_0x0(pin) SET_INPUT(pin)
#define D_WRITE_HIGH(pin) EXPAND_WRAPPER(_D_WRITE_HIGH, ARDUINOPIN_TO_PORTID(pin), ARDUINOPIN_TO_PORTMSK(pin) )
#define D_WRITE_LOW(pin) EXPAND_WRAPPER(_D_WRITE_LOW, ARDUINOPIN_TO_PORTID(pin), ARDUINOPIN_TO_PORTMSK(pin) )
#define D_WRITE_1(pin) D_WRITE_HIGH(pin)
#define D_WRITE_0(pin) D_WRITE_LOW(pin)
#define D_WRITE_0x1(pin) D_WRITE_HIGH(pin)
#define D_WRITE_0x0(pin) D_WRITE_LOW(pin)
#define D_WRITE_ENABLE(pin) D_WRITE_HIGH(pin)
#define D_WRITE_DISABLE(pin) D_WRITE_LOW(pin)
#define SET_OUTPUT(pin) EXPAND_WRAPPER(_SET_OUTPUT, ARDUINOPIN_TO_PORTID(pin), ARDUINOPIN_TO_PORTMSK(pin) )
#define SET_INPUT(pin) EXPAND_WRAPPER(_SET_INTPUT, ARDUINOPIN_TO_PORTID(pin), ARDUINOPIN_TO_PORTMSK(pin) )
#define pin_mode(pin, mode) SET_##mode(pin)
#define pin_pullup(pin, val) D_WRITE_##val(pin)
#define pin_toggle(pin) EXPAND_WRAPPER(_D_TOGGLE, ARDUINOPIN_TO_PORTID(pin), ARDUINOPIN_TO_PORTMSK(pin) )
#endif /* PINS_H */

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/*
* digital.h
*
* Lightweight macro implementation of AVR pin numbering for
* accessing Atmel digital and analog pins.
*
* pin_mode(A1, OUTPUT);
* digital_write(A1, HIGH);
* pin_mode(A2, INPUT);
* digital_read(A2);
*
* This file is based on the excellent ArduinoLite project by
* Shikai Chen <csk@live.com>.
*
* http://code.google.com/p/arduino-lite/
* http://www.csksoft.net/
*
* This file is part of Triple-A library:
* https://github.com/tuupola/triple-a
*
* Copyright (c) 2010-2011 Shikai Chen, Mika Tuupola
*
* Licensed under the LGPL 2.1 license:
* http://www.opensource.org/licenses/lgpl-2.1.php
*/
#ifndef DIGITAL_H
#define DIGITAL_H
#include "pins.h"
#define digital_read(pin) EXPAND_WRAPPER(_DIGITAL_READ, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
#define digital_read_raw(pin) EXPAND_WRAPPER(_DIGITAL_READ_RAW, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
#define digital_write(pin, val) DIGITAL_WRITE_##val(pin)
#define digital_toggle(pin) EXPAND_WRAPPER(_DIGITAL_TOGGLE, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
#endif /* DIGITAL_H */

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/*
* pins.h
*
* Lightweight macro implementation of AVR pin numbering for
* accessing Atmel digital and analog pins.
*
* pin_mode(A1, OUTPUT);
* digital_write(A1, HIGH);
* pin_mode(A2, INPUT);
* digital_read(A2);
*
* This file is based on the excellent ArduinoLite project by
* Shikai Chen <csk@live.com>.
*
* http://code.google.com/p/arduino-lite/
* http://www.csksoft.net/
*
* This file is part of Triple-A library:
* https://github.com/tuupola/triple-a
*
* Copyright (c) 2010-2011 Shikai Chen, Mika Tuupola
*
* Licensed under the LGPL 2.1 license:
* http://www.opensource.org/licenses/lgpl-2.1.php
*/
#ifndef PINS_H
#define PINS_H
#include <avr/sfr_defs.h>
#include <avr/io.h>
/* #include "arduino.h" */
#define HIGH 0x1
#define LOW 0x0
#define INPUT 0x0
#define OUTPUT 0x1
#define ENABLE 0x1
#define DISABLE 0x0
#define PIN_TO_PORT(x) PORT_AT_PIN_##x
#define PIN_TO_MASK(x) MASK_AT_PIN_##x
#define PORT_TO_DIRECTION_REGISTER(x) DIRECTION_REGISTER_AT_##x
#define PORT_TO_OUTPUT_REGISTER(x) OUTPUT_REGISTER_AT_##x
#define PORT_TO_INPUT_REGISTER(x) INPUT_REGISTER_AT_##x
#ifdef PORTA
#define DIRECTION_REGISTER_AT_PortA DDRA
#define OUTPUT_REGISTER_AT_PortA PORTA
#define INPUT_REGISTER_AT_PortA PINA
#define PORT_AT_PIN_A0 PortA
#define PORT_AT_PIN_A1 PortA
#define PORT_AT_PIN_A2 PortA
#define PORT_AT_PIN_A3 PortA
#define PORT_AT_PIN_A4 PortA
#define PORT_AT_PIN_A5 PortA
#define PORT_AT_PIN_A6 PortA
#define PORT_AT_PIN_A7 PortA
#define MASK_AT_PIN_A0 _BV(0)
#define MASK_AT_PIN_A1 _BV(1)
#define MASK_AT_PIN_A2 _BV(2)
#define MASK_AT_PIN_A3 _BV(3)
#define MASK_AT_PIN_A4 _BV(4)
#define MASK_AT_PIN_A5 _BV(5)
#define MASK_AT_PIN_A6 _BV(6)
#define MASK_AT_PIN_A7 _BV(7)
#endif
#ifdef PORTB
#define DIRECTION_REGISTER_AT_PortB DDRB
#define OUTPUT_REGISTER_AT_PortB PORTB
#define INPUT_REGISTER_AT_PortB PINB
#define PORT_AT_PIN_B0 PortB
#define PORT_AT_PIN_B1 PortB
#define PORT_AT_PIN_B2 PortB
#define PORT_AT_PIN_B3 PortB
#define PORT_AT_PIN_B4 PortB
#define PORT_AT_PIN_B5 PortB
#define PORT_AT_PIN_B6 PortB
#define PORT_AT_PIN_B7 PortB
#define MASK_AT_PIN_B0 _BV(0)
#define MASK_AT_PIN_B1 _BV(1)
#define MASK_AT_PIN_B2 _BV(2)
#define MASK_AT_PIN_B3 _BV(3)
#define MASK_AT_PIN_B4 _BV(4)
#define MASK_AT_PIN_B5 _BV(5)
#define MASK_AT_PIN_B6 _BV(6)
#define MASK_AT_PIN_B7 _BV(7)
#endif
#ifdef PORTC
#define DIRECTION_REGISTER_AT_PortC DDRC
#define OUTPUT_REGISTER_AT_PortC PORTC
#define INPUT_REGISTER_AT_PortC PINC
#define PORT_AT_PIN_C0 PortC
#define PORT_AT_PIN_C1 PortC
#define PORT_AT_PIN_C2 PortC
#define PORT_AT_PIN_C3 PortC
#define PORT_AT_PIN_C4 PortC
#define PORT_AT_PIN_C5 PortC
#define PORT_AT_PIN_C6 PortC
#define PORT_AT_PIN_C7 PortC
#define MASK_AT_PIN_C0 _BV(0)
#define MASK_AT_PIN_C1 _BV(1)
#define MASK_AT_PIN_C2 _BV(2)
#define MASK_AT_PIN_C3 _BV(3)
#define MASK_AT_PIN_C4 _BV(4)
#define MASK_AT_PIN_C5 _BV(5)
#define MASK_AT_PIN_C6 _BV(6)
#define MASK_AT_PIN_C7 _BV(7)
#endif
#ifdef PORTD
#define DIRECTION_REGISTER_AT_PortD DDRD
#define OUTPUT_REGISTER_AT_PortD PORTD
#define INPUT_REGISTER_AT_PortD PIND
#define PORT_AT_PIN_D0 PortD
#define PORT_AT_PIN_D1 PortD
#define PORT_AT_PIN_D2 PortD
#define PORT_AT_PIN_D3 PortD
#define PORT_AT_PIN_D4 PortD
#define PORT_AT_PIN_D5 PortD
#define PORT_AT_PIN_D6 PortD
#define PORT_AT_PIN_D7 PortD
#define MASK_AT_PIN_D0 _BV(0)
#define MASK_AT_PIN_D1 _BV(1)
#define MASK_AT_PIN_D2 _BV(2)
#define MASK_AT_PIN_D3 _BV(3)
#define MASK_AT_PIN_D4 _BV(4)
#define MASK_AT_PIN_D5 _BV(5)
#define MASK_AT_PIN_D6 _BV(6)
#define MASK_AT_PIN_D7 _BV(7)
#endif
#ifdef PORTE
#define DIRECTION_REGISTER_AT_PortE DDRE
#define OUTPUT_REGISTER_AT_PortE PORTE
#define INPUT_REGISTER_AT_PortE PINE
#define PORT_AT_PIN_E0 PortE
#define PORT_AT_PIN_E1 PortE
#define PORT_AT_PIN_E2 PortE
#define PORT_AT_PIN_E3 PortE
#define PORT_AT_PIN_E4 PortE
#define PORT_AT_PIN_E5 PortE
#define PORT_AT_PIN_E6 PortE
#define PORT_AT_PIN_E7 PortE
#define MASK_AT_PIN_E0 _BV(0)
#define MASK_AT_PIN_E1 _BV(1)
#define MASK_AT_PIN_E2 _BV(2)
#define MASK_AT_PIN_E3 _BV(3)
#define MASK_AT_PIN_E4 _BV(4)
#define MASK_AT_PIN_E5 _BV(5)
#define MASK_AT_PIN_E6 _BV(6)
#define MASK_AT_PIN_E7 _BV(7)
#endif
#ifdef PORTF
#define DIRECTION_REGISTER_AT_PortF DDRF
#define OUTPUT_REGISTER_AT_PortF PORTF
#define INPUT_REGISTER_AT_PortF PINF
#define PORT_AT_PIN_F0 PortF
#define PORT_AT_PIN_F1 PortF
#define PORT_AT_PIN_F2 PortF
#define PORT_AT_PIN_F3 PortF
#define PORT_AT_PIN_F4 PortF
#define PORT_AT_PIN_F5 PortF
#define PORT_AT_PIN_F6 PortF
#define PORT_AT_PIN_F7 PortF
#define MASK_AT_PIN_F0 _BV(0)
#define MASK_AT_PIN_F1 _BV(1)
#define MASK_AT_PIN_F2 _BV(2)
#define MASK_AT_PIN_F3 _BV(3)
#define MASK_AT_PIN_F4 _BV(4)
#define MASK_AT_PIN_F5 _BV(5)
#define MASK_AT_PIN_F6 _BV(6)
#define MASK_AT_PIN_F7 _BV(7)
#endif
#define MERGE_TO_FUNC(prefix, id) prefix##_##id
#define EXPAND_WRAPPER(NEXTLEVEL, ...) NEXTLEVEL(__VA_ARGS__)
#define _SET_OUTPUT(port_id, msk) PORT_TO_DIRECTION_REGISTER(port_id) |= (msk)
#define _SET_INPUT(port_id, msk) PORT_TO_DIRECTION_REGISTER(port_id) &= ~(msk)
#define _DIGITAL_WRITE_HIGH(port_id, msk) PORT_TO_OUTPUT_REGISTER(port_id) |= (msk)
#define _DIGITAL_WRITE_LOW(port_id, msk) PORT_TO_OUTPUT_REGISTER(port_id) &= ~(msk)
#define _DIGITAL_READ_RAW(port_id, msk) ((PORT_TO_INPUT_REGISTER(port_id)) & (msk))
#define _DIGITAL_READ(port_id, msk) (((PORT_TO_INPUT_REGISTER(port_id)) & (msk)) != 0 ? 1 : 0)
#define _DIGITAL_TOGGLE(port_id, msk) PORT_TO_OUTPUT_REGISTER(port_id) ^= (msk)
#define SET_1(pin) SET_OUTPUT(pin)
#define SET_0(pin) SET_INPUT(pin)
#define SET_0x1(pin) SET_OUTPUT(pin)
#define SET_0x0(pin) SET_INPUT(pin)
#define DIGITAL_WRITE_HIGH(pin) EXPAND_WRAPPER(_DIGITAL_WRITE_HIGH, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
#define DIGITAL_WRITE_LOW(pin) EXPAND_WRAPPER(_DIGITAL_WRITE_LOW, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
#define DIGITAL_WRITE_1(pin) DIGITAL_WRITE_HIGH(pin)
#define DIGITAL_WRITE_0(pin) DIGITAL_WRITE_LOW(pin)
#define DIGITAL_WRITE_0x1(pin) DIGITAL_WRITE_HIGH(pin)
#define DIGITAL_WRITE_0x0(pin) DIGITAL_WRITE_LOW(pin)
#define DIGITAL_WRITE_ENABLE(pin) DIGITAL_WRITE_HIGH(pin)
#define DIGITAL_WRITE_DISABLE(pin) DIGITAL_WRITE_LOW(pin)
#define SET_OUTPUT(pin) EXPAND_WRAPPER(_SET_OUTPUT, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
#define SET_INPUT(pin) EXPAND_WRAPPER(_SET_INPUT, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
#define pin_mode(pin, mode) SET_##mode(pin)
#define pin_pullup(pin, val) DIGITAL_WRITE_##val(pin)
#endif /* PINS_H */

74
74hc165_shiftin/shift/shift.c Normal file
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/*
* shift.c
*
* This file is part of Triple-A library:
* https://github.com/tuupola/triple-a
*
* Copyright 2011-2012 Mika Tuupola
*
* Licensed under the MIT license:
* http://www.opensource.org/licenses/mit-license.php
*
*/
#include "pins/digital.h"
#include "shift/shift.h"
/* Assumes MSB first. */
uint8_t shift_in(void) {
uint8_t byte = 0;
uint8_t pin_value;
for(int i=0; i<8; i++) {
pin_value = digital_read(SHIFT_IN_DATA);
byte |= (pin_value << ((8 - 1) - i));
#ifdef DEBUG
printf("%d = %d \n", ((8 - 1) - i), pin_value);
#endif
/* Pulse clock to write next bit. */
digital_write(SHIFT_IN_CLOCK, LOW);
digital_write(SHIFT_IN_CLOCK, HIGH);
}
return byte;
}
void shift_in_latch(void) {
digital_write(SHIFT_IN_LATCH, LOW);
digital_write(SHIFT_IN_LATCH, HIGH);
}
void shift_in_init(void) {
pin_mode(SHIFT_OUT_LATCH, OUTPUT);
pin_mode(SHIFT_OUT_CLOCK, OUTPUT);
pin_mode(SHIFT_OUT_DATA, INPUT);
}
/* Assumes MSB first. */
void shift_out(uint8_t data) {
for(uint8_t i = 0; i < 8; i++) {
/* Write bit to data port. */
if (0 == (data & _BV(7 - i))) {
digital_write(SHIFT_OUT_DATA, LOW);
} else {
digital_write(SHIFT_OUT_DATA, HIGH);
}
/* Pulse clock to write next bit. */
digital_write(SHIFT_OUT_CLOCK, LOW);
digital_write(SHIFT_OUT_CLOCK, HIGH);
}
}
void shift_out_latch(void) {
digital_write(SHIFT_OUT_LATCH, LOW);
digital_write(SHIFT_OUT_LATCH, HIGH);
}
void shift_out_init(void) {
pin_mode(SHIFT_OUT_LATCH, OUTPUT);
pin_mode(SHIFT_OUT_CLOCK, OUTPUT);
pin_mode(SHIFT_OUT_DATA, OUTPUT);
}

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74hc165_shiftin/shift/shift.h Normal file
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/*
* shift.h
*
* This file is part of Triple-A library:
* https://github.com/tuupola/triple-a
*
* Copyright 2011-2012 Mika Tuupola
*
* Licensed under the MIT license:
* http://www.opensource.org/licenses/mit-license.php
*
*/
#ifndef SHIFT_H
#define SHIFT_H
/* Configure ports here. */
#define SHIFT_IN_LATCH B0
#define SHIFT_IN_DATA B2
#define SHIFT_IN_CLOCK B1
#define SHIFT_OUT_LATCH B0
#define SHIFT_OUT_DATA B2
#define SHIFT_OUT_CLOCK B1
uint8_t shift_in(void);
void shift_in_latch(void);
void shift_in_init(void);
void shift_out(uint8_t data);
void shift_out_latch(void);
void shift_out_init(void);
#endif /* SHIFT_H */

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74hc165_shiftin/uart/uart.c Normal file
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/*
* Copyright 2011 Mika Tuupola
*
* This file is part of Triple-A library:
* https://github.com/tuupola/triple-a
*
* Licensed under the MIT license:
* http://www.opensource.org/licenses/mit-license.php
*
*/
#include <avr/io.h>
#include <stdio.h>
#ifndef F_CPU
#define F_CPU 16000000UL
#endif
#ifndef BAUD
#define BAUD 9600
#endif
#include <util/setbaud.h>
#if defined (UBRR0H)
#warning UART0
#define UBRRxH UBRR0H
#define UBRRxL UBRR0L
#define UCSRxA UCSR0A
#define U2Xx U2X0
#define UCSRxC UCSR0C
#define UCSZx1 UCSZ01
#define UCSZx0 UCSZ00
#define UCSRxB UCSR0B
#define RXENx RXEN0
#define TXENx TXEN0
#define UDREx UDRE0
#define RXCx RXC0
#define UDRx UDR0
#define UDRIEx UDRIE0
#elif defined (UBRR1H)
#warning UART1
#define UBRRxH UBRR1H
#define UBRRxL UBRR1L
#define UCSRxA UCSR1A
#define U2Xx U2X1
#define UCSRxC UCSR1C
#define UCSZx1 UCSZ11
#define UCSZx0 UCSZ10
#define UCSRxB UCSR1B
#define RXENx RXEN1
#define TXENx TXEN1
#define UDREx UDRE1
#define RXCx RXC1
#define UDRx UDR1
#define UDRIEx UDRIE1
#else
#error No UART?
#endif
/* http://www.cs.mun.ca/~rod/Winter2007/4723/notes/serial/serial.html */
void uart_init(void) {
UBRRxH = UBRRH_VALUE;
UBRRxL = UBRRL_VALUE;
#if USE_2X
UCSRxA |= _BV(U2Xx);
#else
UCSRxA &= ~(_BV(U2Xx));
#endif
UCSRxC = _BV(UCSZx1) | _BV(UCSZx0); /* 8-bit data */
UCSRxB = _BV(RXENx) | _BV(TXENx); /* Enable RX and TX */
}
int uart_putchar(char c, FILE *stream) {
if (c == '\n') {
uart_putchar('\r', stream);
}
loop_until_bit_is_set(UCSRxA, UDREx);
UDRx = c;
return 0;
}
int uart_getchar(FILE *stream) {
loop_until_bit_is_set(UCSRxA, RXCx);
return UDRx;
}

22
74hc165_shiftin/uart.h → 74hc165_shiftin/uart/uart.h
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@ -1,12 +1,28 @@
/*
* uart.h
*
* This file is part of Triple-A library:
* https://github.com/tuupola/triple-a
*
* Copyright 2011 Mika Tuupola
*
* Licensed under the MIT license:
* http://www.opensource.org/licenses/mit-license.php
*
*/
#ifndef UART_H
#define UART_H
int uart_putchar(char c, FILE *stream); int uart_putchar(char c, FILE *stream);
int uart_getchar(FILE *stream); int uart_getchar(FILE *stream);
void uart_init(void); void uart_init(void);
struct rx_ring;
struct tx_ring;
/* http://www.ermicro.com/blog/?p=325 */ /* http://www.ermicro.com/blog/?p=325 */
FILE uart_output = FDEV_SETUP_STREAM(uart_putchar, NULL, _FDEV_SETUP_WRITE); FILE uart_output = FDEV_SETUP_STREAM(uart_putchar, NULL, _FDEV_SETUP_WRITE);
FILE uart_input = FDEV_SETUP_STREAM(NULL, uart_getchar, _FDEV_SETUP_READ); FILE uart_input = FDEV_SETUP_STREAM(NULL, uart_getchar, _FDEV_SETUP_READ);
#endif /* UART_H */

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74hc165_shiftin/uart_async.c → 74hc165_shiftin/uart/uart_async.c
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@ -1,3 +1,16 @@
/*
* uart_async.c
*
* This file is part of Triple-A library:
* https://github.com/tuupola/triple-a
*
* Copyright 2011 Mika Tuupola
*
* Licensed under the MIT license:
* http://www.opensource.org/licenses/mit-license.php
*
*/
/* Based on Atmel Application Note AVR 306 */ /* Based on Atmel Application Note AVR 306 */
#include <avr/io.h> #include <avr/io.h>
@ -10,13 +23,58 @@
#include <util/setbaud.h> #include <util/setbaud.h>
#ifndef UART_RX_BUFFER_SIZE #ifndef UART_RX_BUFFER_SIZE
#define UART_RX_BUFFER_SIZE 32 #define UART_RX_BUFFER_SIZE 128
#endif #endif
#ifndef UART_TX_BUFFER_SIZE #ifndef UART_TX_BUFFER_SIZE
#define UART_TX_BUFFER_SIZE 256 #define UART_TX_BUFFER_SIZE 256
#endif #endif
#if defined (UBRR0H)
#warning Using UART0
#define UBRRxH UBRR0H
#define UBRRxL UBRR0L
#define UCSRxA UCSR0A
#define U2Xx U2X0
#define UCSRxC UCSR0C
#define UCSZx1 UCSZ01
#define UCSZx0 UCSZ00
#define UCSRxB UCSR0B
#define RXENx RXEN0
#define TXENx TXEN0
#define UDREx UDRE0
#define RXCx RXC0
#define UDRx UDR0
#define UDRIEx UDRIE0
#define USARTx_RX_vect USART_RX_vect
#define USARTx_UDRE_vect USART_UDRE_vect
#elif defined (UBRR1H)
#warning Using UART1
#define UBRRxH UBRR1H
#define UBRRxL UBRR1L
#define UCSRxA UCSR1A
#define U2Xx U2X1
#define UCSRxC UCSR1C
#define UCSZx1 UCSZ11
#define UCSZx0 UCSZ10
#define UCSRxB UCSR1B
#define RXENx RXEN1
#define TXENx TXEN1
#define UDREx UDRE1
#define RXCx RXC1
#define UDRx UDR1
#define UDRIEx UDRIE1
#define USARTx_RX_vect USART1_RX_vect
#define USARTx_UDRE_vect USART1_UDRE_vect
#else
#error No UART?
#endif
struct tx_ring { struct tx_ring {
int buffer[UART_TX_BUFFER_SIZE]; int buffer[UART_TX_BUFFER_SIZE];
int start; int start;
@ -42,11 +100,11 @@ void uart_init(void) {
rx_buffer.start = 0; rx_buffer.start = 0;
rx_buffer.end = 0; rx_buffer.end = 0;
UBRR0H = UBRRH_VALUE; UBRRxH = UBRRH_VALUE;
UBRR0L = UBRRL_VALUE; UBRRxL = UBRRL_VALUE;
UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); /* 8-bit data */ UCSRxC = _BV(UCSZx1) | _BV(UCSZx0); /* 8-bit data */
UCSR0B = _BV(RXEN0) | _BV(TXEN0); /* Enable RX and TX */ UCSRxB = _BV(RXENx) | _BV(TXENx); /* Enable RX and TX */
sei(); sei();
} }
@ -63,7 +121,7 @@ int uart_putchar(char c, FILE *stream) {
tx_buffer.end = write_pointer; tx_buffer.end = write_pointer;
/* Data available. Enable the transmit interrupt for serial port 0. */ /* Data available. Enable the transmit interrupt for serial port 0. */
UCSR0B |= _BV(UDRIE0); UCSRxB |= _BV(UDRIEx);
} }
return 0; return 0;
@ -76,26 +134,26 @@ int uart_getchar(FILE *stream) {
return rx_buffer.buffer[read_pointer]; return rx_buffer.buffer[read_pointer];
} }
ISR(USART_RX_vect) { ISR(USARTx_RX_vect) {
int write_pointer = (rx_buffer.end + 1) % UART_RX_BUFFER_SIZE; int write_pointer = (rx_buffer.end + 1) % UART_RX_BUFFER_SIZE;
/* Add next byte to ringbuffer if it has space available. */ /* Add next byte to ringbuffer if it has space available. */
if (write_pointer != rx_buffer.start){ if (write_pointer != rx_buffer.start){
rx_buffer.buffer[rx_buffer.end] = UDR0; rx_buffer.buffer[rx_buffer.end] = UDRx;
rx_buffer.end = write_pointer; rx_buffer.end = write_pointer;
} }
} }
ISR(USART_UDRE_vect){ ISR(USARTx_UDRE_vect){
int read_pointer = (tx_buffer.start + 1) % UART_TX_BUFFER_SIZE; int read_pointer = (tx_buffer.start + 1) % UART_TX_BUFFER_SIZE;
/* Transmit next byte if data available in ringbuffer. */ /* Transmit next byte if data available in ringbuffer. */
if (read_pointer != tx_buffer.end) { if (read_pointer != tx_buffer.end) {
UDR0 = tx_buffer.buffer[read_pointer]; UDRx = tx_buffer.buffer[read_pointer];
tx_buffer.start = read_pointer; tx_buffer.start = read_pointer;
} else { } else {
/* Nothing to send. Disable the transmit interrupt for serial port 0. */ /* Nothing to send. Disable the transmit interrupt for serial port x. */
UCSR0B &= ~_BV(UDRIE0); UCSRxB &= ~_BV(UDRIEx);
} }
} }