Sync triple-a library.
This commit is contained in:
Mika Tuupola
parent
b442556dd0
commit
7733eee103
17 changed files with 333 additions and 974 deletions
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@ -35,7 +35,8 @@
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# MCU name
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MCU = atmega328p
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#MCU = atmega328p
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MCU = atmega32u4
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# Processor frequency.
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# This will define a symbol, F_CPU, in all source code files equal to the
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@ -51,7 +52,7 @@ FORMAT = ihex
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TARGET = main
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# List C source files here. (C dependencies are automatically generated.)
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SRC = $(TARGET).c uart_async.c spi.c
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SRC = $(TARGET).c uart/uart.c spi/spi.c
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# List Assembler source files here.
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# Make them always end in a capital .S. Files ending in a lowercase .s
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@ -192,7 +193,8 @@ LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
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# Type: avrdude -c ?
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# to get a full listing.
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#
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AVRDUDE_PROGRAMMER = arduino
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#AVRDUDE_PROGRAMMER = arduino
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AVRDUDE_PROGRAMMER = avr109
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# com1 = serial port. Use lpt1 to connect to parallel port.
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AVRDUDE_PORT = /dev/tty.usb* # programmer connected to serial device
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@ -32,25 +32,20 @@
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*
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*/
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#define UART_RX_BUFFER_SIZE 128
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#include <stdlib.h>
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#include <stdio.h>
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#include <util/delay.h>
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//#include <avr/io.h>
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#include "main.h"
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#include "uart.h"
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#include "pins.h"
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#include "digital.h"
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#include "spi.h"
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#include "uart/uart.h"
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#include "pins/digital.h"
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#include "spi/spi.h"
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static void init(void) {
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}
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/* Assumes MSB first. */
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void shift_out(uint8_t data) {
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spi_transfer(data);
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}
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int main(void) {
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init();
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@ -62,11 +57,11 @@ int main(void) {
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char binary[17];
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/* Show pattern for 5 seconds. */
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shift_out(0b10101010);
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shift_out(0b11110000);
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spi_transfer(0b10101010);
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spi_transfer(0b11110000);
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digital_write(SPI_SS, LOW);
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digital_write(SPI_SS, HIGH);
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_delay_ms(5000);
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_delay_ms(5000);
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while (1) {
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for(uint16_t i = 0; i < 0xffff; i++) {
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@ -76,8 +71,8 @@ int main(void) {
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printf("%s %d \n", binary, i);
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/* Shift high byte first to shift register. */
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shift_out(i >> 8);
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shift_out(i & 0xff);
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spi_transfer(i >> 8);
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spi_transfer(i & 0xff);
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/* Pulse latch to transfer data from shift registers */
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/* to storage registers. */
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@ -85,8 +80,6 @@ int main(void) {
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//digital_write(LATCH, HIGH);
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digital_write(SPI_SS, LOW);
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digital_write(SPI_SS, HIGH);
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_delay_ms(50);
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}
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}
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return 0;
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@ -22,52 +22,51 @@
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#define ARDUINO_H
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/* atmega328 */
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#define PORT_AT_PIN_0 PortD
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#define PORT_AT_PIN_1 PortD
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#define PORT_AT_PIN_2 PortD
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#define PORT_AT_PIN_3 PortD
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#define PORT_AT_PIN_4 PortD
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#define PORT_AT_PIN_5 PortD
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#define PORT_AT_PIN_6 PortD
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#define PORT_AT_PIN_7 PortD
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#define PORT_AT_PIN_8 PortB
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#define PORT_AT_PIN_9 PortB
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#define PORT_AT_PIN_10 PortB
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#define PORT_AT_PIN_11 PortB
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#define PORT_AT_PIN_12 PortB
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#define PORT_AT_PIN_13 PortB
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#define PORT_AT_PIN_14 PortC
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#define PORT_AT_PIN_15 PortC
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#define PORT_AT_PIN_16 PortC
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#define PORT_AT_PIN_17 PortC
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#define PORT_AT_PIN_18 PortC
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#define PORT_AT_PIN_19 PortC
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#define PORT_AT_PIN_0 PortD
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#define PORT_AT_PIN_1 PortD
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#define PORT_AT_PIN_2 PortD
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#define PORT_AT_PIN_3 PortD
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#define PORT_AT_PIN_4 PortD
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#define PORT_AT_PIN_5 PortD
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#define PORT_AT_PIN_6 PortD
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#define PORT_AT_PIN_7 PortD
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#define PORT_AT_PIN_8 PortB
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#define PORT_AT_PIN_9 PortB
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#define PORT_AT_PIN_10 PortB
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#define PORT_AT_PIN_11 PortB
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#define PORT_AT_PIN_12 PortB
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#define PORT_AT_PIN_13 PortB
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#define PORT_AT_PIN_14 PortC
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#define PORT_AT_PIN_15 PortC
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#define PORT_AT_PIN_16 PortC
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#define PORT_AT_PIN_17 PortC
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#define PORT_AT_PIN_18 PortC
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#define PORT_AT_PIN_19 PortC
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#define PORT_AT_PIN_20 PortB
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#define PORT_AT_PIN_21 PortB
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#define PORT_AT_PIN_20 PortB
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#define PORT_AT_PIN_21 PortB
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#define MASK_AT_PIN_0 _BV(0)
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#define MASK_AT_PIN_1 _BV(1)
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#define MASK_AT_PIN_2 _BV(2)
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#define MASK_AT_PIN_3 _BV(3)
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#define MASK_AT_PIN_4 _BV(4)
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#define MASK_AT_PIN_5 _BV(5)
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#define MASK_AT_PIN_6 _BV(6)
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#define MASK_AT_PIN_7 _BV(7)
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#define MASK_AT_PIN_8 _BV(0)
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#define MASK_AT_PIN_9 _BV(1)
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#define MASK_AT_PIN_10 _BV(2)
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#define MASK_AT_PIN_11 _BV(3)
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#define MASK_AT_PIN_12 _BV(4)
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#define MASK_AT_PIN_13 _BV(5)
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#define MASK_AT_PIN_14 _BV(0)
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#define MASK_AT_PIN_15 _BV(1)
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#define MASK_AT_PIN_16 _BV(2)
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#define MASK_AT_PIN_17 _BV(3)
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#define MASK_AT_PIN_18 _BV(4)
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#define MASK_AT_PIN_19 _BV(5)
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#define MASK_AT_PIN_20 _BV(6)
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#define MASK_AT_PIN_21 _BV(7)
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#define MASK_AT_PIN_0 _BV(0)
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#define MASK_AT_PIN_1 _BV(1)
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#define MASK_AT_PIN_2 _BV(2)
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#define MASK_AT_PIN_3 _BV(3)
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#define MASK_AT_PIN_4 _BV(4)
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#define MASK_AT_PIN_5 _BV(5)
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#define MASK_AT_PIN_6 _BV(6)
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#define MASK_AT_PIN_7 _BV(7)
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#define MASK_AT_PIN_8 _BV(0)
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#define MASK_AT_PIN_9 _BV(1)
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#define MASK_AT_PIN_10 _BV(2)
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#define MASK_AT_PIN_11 _BV(3)
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#define MASK_AT_PIN_12 _BV(4)
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#define MASK_AT_PIN_13 _BV(5)
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#define MASK_AT_PIN_14 _BV(0)
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#define MASK_AT_PIN_15 _BV(1)
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#define MASK_AT_PIN_16 _BV(2)
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#define MASK_AT_PIN_17 _BV(3)
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#define MASK_AT_PIN_18 _BV(4)
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#define MASK_AT_PIN_19 _BV(5)
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#define MASK_AT_PIN_20 _BV(6)
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#define MASK_AT_PIN_21 _BV(7)
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#endif /* ARDUINO_H */
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@ -28,6 +28,6 @@
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#define digital_read(pin) EXPAND_WRAPPER(_DIGITAL_READ, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
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#define digital_read_raw(pin) EXPAND_WRAPPER(_DIGITAL_READ_RAW, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
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#define digital_write(pin, val) DIGITAL_WRITE_##val(pin)
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#define digital_toggle(pin) EXPAND_WRAPPER(_DIGITAL_TOGGLE, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
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#define digital_toggle(pin) EXPAND_WRAPPER(_DIGITAL_TOGGLE, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
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#endif /* DIGITAL_H */
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@ -30,12 +30,12 @@
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#include "arduino.h"
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#define HIGH 0x1
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#define LOW 0x0
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#define LOW 0x0
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#define INPUT 0x0
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#define INPUT 0x0
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#define OUTPUT 0x1
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#define ENABLE 0x1
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#define ENABLE 0x1
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#define DISABLE 0x0
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#define PIN_TO_PORT(x) PORT_AT_PIN_##x
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@ -47,8 +47,8 @@
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#ifdef PORTA
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#define DIRECTION_REGISTER_AT_PortA DDRA
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#define OUTPUT_REGISTER_AT_PortA PORTA
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#define INPUT_REGISTER_AT_PortA PINA
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#define OUTPUT_REGISTER_AT_PortA PORTA
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#define INPUT_REGISTER_AT_PortA PINA
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#define PORT_AT_PIN_A0 PortA
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#define PORT_AT_PIN_A1 PortA
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@ -69,155 +69,160 @@
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#define MASK_AT_PIN_A7 _BV(7)
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#endif
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//#ifdef PORTB
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#ifdef PORTB
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#define DIRECTION_REGISTER_AT_PortB DDRB
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#define OUTPUT_REGISTER_AT_PortB PORTB
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#define INPUT_REGISTER_AT_PortB PINB
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#define OUTPUT_REGISTER_AT_PortB PORTB
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#define INPUT_REGISTER_AT_PortB PINB
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#define PORT_AT_PIN_B0 PortB
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#define PORT_AT_PIN_B1 PortB
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#define PORT_AT_PIN_B2 PortB
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#define PORT_AT_PIN_B3 PortB
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#define PORT_AT_PIN_B4 PortB
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#define PORT_AT_PIN_B5 PortB
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#define PORT_AT_PIN_B6 PortB
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#define PORT_AT_PIN_B7 PortB
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#define PORT_AT_PIN_B0 PortB
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#define PORT_AT_PIN_B1 PortB
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#define PORT_AT_PIN_B2 PortB
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#define PORT_AT_PIN_B3 PortB
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#define PORT_AT_PIN_B4 PortB
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#define PORT_AT_PIN_B5 PortB
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#define PORT_AT_PIN_B6 PortB
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#define PORT_AT_PIN_B7 PortB
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#define MASK_AT_PIN_B0 _BV(0)
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#define MASK_AT_PIN_B1 _BV(1)
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#define MASK_AT_PIN_B2 _BV(2)
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#define MASK_AT_PIN_B3 _BV(3)
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#define MASK_AT_PIN_B4 _BV(4)
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#define MASK_AT_PIN_B5 _BV(5)
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#define MASK_AT_PIN_B6 _BV(6)
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#define MASK_AT_PIN_B7 _BV(7)
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//#endif
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#define MASK_AT_PIN_B0 _BV(0)
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#define MASK_AT_PIN_B1 _BV(1)
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#define MASK_AT_PIN_B2 _BV(2)
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#define MASK_AT_PIN_B3 _BV(3)
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#define MASK_AT_PIN_B4 _BV(4)
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#define MASK_AT_PIN_B5 _BV(5)
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#define MASK_AT_PIN_B6 _BV(6)
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#define MASK_AT_PIN_B7 _BV(7)
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#endif
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#ifdef PORTC
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#define DIRECTION_REGISTER_AT_PortC DDRC
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#define OUTPUT_REGISTER_AT_PortC PORTC
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#define INPUT_REGISTER_AT_PortC PINC
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#define PORT_AT_PIN_C0 PortC
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#define PORT_AT_PIN_C1 PortC
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#define PORT_AT_PIN_C2 PortC
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#define PORT_AT_PIN_C3 PortC
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#define PORT_AT_PIN_C4 PortC
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#define PORT_AT_PIN_C5 PortC
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#define PORT_AT_PIN_C6 PortC
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#define PORT_AT_PIN_C7 PortC
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#define DIRECTION_REGISTER_AT_PortC DDRC
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#define OUTPUT_REGISTER_AT_PortC PORTC
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#define INPUT_REGISTER_AT_PortC PINC
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#define MASK_AT_PIN_C0 _BV(0)
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#define MASK_AT_PIN_C1 _BV(1)
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#define MASK_AT_PIN_C2 _BV(2)
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#define MASK_AT_PIN_C3 _BV(3)
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#define MASK_AT_PIN_C4 _BV(4)
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#define MASK_AT_PIN_C5 _BV(5)
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#define MASK_AT_PIN_C6 _BV(6)
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#define MASK_AT_PIN_C7 _BV(7)
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#define PORT_AT_PIN_C0 PortC
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#define PORT_AT_PIN_C1 PortC
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#define PORT_AT_PIN_C2 PortC
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#define PORT_AT_PIN_C3 PortC
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#define PORT_AT_PIN_C4 PortC
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#define PORT_AT_PIN_C5 PortC
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#define PORT_AT_PIN_C6 PortC
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#define PORT_AT_PIN_C7 PortC
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#define MASK_AT_PIN_C0 _BV(0)
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#define MASK_AT_PIN_C1 _BV(1)
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#define MASK_AT_PIN_C2 _BV(2)
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#define MASK_AT_PIN_C3 _BV(3)
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#define MASK_AT_PIN_C4 _BV(4)
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#define MASK_AT_PIN_C5 _BV(5)
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#define MASK_AT_PIN_C6 _BV(6)
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#define MASK_AT_PIN_C7 _BV(7)
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#endif
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#ifdef PORTD
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#define DIRECTION_REGISTER_AT_PortD DDRD
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#define OUTPUT_REGISTER_AT_PortD PORTD
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#define INPUT_REGISTER_AT_PortD PIND
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#define PORT_AT_PIN_D0 PortD
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#define PORT_AT_PIN_D1 PortD
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#define PORT_AT_PIN_D2 PortD
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#define PORT_AT_PIN_D3 PortD
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#define PORT_AT_PIN_D4 PortD
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#define PORT_AT_PIN_D5 PortD
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#define PORT_AT_PIN_D6 PortD
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#define PORT_AT_PIN_D7 PortD
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#define MASK_AT_PIN_D0 _BV(0)
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#define MASK_AT_PIN_D1 _BV(1)
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#define MASK_AT_PIN_D2 _BV(2)
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#define MASK_AT_PIN_D3 _BV(3)
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#define MASK_AT_PIN_D4 _BV(4)
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#define MASK_AT_PIN_D5 _BV(5)
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#define MASK_AT_PIN_D6 _BV(6)
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#define MASK_AT_PIN_D7 _BV(7)
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#define DIRECTION_REGISTER_AT_PortD DDRD
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#define OUTPUT_REGISTER_AT_PortD PORTD
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#define INPUT_REGISTER_AT_PortD PIND
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#define PORT_AT_PIN_D0 PortD
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#define PORT_AT_PIN_D1 PortD
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#define PORT_AT_PIN_D2 PortD
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#define PORT_AT_PIN_D3 PortD
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#define PORT_AT_PIN_D4 PortD
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#define PORT_AT_PIN_D5 PortD
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#define PORT_AT_PIN_D6 PortD
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#define PORT_AT_PIN_D7 PortD
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#define MASK_AT_PIN_D0 _BV(0)
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#define MASK_AT_PIN_D1 _BV(1)
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#define MASK_AT_PIN_D2 _BV(2)
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#define MASK_AT_PIN_D3 _BV(3)
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#define MASK_AT_PIN_D4 _BV(4)
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#define MASK_AT_PIN_D5 _BV(5)
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#define MASK_AT_PIN_D6 _BV(6)
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#define MASK_AT_PIN_D7 _BV(7)
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#endif
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#ifdef PORTE
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#define DIRECTION_REGISTER_AT_PortE DDRE
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#define OUTPUT_REGISTER_AT_PortE PORTE
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#define INPUT_REGISTER_AT_PortE PINE
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#define PORT_AT_PIN_E0 PortE
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#define PORT_AT_PIN_E1 PortE
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#define PORT_AT_PIN_E2 PortE
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#define PORT_AT_PIN_E3 PortE
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#define PORT_AT_PIN_E4 PortE
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#define PORT_AT_PIN_E5 PortE
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#define PORT_AT_PIN_E6 PortE
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#define PORT_AT_PIN_E7 PortE
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#define MASK_AT_PIN_E0 _BV(0)
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#define MASK_AT_PIN_E1 _BV(1)
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#define MASK_AT_PIN_E2 _BV(2)
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#define MASK_AT_PIN_E3 _BV(3)
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#define MASK_AT_PIN_E4 _BV(4)
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#define MASK_AT_PIN_E5 _BV(5)
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#define MASK_AT_PIN_E6 _BV(6)
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#define MASK_AT_PIN_E7 _BV(7)
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#define DIRECTION_REGISTER_AT_PortE DDRE
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#define OUTPUT_REGISTER_AT_PortE PORTE
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#define INPUT_REGISTER_AT_PortE PINE
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#define PORT_AT_PIN_E0 PortE
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#define PORT_AT_PIN_E1 PortE
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#define PORT_AT_PIN_E2 PortE
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#define PORT_AT_PIN_E3 PortE
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#define PORT_AT_PIN_E4 PortE
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#define PORT_AT_PIN_E5 PortE
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#define PORT_AT_PIN_E6 PortE
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#define PORT_AT_PIN_E7 PortE
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#define MASK_AT_PIN_E0 _BV(0)
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#define MASK_AT_PIN_E1 _BV(1)
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#define MASK_AT_PIN_E2 _BV(2)
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#define MASK_AT_PIN_E3 _BV(3)
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#define MASK_AT_PIN_E4 _BV(4)
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#define MASK_AT_PIN_E5 _BV(5)
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#define MASK_AT_PIN_E6 _BV(6)
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#define MASK_AT_PIN_E7 _BV(7)
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#endif
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|
||||
#ifdef PORTF
|
||||
#define DIRECTION_REGISTER_AT_PortF DDRF
|
||||
#define OUTPUT_REGISTER_AT_PortF PORTF
|
||||
#define INPUT_REGISTER_AT_PortF PINF
|
||||
#define PORT_AT_PIN_F0 PortF
|
||||
#define PORT_AT_PIN_F1 PortF
|
||||
#define PORT_AT_PIN_F2 PortF
|
||||
#define PORT_AT_PIN_F3 PortF
|
||||
#define PORT_AT_PIN_F4 PortF
|
||||
#define PORT_AT_PIN_F5 PortF
|
||||
#define PORT_AT_PIN_F6 PortF
|
||||
#define PORT_AT_PIN_F7 PortF
|
||||
#define MASK_AT_PIN_F0 _BV(0)
|
||||
#define MASK_AT_PIN_F1 _BV(1)
|
||||
#define MASK_AT_PIN_F2 _BV(2)
|
||||
#define MASK_AT_PIN_F3 _BV(3)
|
||||
#define MASK_AT_PIN_F4 _BV(4)
|
||||
#define MASK_AT_PIN_F5 _BV(5)
|
||||
#define MASK_AT_PIN_F6 _BV(6)
|
||||
#define MASK_AT_PIN_F7 _BV(7)
|
||||
#define DIRECTION_REGISTER_AT_PortF DDRF
|
||||
#define OUTPUT_REGISTER_AT_PortF PORTF
|
||||
#define INPUT_REGISTER_AT_PortF PINF
|
||||
|
||||
#define PORT_AT_PIN_F0 PortF
|
||||
#define PORT_AT_PIN_F1 PortF
|
||||
#define PORT_AT_PIN_F2 PortF
|
||||
#define PORT_AT_PIN_F3 PortF
|
||||
#define PORT_AT_PIN_F4 PortF
|
||||
#define PORT_AT_PIN_F5 PortF
|
||||
#define PORT_AT_PIN_F6 PortF
|
||||
#define PORT_AT_PIN_F7 PortF
|
||||
|
||||
#define MASK_AT_PIN_F0 _BV(0)
|
||||
#define MASK_AT_PIN_F1 _BV(1)
|
||||
#define MASK_AT_PIN_F2 _BV(2)
|
||||
#define MASK_AT_PIN_F3 _BV(3)
|
||||
#define MASK_AT_PIN_F4 _BV(4)
|
||||
#define MASK_AT_PIN_F5 _BV(5)
|
||||
#define MASK_AT_PIN_F6 _BV(6)
|
||||
#define MASK_AT_PIN_F7 _BV(7)
|
||||
#endif
|
||||
|
||||
#define MERGE_TO_FUNC(prefix, id) prefix##_##id
|
||||
#define EXPAND_WRAPPER(NEXTLEVEL, ...) NEXTLEVEL(__VA_ARGS__)
|
||||
|
||||
#define _SET_OUTPUT(port_id, msk) PORT_TO_DIRECTION_REGISTER(port_id) |= (msk)
|
||||
#define _SET_OUTPUT(port_id, msk) PORT_TO_DIRECTION_REGISTER(port_id) |= (msk)
|
||||
#define _SET_INPUT(port_id, msk) PORT_TO_DIRECTION_REGISTER(port_id) &= ~(msk)
|
||||
|
||||
#define _DIGITAL_WRITE_HIGH(port_id, msk) PORT_TO_OUTPUT_REGISTER(port_id) |= (msk)
|
||||
#define _DIGITAL_WRITE_LOW(port_id, msk) PORT_TO_OUTPUT_REGISTER(port_id) &= ~(msk)
|
||||
|
||||
#define _DIGITAL_READ_RAW(port_id, msk) ((PORT_TO_INPUT_REGISTER(port_id)) & (msk))
|
||||
#define _DIGITAL_READ(port_id, msk) (((PORT_TO_INPUT_REGISTER(port_id)) & (msk)) != 0 ? 1 : 0)
|
||||
#define _DIGITAL_READ_RAW(port_id, msk) ((PORT_TO_INPUT_REGISTER(port_id)) & (msk))
|
||||
#define _DIGITAL_READ(port_id, msk) (((PORT_TO_INPUT_REGISTER(port_id)) & (msk)) != 0 ? 1 : 0)
|
||||
|
||||
#define _DIGITAL_TOGGLE(port_id, msk) PORT_TO_OUTPUT_REGISTER(port_id) ^= (msk)
|
||||
#define _DIGITAL_TOGGLE(port_id, msk) PORT_TO_OUTPUT_REGISTER(port_id) ^= (msk)
|
||||
|
||||
#define SET_1(pin) SET_OUTPUT(pin)
|
||||
#define SET_0(pin) SET_INPUT(pin)
|
||||
#define SET_1(pin) SET_OUTPUT(pin)
|
||||
#define SET_0(pin) SET_INPUT(pin)
|
||||
|
||||
#define SET_0x1(pin) SET_OUTPUT(pin)
|
||||
#define SET_0x0(pin) SET_INPUT(pin)
|
||||
#define SET_0x1(pin) SET_OUTPUT(pin)
|
||||
#define SET_0x0(pin) SET_INPUT(pin)
|
||||
|
||||
#define DIGITAL_WRITE_HIGH(pin) EXPAND_WRAPPER(_DIGITAL_WRITE_HIGH, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
|
||||
#define DIGITAL_WRITE_LOW(pin) EXPAND_WRAPPER(_DIGITAL_WRITE_LOW, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
|
||||
#define DIGITAL_WRITE_HIGH(pin) EXPAND_WRAPPER(_DIGITAL_WRITE_HIGH, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
|
||||
#define DIGITAL_WRITE_LOW(pin) EXPAND_WRAPPER(_DIGITAL_WRITE_LOW, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
|
||||
|
||||
#define DIGITAL_WRITE_1(pin) DIGITAL_WRITE_HIGH(pin)
|
||||
#define DIGITAL_WRITE_0(pin) DIGITAL_WRITE_LOW(pin)
|
||||
#define DIGITAL_WRITE_1(pin) DIGITAL_WRITE_HIGH(pin)
|
||||
#define DIGITAL_WRITE_0(pin) DIGITAL_WRITE_LOW(pin)
|
||||
|
||||
#define DIGITAL_WRITE_0x1(pin) DIGITAL_WRITE_HIGH(pin)
|
||||
#define DIGITAL_WRITE_0x0(pin) DIGITAL_WRITE_LOW(pin)
|
||||
#define DIGITAL_WRITE_0x1(pin) DIGITAL_WRITE_HIGH(pin)
|
||||
#define DIGITAL_WRITE_0x0(pin) DIGITAL_WRITE_LOW(pin)
|
||||
|
||||
#define DIGITAL_WRITE_ENABLE(pin) DIGITAL_WRITE_HIGH(pin)
|
||||
#define DIGITAL_WRITE_DISABLE(pin) DIGITAL_WRITE_LOW(pin)
|
||||
#define DIGITAL_WRITE_ENABLE(pin) DIGITAL_WRITE_HIGH(pin)
|
||||
#define DIGITAL_WRITE_DISABLE(pin) DIGITAL_WRITE_LOW(pin)
|
||||
|
||||
#define SET_OUTPUT(pin) EXPAND_WRAPPER(_SET_OUTPUT, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
|
||||
#define SET_INPUT(pin) EXPAND_WRAPPER(_SET_INPUT, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
|
||||
#define SET_OUTPUT(pin) EXPAND_WRAPPER(_SET_OUTPUT, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
|
||||
#define SET_INPUT(pin) EXPAND_WRAPPER(_SET_INPUT, PIN_TO_PORT(pin), PIN_TO_MASK(pin))
|
||||
|
||||
#define pin_mode(pin, mode) SET_##mode(pin)
|
||||
#define pin_pullup(pin, val) DIGITAL_WRITE_##val(pin)
|
||||
#define pin_mode(pin, mode) SET_##mode(pin)
|
||||
#define pin_pullup(pin, val) DIGITAL_WRITE_##val(pin)
|
||||
|
||||
#endif /* PINS_H */
|
||||
|
|
|
|||
|
|
@ -18,57 +18,73 @@
|
|||
#endif
|
||||
#include <util/setbaud.h>
|
||||
|
||||
#if defined (UBRR0H)
|
||||
|
||||
#warning UART0
|
||||
#define UBRRxH UBRR0H
|
||||
#define UBRRxL UBRR0L
|
||||
#define UCSRxA UCSR0A
|
||||
#define U2Xx U2X0
|
||||
#define UCSRxC UCSR0C
|
||||
#define UCSZx1 UCSZ01
|
||||
#define UCSZx0 UCSZ00
|
||||
#define UCSRxB UCSR0B
|
||||
#define RXENx RXEN0
|
||||
#define TXENx TXEN0
|
||||
#define UDREx UDRE0
|
||||
#define RXCx RXC0
|
||||
#define UDRx UDR0
|
||||
#define UDRIEx UDRIE0
|
||||
|
||||
#elif defined (UBRR1H)
|
||||
|
||||
#warning UART1
|
||||
#define UBRRxH UBRR1H
|
||||
#define UBRRxL UBRR1L
|
||||
#define UCSRxA UCSR1A
|
||||
#define U2Xx U2X1
|
||||
#define UCSRxC UCSR1C
|
||||
#define UCSZx1 UCSZ11
|
||||
#define UCSZx0 UCSZ10
|
||||
#define UCSRxB UCSR1B
|
||||
#define RXENx RXEN1
|
||||
#define TXENx TXEN1
|
||||
#define UDREx UDRE1
|
||||
#define RXCx RXC1
|
||||
#define UDRx UDR1
|
||||
#define UDRIEx UDRIE1
|
||||
|
||||
#else
|
||||
#error No UART?
|
||||
#endif
|
||||
|
||||
/* http://www.cs.mun.ca/~rod/Winter2007/4723/notes/serial/serial.html */
|
||||
|
||||
#if defined (__AVR_ATmega32U4__)
|
||||
void uart_init(void) {
|
||||
UBRR1H = UBRRH_VALUE;
|
||||
UBRR1L = UBRRL_VALUE;
|
||||
UBRRxH = UBRRH_VALUE;
|
||||
UBRRxL = UBRRL_VALUE;
|
||||
|
||||
#if USE_2X
|
||||
UCSR1A |= _BV(U2X1);
|
||||
UCSRxA |= _BV(U2Xx);
|
||||
#else
|
||||
UCSR1A &= ~(_BV(U2X1));
|
||||
UCSRxA &= ~(_BV(U2Xx));
|
||||
#endif
|
||||
|
||||
UCSR1C = _BV(UCSZ11) | _BV(UCSZ10); /* 8-bit data */
|
||||
UCSR1B = _BV(RXEN1) | _BV(TXEN1); /* Enable RX and TX */
|
||||
UCSRxC = _BV(UCSZx1) | _BV(UCSZx0); /* 8-bit data */
|
||||
UCSRxB = _BV(RXENx) | _BV(TXENx); /* Enable RX and TX */
|
||||
}
|
||||
#else
|
||||
void uart_init(void) {
|
||||
UBRR0H = UBRRH_VALUE;
|
||||
UBRR0L = UBRRL_VALUE;
|
||||
|
||||
#if USE_2X
|
||||
UCSR0A |= _BV(U2X0);
|
||||
#else
|
||||
UCSR0A &= ~(_BV(U2X0));
|
||||
#endif
|
||||
|
||||
UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); /* 8-bit data */
|
||||
UCSR0B = _BV(RXEN0) | _BV(TXEN0); /* Enable RX and TX */
|
||||
}
|
||||
#endif
|
||||
|
||||
void uart_putchar(char c, FILE *stream) {
|
||||
int uart_putchar(char c, FILE *stream) {
|
||||
if (c == '\n') {
|
||||
uart_putchar('\r', stream);
|
||||
}
|
||||
#if defined (__AVR_ATmega32U4__)
|
||||
loop_until_bit_is_set(UCSR1A, UDRE1);
|
||||
UDR1 = c;
|
||||
#else
|
||||
loop_until_bit_is_set(UCSR0A, UDRE0);
|
||||
UDR0 = c;
|
||||
#endif
|
||||
loop_until_bit_is_set(UCSRxA, UDREx);
|
||||
UDRx = c;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
char uart_getchar(FILE *stream) {
|
||||
#if defined (__AVR_ATmega32U4__)
|
||||
loop_until_bit_is_set(UCSR1A, RXC1);
|
||||
return UDR1;
|
||||
#else
|
||||
loop_until_bit_is_set(UCSR0A, RXC0);
|
||||
return UDR0;
|
||||
#endif
|
||||
int uart_getchar(FILE *stream) {
|
||||
loop_until_bit_is_set(UCSRxA, RXCx);
|
||||
return UDRx;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -5,9 +5,12 @@
|
|||
* http://www.opensource.org/licenses/mit-license.php
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef UART_H
|
||||
#define UART_H
|
||||
|
||||
void uart_putchar(char c, FILE *stream);
|
||||
char uart_getchar(FILE *stream);
|
||||
int uart_putchar(char c, FILE *stream);
|
||||
int uart_getchar(FILE *stream);
|
||||
|
||||
void uart_init(void);
|
||||
|
||||
|
|
@ -15,3 +18,6 @@ void uart_init(void);
|
|||
|
||||
FILE uart_output = FDEV_SETUP_STREAM(uart_putchar, NULL, _FDEV_SETUP_WRITE);
|
||||
FILE uart_input = FDEV_SETUP_STREAM(NULL, uart_getchar, _FDEV_SETUP_READ);
|
||||
|
||||
#endif /* UART_H */
|
||||
|
||||
|
|
|
|||
|
|
@ -25,6 +25,51 @@
|
|||
#define UART_TX_BUFFER_SIZE 64
|
||||
#endif
|
||||
|
||||
#if defined (UBRR0H)
|
||||
|
||||
#warning Using UART0
|
||||
#define UBRRxH UBRR0H
|
||||
#define UBRRxL UBRR0L
|
||||
#define UCSRxA UCSR0A
|
||||
#define U2Xx U2X0
|
||||
#define UCSRxC UCSR0C
|
||||
#define UCSZx1 UCSZ01
|
||||
#define UCSZx0 UCSZ00
|
||||
#define UCSRxB UCSR0B
|
||||
#define RXENx RXEN0
|
||||
#define TXENx TXEN0
|
||||
#define UDREx UDRE0
|
||||
#define RXCx RXC0
|
||||
#define UDRx UDR0
|
||||
#define UDRIEx UDRIE0
|
||||
|
||||
#define USARTx_RX_vect USART_RX_vect
|
||||
#define USARTx_UDRE_vect USART_UDRE_vect
|
||||
#elif defined (UBRR1H)
|
||||
|
||||
#warning Using UART1
|
||||
#define UBRRxH UBRR1H
|
||||
#define UBRRxL UBRR1L
|
||||
#define UCSRxA UCSR1A
|
||||
#define U2Xx U2X1
|
||||
#define UCSRxC UCSR1C
|
||||
#define UCSZx1 UCSZ11
|
||||
#define UCSZx0 UCSZ10
|
||||
#define UCSRxB UCSR1B
|
||||
#define RXENx RXEN1
|
||||
#define TXENx TXEN1
|
||||
#define UDREx UDRE1
|
||||
#define RXCx RXC1
|
||||
#define UDRx UDR1
|
||||
#define UDRIEx UDRIE1
|
||||
|
||||
#define USARTx_RX_vect USART1_RX_vect
|
||||
#define USARTx_UDRE_vect USART1_UDRE_vect
|
||||
|
||||
#else
|
||||
#error No UART?
|
||||
#endif
|
||||
|
||||
struct tx_ring {
|
||||
int buffer[UART_TX_BUFFER_SIZE];
|
||||
int start;
|
||||
|
|
@ -50,18 +95,16 @@ void uart_init(void) {
|
|||
rx_buffer.start = 0;
|
||||
rx_buffer.end = 0;
|
||||
|
||||
UBRR0H = UBRRH_VALUE;
|
||||
UBRR0L = UBRRL_VALUE;
|
||||
UBRRxH = UBRRH_VALUE;
|
||||
UBRRxL = UBRRL_VALUE;
|
||||
|
||||
UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); /* 8-bit data */
|
||||
UCSR0B = _BV(RXEN0) | _BV(TXEN0); /* Enable RX and TX */
|
||||
UCSRxC = _BV(UCSZx1) | _BV(UCSZx0); /* 8-bit data */
|
||||
UCSRxB = _BV(RXENx) | _BV(TXENx); /* Enable RX and TX */
|
||||
|
||||
sei();
|
||||
}
|
||||
|
||||
|
||||
//int uart_putchar(char c, FILE *stream) {
|
||||
void uart_putchar(char c, FILE *stream) {
|
||||
int uart_putchar(char c, FILE *stream) {
|
||||
if (c == '\n') {
|
||||
uart_putchar('\r', stream);
|
||||
}
|
||||
|
|
@ -73,39 +116,39 @@ void uart_putchar(char c, FILE *stream) {
|
|||
tx_buffer.end = write_pointer;
|
||||
|
||||
/* Data available. Enable the transmit interrupt for serial port 0. */
|
||||
UCSR0B |= _BV(UDRIE0);
|
||||
UCSRxB |= _BV(UDRIEx);
|
||||
}
|
||||
|
||||
//return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
char uart_getchar(FILE *stream) {
|
||||
int uart_getchar(FILE *stream) {
|
||||
int read_pointer = (rx_buffer.start + 1) % UART_RX_BUFFER_SIZE;
|
||||
|
||||
rx_buffer.start = read_pointer;
|
||||
return rx_buffer.buffer[read_pointer];
|
||||
}
|
||||
|
||||
ISR(USART_RX_vect) {
|
||||
ISR(USARTx_RX_vect) {
|
||||
int write_pointer = (rx_buffer.end + 1) % UART_RX_BUFFER_SIZE;
|
||||
|
||||
/* Add next byte to ringbuffer if it has space available. */
|
||||
if (write_pointer != rx_buffer.start){
|
||||
rx_buffer.buffer[rx_buffer.end] = UDR0;
|
||||
rx_buffer.buffer[rx_buffer.end] = UDRx;
|
||||
rx_buffer.end = write_pointer;
|
||||
}
|
||||
}
|
||||
|
||||
ISR(USART_UDRE_vect){
|
||||
ISR(USARTx_UDRE_vect){
|
||||
int read_pointer = (tx_buffer.start + 1) % UART_TX_BUFFER_SIZE;
|
||||
|
||||
/* Transmit next byte if data available in ringbuffer. */
|
||||
if (read_pointer != tx_buffer.end) {
|
||||
UDR0 = tx_buffer.buffer[read_pointer];
|
||||
UDRx = tx_buffer.buffer[read_pointer];
|
||||
tx_buffer.start = read_pointer;
|
||||
} else {
|
||||
/* Nothing to send. Disable the transmit interrupt for serial port 0. */
|
||||
UCSR0B &= ~_BV(UDRIE0);
|
||||
/* Nothing to send. Disable the transmit interrupt for serial port x. */
|
||||
UCSRxB &= ~_BV(UDRIEx);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue