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mirror of synced 2024-11-24 02:04:24 +01:00

Code for two daisychained shift registers.

This commit is contained in:
Mika Tuupola 2011-11-20 18:53:38 +02:00
parent e270477397
commit 2eb4976f3d
14 changed files with 3590 additions and 9 deletions

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main.o: main.c \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdlib.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/include/stddef.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdio.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/inttypes.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/include/stdint.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdint.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/include/stdarg.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h \
main.h uart.h pins.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/sfr_defs.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/io.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/iom328p.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/portpins.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/common.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/version.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/fuse.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/lock.h \
digital.h
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdlib.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/include/stddef.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdio.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/inttypes.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/include/stdint.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdint.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/include/stdarg.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h:
main.h:
uart.h:
pins.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/sfr_defs.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/io.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/iom328p.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/portpins.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/common.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/version.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/fuse.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/lock.h:
digital.h:

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uart_async.o: uart_async.c \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/io.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/sfr_defs.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/inttypes.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/include/stdint.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdint.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/iom328p.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/portpins.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/common.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/version.h \
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/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/lock.h \
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/interrupt.h \
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/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/setbaud.h
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/io.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/sfr_defs.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/inttypes.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/include/stdint.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdint.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/iom328p.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/portpins.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/common.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/version.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/fuse.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/lock.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/avr/interrupt.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdio.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/include/stdarg.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/include/stddef.h:
/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/setbaud.h:

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/*
* Code to write data to TPIC6B595 SIPO shift register.
* Code to write data to two daisychained TPIC6B595 SIPO shift registers.
*
* The TPIC6B595 is a monolithic, high-voltage, medium-current power 8-bit
* shift register designed for use in systems that require relatively high
@ -39,9 +39,9 @@
#include "pins.h"
#include "digital.h"
#define LATCH 8 /* RCK */
#define CLOCK 12 /* SRCK */
#define LATCH 10 /* RCK */
#define DATA 11 /* SER IN */
#define CLOCK 13 /* SRCK */
static void init(void) {
pin_mode(LATCH, OUTPUT);
@ -72,24 +72,32 @@ int main(void) {
stdout = &uart_output;
stdin = &uart_input;
uint8_t binary[9];
char binary[17];
/* Show pattern for 5 seconds. */
shift_out(0b10101010);
shift_out(0b11110000);
digital_write(LATCH, LOW);
digital_write(LATCH, HIGH);
_delay_ms(5000);
while (1) {
for(uint8_t i = 0; i < 256; i++) {
for(uint16_t i = 0; i < 0xffff; i++) {
/* Print the number to serial for debugging. */
itoa(i, binary, 2);
printf("%s %d \n", binary, i);
/* Shift current number to shift register. */
shift_out(i);
/* Shift high byte first to shift register. */
shift_out(i >> 8);
shift_out(i & 0xff);
/* Pulse latch to transfer data from shift registers */
/* to storage registers (should this be inside shift_out()?). */
digital_write(LATCH, LOW);
digital_write(LATCH, HIGH);
_delay_ms(250);
_delay_ms(50);
}
}
return 0;

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:00000001FF

BIN
tpic6b595_shiftout/main.elf Executable file

Binary file not shown.

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static void init(void);
int shiftin(void);
void shift_out(uint8_t data);
int main(void);

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1 .file "main.c"
2 __SREG__ = 0x3f
3 __SP_H__ = 0x3e
4 __SP_L__ = 0x3d
5 __tmp_reg__ = 0
6 __zero_reg__ = 1
7 .global __do_copy_data
8 .global __do_clear_bss
9 .text
10 .Ltext0:
11 .global shift_out
13 shift_out:
14 .LFB6:
15 .file 1 "main.c"
1:main.c **** /*
2:main.c **** * Code to write data to TPIC6B595 SIPO shift register.
3:main.c **** *
4:main.c **** * The TPIC6B595 is a monolithic, high-voltage, medium-current power 8-bit
5:main.c **** * shift register designed for use in systems that require relatively high
6:main.c **** * load power.
7:main.c **** *
8:main.c **** * This device contains an 8-bit serial-in, parallel-out shift register that
9:main.c **** * feeds an 8-bit D-type storage register. Data transfers through both the
10:main.c **** * shift and storage registers on the rising edge of the shift-register clock
11:main.c **** * (SRCK) and the register clock (RCK), respectively. The storage register
12:main.c **** * transfers data to the output buffer when shift-register clear (SRCLR) is
13:main.c **** * high. When SRCLR is low, the input shift register is cleared. When output
14:main.c **** * enable (G) is held high, all data in the output buffers is held low and all
15:main.c **** * drain outputs are off. When G is held low, data from the storage register
16:main.c **** * is transparent to the output buffers. When data in the output buffers is
17:main.c **** * low, the DMOS-transistor outputs are off. When data is high, the DMOS-
18:main.c **** * transistor outputs have sink-current capability. The serial output (SER
19:main.c **** * OUT) allows for cascading of the data from the shift register to additional
20:main.c **** * devices.
21:main.c **** *
22:main.c **** * http://www.adafruit.com/datasheets/tpic6b595.pdf
23:main.c **** *
24:main.c **** * To compile and upload run: make clean; make; make program;
25:main.c **** *
26:main.c **** * Copyright 2011 Mika Tuupola
27:main.c **** *
28:main.c **** * Licensed under the MIT license:
29:main.c **** * http://www.opensource.org/licenses/mit-license.php
30:main.c **** *
31:main.c **** */
32:main.c ****
33:main.c **** #include <stdlib.h>
34:main.c **** #include <stdio.h>
35:main.c **** #include <util/delay.h>
36:main.c ****
37:main.c **** #include "main.h"
38:main.c **** #include "uart.h"
39:main.c **** #include "pins.h"
40:main.c **** #include "digital.h"
41:main.c ****
42:main.c **** #define LATCH 10 /* RCK */
43:main.c **** #define DATA 11 /* SER IN */
44:main.c **** #define CLOCK 13 /* SRCK */
45:main.c ****
46:main.c **** static void init(void) {
47:main.c **** pin_mode(LATCH, OUTPUT);
48:main.c **** pin_mode(CLOCK, OUTPUT);
49:main.c **** pin_mode(DATA, OUTPUT);
50:main.c **** }
51:main.c ****
52:main.c **** /* Assumes MSB first. */
53:main.c **** void shift_out(uint8_t data) {
16 .loc 1 53 0
17 .LVL0:
18 /* prologue: function */
19 /* frame size = 0 */
20 /* stack size = 0 */
21 .L__stack_usage = 0
22 .loc 1 53 0
23 0000 27E0 ldi r18,lo8(7)
24 0002 30E0 ldi r19,hi8(7)
25 .LBB21:
54:main.c **** for(uint8_t i = 0; i < 8; i++) {
55:main.c **** /* Write bit to data port. */
56:main.c **** if (0 == (data & _BV(7 - i))) {
26 .loc 1 56 0
27 0004 90E0 ldi r25,lo8(0)
28 .LVL1:
29 .L4:
30 0006 AC01 movw r20,r24
31 0008 022E mov r0,r18
32 000a 00C0 rjmp 2f
33 000c 5595 1: asr r21
34 000e 4795 ror r20
35 0010 0A94 2: dec r0
36 0012 02F4 brpl 1b
37 0014 40FD sbrc r20,0
38 0016 00C0 rjmp .L2
57:main.c **** digital_write(DATA, LOW);
39 .loc 1 57 0
40 0018 2B98 cbi 37-0x20,3
41 001a 00C0 rjmp .L3
42 .L2:
58:main.c **** } else {
59:main.c **** digital_write(DATA, HIGH);
43 .loc 1 59 0
44 001c 2B9A sbi 37-0x20,3
45 .L3:
60:main.c **** }
61:main.c ****
62:main.c **** /* Pulse clock input to write next bit. */
63:main.c **** digital_write(CLOCK, LOW);
46 .loc 1 63 0
47 001e 2D98 cbi 37-0x20,5
64:main.c **** digital_write(CLOCK, HIGH);
48 .loc 1 64 0
49 0020 2D9A sbi 37-0x20,5
50 0022 2150 subi r18,lo8(-(-1))
51 0024 3040 sbci r19,hi8(-(-1))
54:main.c **** for(uint8_t i = 0; i < 8; i++) {
52 .loc 1 54 0
53 0026 4FEF ldi r20,hi8(-1)
54 0028 2F3F cpi r18,lo8(-1)
55 002a 3407 cpc r19,r20
56 002c 01F4 brne .L4
57 /* epilogue start */
58 .LBE21:
65:main.c **** }
66:main.c **** }
59 .loc 1 66 0
60 002e 0895 ret
61 .LFE6:
63 .data
64 .LC0:
65 0000 2573 2025 .string "%s %d \n"
65 6420 0A00
66 .section .text.startup,"ax",@progbits
67 .global main
69 main:
70 .LFB7:
67:main.c ****
68:main.c **** int main(void) {
71 .loc 1 68 0
72 0000 CF93 push r28
73 .LCFI0:
74 0002 DF93 push r29
75 .LCFI1:
76 0004 CDB7 in r28,__SP_L__
77 0006 DEB7 in r29,__SP_H__
78 0008 6197 sbiw r28,17
79 .LCFI2:
80 000a 0FB6 in __tmp_reg__,__SREG__
81 000c F894 cli
82 000e DEBF out __SP_H__,r29
83 0010 0FBE out __SREG__,__tmp_reg__
84 0012 CDBF out __SP_L__,r28
85 /* prologue: function */
86 /* frame size = 17 */
87 /* stack size = 19 */
88 .L__stack_usage = 19
89 .LBB22:
90 .LBB23:
47:main.c **** pin_mode(LATCH, OUTPUT);
91 .loc 1 47 0
92 0014 229A sbi 36-0x20,2
48:main.c **** pin_mode(CLOCK, OUTPUT);
93 .loc 1 48 0
94 0016 259A sbi 36-0x20,5
49:main.c **** pin_mode(DATA, OUTPUT);
95 .loc 1 49 0
96 0018 239A sbi 36-0x20,3
97 .LBE23:
98 .LBE22:
69:main.c ****
70:main.c **** init();
71:main.c **** uart_init();
99 .loc 1 71 0
100 001a 0E94 0000 call uart_init
72:main.c **** stdout = &uart_output;
101 .loc 1 72 0
102 001e 80E0 ldi r24,lo8(uart_output)
103 0020 90E0 ldi r25,hi8(uart_output)
104 0022 9093 0000 sts __iob+2+1,r25
105 0026 8093 0000 sts __iob+2,r24
73:main.c **** stdin = &uart_input;
106 .loc 1 73 0
107 002a 80E0 ldi r24,lo8(uart_input)
108 002c 90E0 ldi r25,hi8(uart_input)
109 002e 9093 0000 sts __iob+1,r25
110 0032 8093 0000 sts __iob,r24
74:main.c ****
75:main.c **** char binary[17];
76:main.c ****
77:main.c **** /* Show pattern for 5 seconds. */
78:main.c **** shift_out(0b10101010);
111 .loc 1 78 0
112 0036 8AEA ldi r24,lo8(-86)
113 0038 0E94 0000 call shift_out
79:main.c **** shift_out(0b11110000);
114 .loc 1 79 0
115 003c 80EF ldi r24,lo8(-16)
116 003e 0E94 0000 call shift_out
80:main.c **** digital_write(LATCH, LOW);
117 .loc 1 80 0
118 0042 2A98 cbi 37-0x20,2
81:main.c **** digital_write(LATCH, HIGH);
119 .loc 1 81 0
120 0044 2A9A sbi 37-0x20,2
121 .LVL2:
122 0046 80E5 ldi r24,lo8(-15536)
123 0048 93EC ldi r25,hi8(-15536)
124 .LBB24:
125 .LBB25:
126 .LBB26:
127 .LBB27:
128 .file 2 "/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basi
1:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** /* Copyright (c) 2002, Marek Michalkiewicz
2:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** Copyright (c) 2007 Joerg Wunsch
3:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** All rights reserved.
4:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
5:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** Redistribution and use in source and binary forms, with or without
6:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** modification, are permitted provided that the following conditions are met:
7:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
8:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** * Redistributions of source code must retain the above copyright
9:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** notice, this list of conditions and the following disclaimer.
10:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
11:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** * Redistributions in binary form must reproduce the above copyright
12:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** notice, this list of conditions and the following disclaimer in
13:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** the documentation and/or other materials provided with the
14:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** distribution.
15:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
16:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** * Neither the name of the copyright holders nor the names of
17:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** contributors may be used to endorse or promote products derived
18:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** from this software without specific prior written permission.
19:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
20:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** POSSIBILITY OF SUCH DAMAGE. */
31:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
32:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** /* $Id: delay_basic.h 2143 2010-06-08 21:19:51Z joerg_wunsch $ */
33:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
34:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** #ifndef _UTIL_DELAY_BASIC_H_
35:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** #define _UTIL_DELAY_BASIC_H_ 1
36:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
37:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** #include <inttypes.h>
38:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
39:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** #if !defined(__DOXYGEN__)
40:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** static inline void _delay_loop_1(uint8_t __count) __attribute__((always_inline));
41:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** static inline void _delay_loop_2(uint16_t __count) __attribute__((always_inline));
42:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** #endif
43:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
44:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** /** \file */
45:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** /** \defgroup util_delay_basic <util/delay_basic.h>: Basic busy-wait delay loops
46:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** \code
47:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** #include <util/delay_basic.h>
48:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** \endcode
49:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
50:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** The functions in this header file implement simple delay loops
51:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** that perform a busy-waiting. They are typically used to
52:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** facilitate short delays in the program execution. They are
53:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** implemented as count-down loops with a well-known CPU cycle
54:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** count per loop iteration. As such, no other processing can
55:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** occur simultaneously. It should be kept in mind that the
56:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** functions described here do not disable interrupts.
57:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
58:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** In general, for long delays, the use of hardware timers is
59:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** much preferrable, as they free the CPU, and allow for
60:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** concurrent processing of other events while the timer is
61:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** running. However, in particular for very short delays, the
62:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** overhead of setting up a hardware timer is too much compared
63:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** to the overall delay time.
64:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
65:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** Two inline functions are provided for the actual delay algorithms.
66:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
67:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** */
68:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
69:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** /** \ingroup util_delay_basic
70:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
71:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** Delay loop using an 8-bit counter \c __count, so up to 256
72:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** iterations are possible. (The value 256 would have to be passed
73:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** as 0.) The loop executes three CPU cycles per iteration, not
74:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** including the overhead the compiler needs to setup the counter
75:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** register.
76:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
77:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** Thus, at a CPU speed of 1 MHz, delays of up to 768 microseconds
78:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** can be achieved.
79:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** */
80:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** void
81:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** _delay_loop_1(uint8_t __count)
82:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** {
83:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** __asm__ volatile (
84:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** "1: dec %0" "\n\t"
85:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** "brne 1b"
86:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** : "=r" (__count)
87:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** : "0" (__count)
88:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** );
89:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** }
90:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
91:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** /** \ingroup util_delay_basic
92:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
93:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** Delay loop using a 16-bit counter \c __count, so up to 65536
94:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** iterations are possible. (The value 65536 would have to be
95:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** passed as 0.) The loop executes four CPU cycles per iteration,
96:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** not including the overhead the compiler requires to setup the
97:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** counter register pair.
98:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h ****
99:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** Thus, at a CPU speed of 1 MHz, delays of up to about 262.1
100:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** milliseconds can be achieved.
101:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** */
102:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** void
103:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** _delay_loop_2(uint16_t __count)
104:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** {
105:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic.h **** __asm__ volatile (
129 .loc 2 105 0
130 004a 20E9 ldi r18,lo8(400)
131 004c 31E0 ldi r19,hi8(400)
132 .LVL3:
133 .L7:
134 004e F901 movw r30,r18
135 /* #APP */
136 ; 105 "/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic
137 0050 3197 1: sbiw r30,1
138 0052 01F4 brne 1b
139 ; 0 "" 2
140 .LVL4:
141 /* #NOAPP */
142 0054 0197 sbiw r24,1
143 .LBE27:
144 .LBE26:
145 .file 3 "/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h"
1:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** /* Copyright (c) 2002, Marek Michalkiewicz
2:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** Copyright (c) 2004,2005,2007 Joerg Wunsch
3:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** Copyright (c) 2007 Florin-Viorel Petrov
4:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** All rights reserved.
5:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
6:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** Redistribution and use in source and binary forms, with or without
7:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** modification, are permitted provided that the following conditions are met:
8:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
9:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** * Redistributions of source code must retain the above copyright
10:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** notice, this list of conditions and the following disclaimer.
11:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
12:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** * Redistributions in binary form must reproduce the above copyright
13:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** notice, this list of conditions and the following disclaimer in
14:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** the documentation and/or other materials provided with the
15:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** distribution.
16:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
17:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** * Neither the name of the copyright holders nor the names of
18:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** contributors may be used to endorse or promote products derived
19:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** from this software without specific prior written permission.
20:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
21:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** POSSIBILITY OF SUCH DAMAGE. */
32:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
33:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** /* $Id: delay.h.in 2189 2010-10-13 09:39:34Z aboyapati $ */
34:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
35:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #ifndef _UTIL_DELAY_H_
36:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #define _UTIL_DELAY_H_ 1
37:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
38:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #ifndef __HAS_DELAY_CYCLES
39:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #define __HAS_DELAY_CYCLES 0
40:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #endif
41:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
42:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #include <inttypes.h>
43:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #include <util/delay_basic.h>
44:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
45:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** /** \file */
46:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** /** \defgroup util_delay <util/delay.h>: Convenience functions for busy-wait delay loops
47:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** \code
48:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #define F_CPU 1000000UL // 1 MHz
49:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** //#define F_CPU 14.7456E6
50:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #include <util/delay.h>
51:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** \endcode
52:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
53:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** \note As an alternative method, it is possible to pass the
54:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** F_CPU macro down to the compiler from the Makefile.
55:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** Obviously, in that case, no \c \#define statement should be
56:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** used.
57:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
58:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** The functions in this header file are wrappers around the basic
59:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** busy-wait functions from <util/delay_basic.h>. They are meant as
60:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** convenience functions where actual time values can be specified
61:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** rather than a number of cycles to wait for. The idea behind is
62:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** that compile-time constant expressions will be eliminated by
63:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** compiler optimization so floating-point expressions can be used
64:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** to calculate the number of delay cycles needed based on the CPU
65:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** frequency passed by the macro F_CPU.
66:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
67:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** \note In order for these functions to work as intended, compiler
68:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** optimizations <em>must</em> be enabled, and the delay time
69:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** <em>must</em> be an expression that is a known constant at
70:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** compile-time. If these requirements are not met, the resulting
71:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** delay will be much longer (and basically unpredictable), and
72:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** applications that otherwise do not use floating-point calculations
73:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** will experience severe code bloat by the floating-point library
74:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** routines linked into the application.
75:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
76:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** The functions available allow the specification of microsecond, and
77:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** millisecond delays directly, using the application-supplied macro
78:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** F_CPU as the CPU clock frequency (in Hertz).
79:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
80:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** */
81:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
82:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #if !defined(__DOXYGEN__)
83:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** static inline void _delay_us(double __us) __attribute__((always_inline));
84:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** static inline void _delay_ms(double __ms) __attribute__((always_inline));
85:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #endif
86:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
87:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #ifndef F_CPU
88:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** /* prevent compiler error by supplying a default */
89:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** # warning "F_CPU not defined for <util/delay.h>"
90:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** # define F_CPU 1000000UL
91:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #endif
92:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
93:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #ifndef __OPTIMIZE__
94:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** # warning "Compiler optimizations disabled; functions from <util/delay.h> won't work as designed"
95:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #endif
96:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
97:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** /**
98:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** \ingroup util_delay
99:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
100:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** Perform a delay of \c __ms milliseconds, using _delay_loop_2().
101:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
102:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** The macro F_CPU is supposed to be defined to a
103:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** constant defining the CPU clock frequency (in Hertz).
104:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
105:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** The maximal possible delay is 262.14 ms / F_CPU in MHz.
106:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
107:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** When the user request delay which exceed the maximum possible one,
108:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** _delay_ms() provides a decreased resolution functionality. In this
109:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** mode _delay_ms() will work with a resolution of 1/10 ms, providing
110:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** delays up to 6.5535 seconds (independent from CPU frequency). The
111:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** user will not be informed about decreased resolution.
112:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
113:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** If the avr-gcc toolchain has __builtin_avr_delay_cycles(unsigned long)
114:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** support, maximal possible delay is 4294967.295 ms/ F_CPU in MHz. For
115:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** values greater than the maximal possible delay, overflows results in
116:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** no delay i.e., 0ms.
117:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
118:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** Conversion of __us into clock cycles may not always result in integer.
119:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** By default, the clock cycles rounded up to next integer. This ensures that
120:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** the user gets atleast __us microseconds of delay.
121:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
122:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** Alternatively, user can define __DELAY_ROUND_DOWN__ and __DELAY_ROUND_CLOSEST__
123:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** to round down and round to closest integer.
124:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
125:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** Note: The new implementation of _delay_ms(double __ms) with
126:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** __builtin_avr_delay_cycles(unsigned long) support is not backward compatible.
127:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** User can define __DELAY_BACKWARD_COMPATIBLE__ to get a backward compatible delay
128:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** although this will be deprecated in future.
129:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
130:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** */
131:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** void
132:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** _delay_ms(double __ms)
133:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** {
134:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** uint16_t __ticks;
135:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** double __tmp ;
136:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #if __HAS_DELAY_CYCLES && defined(__OPTIMIZE__) && !defined(__DELAY_BACKWARD_COMPATIBLE__)
137:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** uint32_t __ticks_dc;
138:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** extern void __builtin_avr_delay_cycles(unsigned long);
139:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** __tmp = ((F_CPU) / 1e3) * __ms;
140:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
141:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #if defined(__DELAY_ROUND_DOWN__)
142:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** __ticks_dc = (uint32_t)fabs(__tmp);
143:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
144:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #elif defined(__DELAY_ROUND_CLOSEST__)
145:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** __ticks_dc = (uint32_t)(fabs(__tmp)+0.5);
146:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
147:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #else
148:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** //round up by default
149:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** __ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
150:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #endif
151:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
152:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** __builtin_avr_delay_cycles(__ticks_dc);
153:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h ****
154:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** #elif !__HAS_DELAY_CYCLES || (__HAS_DELAY_CYCLES && !defined(__OPTIMIZE__)) || defined (__DELAY_BAC
155:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** __tmp = ((F_CPU) / 4e3) * __ms;
156:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** if (__tmp < 1.0)
157:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** __ticks = 1;
158:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** else if (__tmp > 65535)
159:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** {
160:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** // __ticks = requested delay in 1/10 ms
161:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** __ticks = (uint16_t) (__ms * 10.0);
162:/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay.h **** while(__ticks)
146 .loc 3 162 0
147 0056 01F4 brne .L7
148 0058 00E0 ldi r16,lo8(0)
149 005a 10E0 ldi r17,hi8(0)
150 .LBE25:
151 .LBE24:
152 .LBB28:
82:main.c **** _delay_ms(5000);
83:main.c ****
84:main.c **** while (1) {
85:main.c **** for(uint16_t i = 0; i < 0xffff; i++) {
86:main.c ****
87:main.c **** /* Print the number to serial for debugging. */
88:main.c **** itoa(i, binary, 2);
153 .loc 1 88 0
154 005c 7E01 movw r14,r28
155 005e 0894 sec
156 0060 E11C adc r14,__zero_reg__
157 0062 F11C adc r15,__zero_reg__
89:main.c **** printf("%s %d \n", binary, i);
158 .loc 1 89 0
159 0064 80E0 ldi r24,lo8(.LC0)
160 0066 C82E mov r12,r24
161 0068 80E0 ldi r24,hi8(.LC0)
162 006a D82E mov r13,r24
163 .LBB29:
164 .LBB30:
165 .LBB31:
166 .LBB32:
167 .loc 2 105 0
168 006c 90E9 ldi r25,lo8(400)
169 006e A92E mov r10,r25
170 0070 91E0 ldi r25,hi8(400)
171 0072 B92E mov r11,r25
172 .L15:
173 .LBE32:
174 .LBE31:
175 .LBE30:
176 .LBE29:
88:main.c **** itoa(i, binary, 2);
177 .loc 1 88 0 discriminator 2
178 0074 C801 movw r24,r16
179 0076 B701 movw r22,r14
180 0078 42E0 ldi r20,lo8(2)
181 007a 50E0 ldi r21,hi8(2)
182 007c 0E94 0000 call itoa
183 .loc 1 89 0 discriminator 2
184 0080 00D0 rcall .
185 0082 00D0 rcall .
186 0084 00D0 rcall .
187 0086 EDB7 in r30,__SP_L__
188 0088 FEB7 in r31,__SP_H__
189 008a 3196 adiw r30,1
190 008c ADB7 in r26,__SP_L__
191 008e BEB7 in r27,__SP_H__
192 0090 1296 adiw r26,1+1
193 0092 DC92 st X,r13
194 0094 CE92 st -X,r12
195 0096 1197 sbiw r26,1
196 0098 F382 std Z+3,r15
197 009a E282 std Z+2,r14
198 009c 1583 std Z+5,r17
199 009e 0483 std Z+4,r16
200 .LCFI3:
201 00a0 0E94 0000 call printf
90:main.c ****
91:main.c **** /* Shift high byte first to shift register. */
92:main.c **** shift_out(i >> 8);
202 .loc 1 92 0 discriminator 2
203 00a4 8DB7 in r24,__SP_L__
204 00a6 9EB7 in r25,__SP_H__
205 00a8 0696 adiw r24,6
206 00aa 0FB6 in __tmp_reg__,__SREG__
207 00ac F894 cli
208 00ae 9EBF out __SP_H__,r25
209 00b0 0FBE out __SREG__,__tmp_reg__
210 00b2 8DBF out __SP_L__,r24
211 00b4 812F mov r24,r17
212 .LCFI4:
213 00b6 0E94 0000 call shift_out
93:main.c **** shift_out(i & 0xff);
214 .loc 1 93 0 discriminator 2
215 00ba 802F mov r24,r16
216 00bc 0E94 0000 call shift_out
94:main.c ****
95:main.c **** /* Pulse latch to transfer data from shift registers */
96:main.c **** /* to storage registers (should this be inside shift_out()?). */
97:main.c **** digital_write(LATCH, LOW);
217 .loc 1 97 0 discriminator 2
218 00c0 2A98 cbi 37-0x20,2
98:main.c **** digital_write(LATCH, HIGH);
219 .loc 1 98 0 discriminator 2
220 00c2 2A9A sbi 37-0x20,2
221 .LVL5:
222 00c4 24EF ldi r18,lo8(500)
223 00c6 31E0 ldi r19,hi8(500)
224 .LVL6:
225 .L9:
226 .LBB36:
227 .LBB35:
228 .LBB34:
229 .LBB33:
230 .loc 2 105 0
231 00c8 C501 movw r24,r10
232 /* #APP */
233 ; 105 "/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/util/delay_basic
234 00ca 0197 1: sbiw r24,1
235 00cc 01F4 brne 1b
236 ; 0 "" 2
237 .LVL7:
238 /* #NOAPP */
239 00ce 2150 subi r18,lo8(-(-1))
240 00d0 3040 sbci r19,hi8(-(-1))
241 .LBE33:
242 .LBE34:
243 .loc 3 162 0
244 00d2 01F4 brne .L9
245 .LBE35:
246 .LBE36:
85:main.c **** for(uint16_t i = 0; i < 0xffff; i++) {
247 .loc 1 85 0 discriminator 2
248 00d4 0F5F subi r16,lo8(-(1))
249 00d6 1F4F sbci r17,hi8(-(1))
250 .LVL8:
251 00d8 9FEF ldi r25,hi8(-1)
252 00da 0F3F cpi r16,lo8(-1)
253 00dc 1907 cpc r17,r25
254 00de 01F4 brne .L15
85:main.c **** for(uint16_t i = 0; i < 0xffff; i++) {
255 .loc 1 85 0 is_stmt 0
256 00e0 00E0 ldi r16,lo8(0)
257 00e2 10E0 ldi r17,hi8(0)
258 .LVL9:
259 00e4 00C0 rjmp .L15
260 .LBE28:
261 .LFE7:
263 .global uart_input
264 .data
267 uart_input:
268 0008 0000 00 .skip 3,0
269 000b 01 .byte 1
270 000c 0000 0000 .skip 4,0
271 0010 0000 .word 0
272 0012 0000 .word gs(uart_getchar)
273 0014 0000 .word 0
274 .global uart_output
277 uart_output:
278 0016 0000 00 .skip 3,0
279 0019 02 .byte 2
280 001a 0000 0000 .skip 4,0
281 001e 0000 .word gs(uart_putchar)
282 0020 0000 .word 0
283 0022 0000 .word 0
343 .Letext0:
344 .file 4 "/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdint.h"
345 .file 5 "/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdio.h"
346 .file 6 "uart.h"
DEFINED SYMBOLS
*ABS*:0000000000000000 main.c
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cclunMq8.s:2 *ABS*:000000000000003f __SREG__
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cclunMq8.s:3 *ABS*:000000000000003e __SP_H__
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cclunMq8.s:4 *ABS*:000000000000003d __SP_L__
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cclunMq8.s:5 *ABS*:0000000000000000 __tmp_reg__
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cclunMq8.s:6 *ABS*:0000000000000001 __zero_reg__
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cclunMq8.s:13 .text:0000000000000000 shift_out
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cclunMq8.s:69 .text.startup:0000000000000000 main
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cclunMq8.s:277 .data:0000000000000016 uart_output
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cclunMq8.s:267 .data:0000000000000008 uart_input
UNDEFINED SYMBOLS
__do_copy_data
__do_clear_bss
uart_init
__iob
itoa
printf
uart_getchar
uart_putchar

659
tpic6b595_shiftout/main.map Normal file
View File

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Allocating common symbols
Common symbol size file
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Memory Configuration
Name Origin Length Attributes
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*default* 0x0000000000000000 0xffffffffffffffff
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Cross Reference Table
Symbol File
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uart_async.o
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main.o
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main.o
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00000192 T __vector_18
00000212 T __vector_19
00000296 T main
0000037c T __divmodhi4
0000037c T _div
00000390 t __divmodhi4_neg2
00000396 t __divmodhi4_exit
00000398 t __divmodhi4_neg1
000003a2 T __udivmodhi4
000003aa t __udivmodhi4_loop
000003b8 t __udivmodhi4_ep
000003ca T itoa
0000040c T printf
00000436 T vfprintf
000007f6 T strnlen_P
0000080c T strnlen
00000822 T strrev
00000842 T fputc
0000089a T __ultoa_invert
000008ff W __stack
00000956 T __prologue_saves__
0000098e T __epilogue_restores__
000009c4 T _exit
000009c4 W exit
000009c6 t __stop_program
000009c8 A __data_load_start
000009c8 T _etext
000009ec A __data_load_end
00800100 D __data_start
00800108 D uart_input
00800116 D uart_output
00800124 B __bss_start
00800124 D __data_end
00800124 D _edata
00800124 b tx_buffer
00800528 b rx_buffer
0080056c B __iob
00800572 B __bss_end
00800572 N _end
00810000 N __eeprom_end

View File

@ -0,0 +1,449 @@
1 .file "uart_async.c"
2 __SREG__ = 0x3f
3 __SP_H__ = 0x3e
4 __SP_L__ = 0x3d
5 __tmp_reg__ = 0
6 __zero_reg__ = 1
7 .global __do_copy_data
8 .global __do_clear_bss
9 .text
10 .Ltext0:
11 .global uart_init
13 uart_init:
14 .LFB1:
15 .file 1 "uart_async.c"
1:uart_async.c **** /* Based on Atmel Application Note AVR 306 */
2:uart_async.c ****
3:uart_async.c **** #include <avr/io.h>
4:uart_async.c **** #include <avr/interrupt.h>
5:uart_async.c **** #include <stdio.h>
6:uart_async.c ****
7:uart_async.c **** #ifndef BAUD
8:uart_async.c **** #define BAUD 9600
9:uart_async.c **** #endif
10:uart_async.c **** #include <util/setbaud.h>
11:uart_async.c ****
12:uart_async.c **** #ifndef UART_RX_BUFFER_SIZE
13:uart_async.c **** #define UART_RX_BUFFER_SIZE 32
14:uart_async.c **** #endif
15:uart_async.c ****
16:uart_async.c **** #ifndef UART_TX_BUFFER_SIZE
17:uart_async.c **** #define UART_TX_BUFFER_SIZE 512
18:uart_async.c **** #endif
19:uart_async.c ****
20:uart_async.c **** struct tx_ring {
21:uart_async.c **** int buffer[UART_TX_BUFFER_SIZE];
22:uart_async.c **** int start;
23:uart_async.c **** int end;
24:uart_async.c **** };
25:uart_async.c ****
26:uart_async.c **** struct rx_ring {
27:uart_async.c **** int buffer[UART_RX_BUFFER_SIZE];
28:uart_async.c **** int start;
29:uart_async.c **** int end;
30:uart_async.c **** };
31:uart_async.c ****
32:uart_async.c **** static struct tx_ring tx_buffer;
33:uart_async.c **** static struct rx_ring rx_buffer;
34:uart_async.c ****
35:uart_async.c **** /* http://www.cs.mun.ca/~rod/Winter2007/4723/notes/serial/serial.html */
36:uart_async.c ****
37:uart_async.c **** void uart_init(void) {
16 .loc 1 37 0
17 /* prologue: function */
18 /* frame size = 0 */
19 /* stack size = 0 */
20 .L__stack_usage = 0
38:uart_async.c ****
39:uart_async.c **** tx_buffer.start = 0;
21 .loc 1 39 0
22 0000 1092 0000 sts tx_buffer+1024+1,__zero_reg__
23 0004 1092 0000 sts tx_buffer+1024,__zero_reg__
40:uart_async.c **** tx_buffer.end = 0;
24 .loc 1 40 0
25 0008 1092 0000 sts tx_buffer+1026+1,__zero_reg__
26 000c 1092 0000 sts tx_buffer+1026,__zero_reg__
41:uart_async.c ****
42:uart_async.c **** rx_buffer.start = 0;
27 .loc 1 42 0
28 0010 1092 0000 sts rx_buffer+64+1,__zero_reg__
29 0014 1092 0000 sts rx_buffer+64,__zero_reg__
43:uart_async.c **** rx_buffer.end = 0;
30 .loc 1 43 0
31 0018 1092 0000 sts rx_buffer+66+1,__zero_reg__
32 001c 1092 0000 sts rx_buffer+66,__zero_reg__
44:uart_async.c ****
45:uart_async.c **** UBRR0H = UBRRH_VALUE;
33 .loc 1 45 0
34 0020 1092 C500 sts 197,__zero_reg__
46:uart_async.c **** UBRR0L = UBRRL_VALUE;
35 .loc 1 46 0
36 0024 87E6 ldi r24,lo8(103)
37 0026 8093 C400 sts 196,r24
47:uart_async.c ****
48:uart_async.c **** UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); /* 8-bit data */
38 .loc 1 48 0
39 002a 86E0 ldi r24,lo8(6)
40 002c 8093 C200 sts 194,r24
49:uart_async.c **** UCSR0B = _BV(RXEN0) | _BV(TXEN0); /* Enable RX and TX */
41 .loc 1 49 0
42 0030 88E1 ldi r24,lo8(24)
43 0032 8093 C100 sts 193,r24
50:uart_async.c ****
51:uart_async.c **** sei();
44 .loc 1 51 0
45 /* #APP */
46 ; 51 "uart_async.c" 1
47 0036 7894 sei
48 ; 0 "" 2
49 /* epilogue start */
52:uart_async.c **** }
50 .loc 1 52 0
51 /* #NOAPP */
52 0038 0895 ret
53 .LFE1:
55 .global uart_putchar
57 uart_putchar:
58 .LFB2:
53:uart_async.c ****
54:uart_async.c **** int uart_putchar(char c, FILE *stream) {
59 .loc 1 54 0
60 .LVL0:
61 003a 1F93 push r17
62 .LCFI0:
63 /* prologue: function */
64 /* frame size = 0 */
65 /* stack size = 1 */
66 .L__stack_usage = 1
67 003c 182F mov r17,r24
55:uart_async.c **** if (c == '\n') {
68 .loc 1 55 0
69 003e 8A30 cpi r24,lo8(10)
70 0040 01F4 brne .L3
71 .LVL1:
56:uart_async.c **** uart_putchar('\r', stream);
72 .loc 1 56 0
73 0042 8DE0 ldi r24,lo8(13)
74 0044 0E94 0000 call uart_putchar
75 .LVL2:
76 .L3:
57:uart_async.c **** }
58:uart_async.c ****
59:uart_async.c **** int write_pointer = (tx_buffer.end + 1) % UART_TX_BUFFER_SIZE;
77 .loc 1 59 0
78 0048 2091 0000 lds r18,tx_buffer+1026
79 004c 3091 0000 lds r19,tx_buffer+1026+1
80 0050 C901 movw r24,r18
81 0052 0196 adiw r24,1
82 0054 60E0 ldi r22,lo8(512)
83 0056 72E0 ldi r23,hi8(512)
84 0058 0E94 0000 call __divmodhi4
85 .LVL3:
60:uart_async.c ****
61:uart_async.c **** if (write_pointer != tx_buffer.start){
86 .loc 1 61 0
87 005c 4091 0000 lds r20,tx_buffer+1024
88 0060 5091 0000 lds r21,tx_buffer+1024+1
89 0064 8417 cp r24,r20
90 0066 9507 cpc r25,r21
91 0068 01F0 breq .L4
62:uart_async.c **** tx_buffer.buffer[tx_buffer.end] = c;
92 .loc 1 62 0
93 006a F901 movw r30,r18
94 006c EE0F lsl r30
95 006e FF1F rol r31
96 0070 E050 subi r30,lo8(-(tx_buffer))
97 0072 F040 sbci r31,hi8(-(tx_buffer))
98 0074 1083 st Z,r17
99 0076 1182 std Z+1,__zero_reg__
63:uart_async.c **** tx_buffer.end = write_pointer;
100 .loc 1 63 0
101 0078 9093 0000 sts tx_buffer+1026+1,r25
102 007c 8093 0000 sts tx_buffer+1026,r24
64:uart_async.c ****
65:uart_async.c **** /* Data available. Enable the transmit interrupt for serial port 0. */
66:uart_async.c **** UCSR0B |= _BV(UDRIE0);
103 .loc 1 66 0
104 0080 8091 C100 lds r24,193
105 .LVL4:
106 0084 8062 ori r24,lo8(32)
107 0086 8093 C100 sts 193,r24
108 .LVL5:
109 .L4:
67:uart_async.c **** }
68:uart_async.c ****
69:uart_async.c **** return 0;
70:uart_async.c **** }
110 .loc 1 70 0
111 008a 80E0 ldi r24,lo8(0)
112 008c 90E0 ldi r25,hi8(0)
113 /* epilogue start */
114 008e 1F91 pop r17
115 .LVL6:
116 0090 0895 ret
117 .LFE2:
119 .global uart_getchar
121 uart_getchar:
122 .LFB3:
71:uart_async.c ****
72:uart_async.c **** int uart_getchar(FILE *stream) {
123 .loc 1 72 0
124 .LVL7:
125 /* prologue: function */
126 /* frame size = 0 */
127 /* stack size = 0 */
128 .L__stack_usage = 0
73:uart_async.c **** int read_pointer = (rx_buffer.start + 1) % UART_RX_BUFFER_SIZE;
129 .loc 1 73 0
130 0092 8091 0000 lds r24,rx_buffer+64
131 0096 9091 0000 lds r25,rx_buffer+64+1
132 .LVL8:
133 009a 0196 adiw r24,1
134 009c 60E2 ldi r22,lo8(32)
135 009e 70E0 ldi r23,hi8(32)
136 00a0 0E94 0000 call __divmodhi4
137 .LVL9:
74:uart_async.c ****
75:uart_async.c **** rx_buffer.start = read_pointer;
138 .loc 1 75 0
139 00a4 9093 0000 sts rx_buffer+64+1,r25
140 00a8 8093 0000 sts rx_buffer+64,r24
76:uart_async.c **** return rx_buffer.buffer[read_pointer];
141 .loc 1 76 0
142 00ac FC01 movw r30,r24
143 00ae EE0F lsl r30
144 00b0 FF1F rol r31
145 00b2 E050 subi r30,lo8(-(rx_buffer))
146 00b4 F040 sbci r31,hi8(-(rx_buffer))
77:uart_async.c **** }
147 .loc 1 77 0
148 00b6 8081 ld r24,Z
149 .LVL10:
150 00b8 9181 ldd r25,Z+1
151 /* epilogue start */
152 00ba 0895 ret
153 .LFE3:
155 .global __vector_18
157 __vector_18:
158 .LFB4:
78:uart_async.c ****
79:uart_async.c **** ISR(USART_RX_vect) {
159 .loc 1 79 0
160 00bc 1F92 push r1
161 .LCFI1:
162 00be 0F92 push r0
163 .LCFI2:
164 00c0 0FB6 in r0,__SREG__
165 00c2 0F92 push r0
166 00c4 1124 clr __zero_reg__
167 00c6 2F93 push r18
168 .LCFI3:
169 00c8 3F93 push r19
170 .LCFI4:
171 00ca 4F93 push r20
172 .LCFI5:
173 00cc 5F93 push r21
174 .LCFI6:
175 00ce 6F93 push r22
176 .LCFI7:
177 00d0 7F93 push r23
178 .LCFI8:
179 00d2 8F93 push r24
180 .LCFI9:
181 00d4 9F93 push r25
182 .LCFI10:
183 00d6 AF93 push r26
184 .LCFI11:
185 00d8 BF93 push r27
186 .LCFI12:
187 00da EF93 push r30
188 .LCFI13:
189 00dc FF93 push r31
190 .LCFI14:
191 /* prologue: Signal */
192 /* frame size = 0 */
193 /* stack size = 15 */
194 .L__stack_usage = 15
80:uart_async.c **** int write_pointer = (rx_buffer.end + 1) % UART_RX_BUFFER_SIZE;
195 .loc 1 80 0
196 00de 2091 0000 lds r18,rx_buffer+66
197 00e2 3091 0000 lds r19,rx_buffer+66+1
198 00e6 C901 movw r24,r18
199 00e8 0196 adiw r24,1
200 00ea 60E2 ldi r22,lo8(32)
201 00ec 70E0 ldi r23,hi8(32)
202 00ee 0E94 0000 call __divmodhi4
203 .LVL11:
81:uart_async.c ****
82:uart_async.c **** /* Add next byte to ringbuffer if it has space available. */
83:uart_async.c **** if (write_pointer != rx_buffer.start){
204 .loc 1 83 0
205 00f2 4091 0000 lds r20,rx_buffer+64
206 00f6 5091 0000 lds r21,rx_buffer+64+1
207 00fa 8417 cp r24,r20
208 00fc 9507 cpc r25,r21
209 00fe 01F0 breq .L6
84:uart_async.c **** rx_buffer.buffer[rx_buffer.end] = UDR0;
210 .loc 1 84 0
211 0100 4091 C600 lds r20,198
212 0104 F901 movw r30,r18
213 0106 EE0F lsl r30
214 0108 FF1F rol r31
215 010a E050 subi r30,lo8(-(rx_buffer))
216 010c F040 sbci r31,hi8(-(rx_buffer))
217 010e 4083 st Z,r20
218 0110 1182 std Z+1,__zero_reg__
85:uart_async.c **** rx_buffer.end = write_pointer;
219 .loc 1 85 0
220 0112 9093 0000 sts rx_buffer+66+1,r25
221 0116 8093 0000 sts rx_buffer+66,r24
222 .L6:
223 /* epilogue start */
86:uart_async.c **** }
87:uart_async.c **** }
224 .loc 1 87 0
225 011a FF91 pop r31
226 011c EF91 pop r30
227 011e BF91 pop r27
228 0120 AF91 pop r26
229 0122 9F91 pop r25
230 0124 8F91 pop r24
231 .LVL12:
232 0126 7F91 pop r23
233 0128 6F91 pop r22
234 012a 5F91 pop r21
235 012c 4F91 pop r20
236 012e 3F91 pop r19
237 0130 2F91 pop r18
238 0132 0F90 pop r0
239 0134 0FBE out __SREG__,r0
240 0136 0F90 pop r0
241 0138 1F90 pop r1
242 013a 1895 reti
243 .LFE4:
245 .global __vector_19
247 __vector_19:
248 .LFB5:
88:uart_async.c ****
89:uart_async.c **** ISR(USART_UDRE_vect){
249 .loc 1 89 0
250 013c 1F92 push r1
251 .LCFI15:
252 013e 0F92 push r0
253 .LCFI16:
254 0140 0FB6 in r0,__SREG__
255 0142 0F92 push r0
256 0144 1124 clr __zero_reg__
257 0146 2F93 push r18
258 .LCFI17:
259 0148 3F93 push r19
260 .LCFI18:
261 014a 5F93 push r21
262 .LCFI19:
263 014c 6F93 push r22
264 .LCFI20:
265 014e 7F93 push r23
266 .LCFI21:
267 0150 8F93 push r24
268 .LCFI22:
269 0152 9F93 push r25
270 .LCFI23:
271 0154 AF93 push r26
272 .LCFI24:
273 0156 BF93 push r27
274 .LCFI25:
275 0158 EF93 push r30
276 .LCFI26:
277 015a FF93 push r31
278 .LCFI27:
279 /* prologue: Signal */
280 /* frame size = 0 */
281 /* stack size = 14 */
282 .L__stack_usage = 14
90:uart_async.c **** int read_pointer = (tx_buffer.start + 1) % UART_TX_BUFFER_SIZE;
283 .loc 1 90 0
284 015c 8091 0000 lds r24,tx_buffer+1024
285 0160 9091 0000 lds r25,tx_buffer+1024+1
286 0164 0196 adiw r24,1
287 0166 60E0 ldi r22,lo8(512)
288 0168 72E0 ldi r23,hi8(512)
289 016a 0E94 0000 call __divmodhi4
290 .LVL13:
91:uart_async.c ****
92:uart_async.c **** /* Transmit next byte if data available in ringbuffer. */
93:uart_async.c **** if (read_pointer != tx_buffer.end) {
291 .loc 1 93 0
292 016e 2091 0000 lds r18,tx_buffer+1026
293 0172 3091 0000 lds r19,tx_buffer+1026+1
294 0176 8217 cp r24,r18
295 0178 9307 cpc r25,r19
296 017a 01F0 breq .L9
94:uart_async.c **** UDR0 = tx_buffer.buffer[read_pointer];
297 .loc 1 94 0
298 017c FC01 movw r30,r24
299 017e EE0F lsl r30
300 0180 FF1F rol r31
301 0182 E050 subi r30,lo8(-(tx_buffer))
302 0184 F040 sbci r31,hi8(-(tx_buffer))
303 0186 2081 ld r18,Z
304 0188 2093 C600 sts 198,r18
95:uart_async.c **** tx_buffer.start = read_pointer;
305 .loc 1 95 0
306 018c 9093 0000 sts tx_buffer+1024+1,r25
307 0190 8093 0000 sts tx_buffer+1024,r24
308 0194 00C0 rjmp .L8
309 .L9:
96:uart_async.c **** } else {
97:uart_async.c **** /* Nothing to send. Disable the transmit interrupt for serial port 0. */
98:uart_async.c **** UCSR0B &= ~_BV(UDRIE0);
310 .loc 1 98 0
311 0196 8091 C100 lds r24,193
312 .LVL14:
313 019a 8F7D andi r24,lo8(-33)
314 019c 8093 C100 sts 193,r24
315 .L8:
316 /* epilogue start */
99:uart_async.c **** }
100:uart_async.c **** }
317 .loc 1 100 0
318 01a0 FF91 pop r31
319 01a2 EF91 pop r30
320 01a4 BF91 pop r27
321 01a6 AF91 pop r26
322 01a8 9F91 pop r25
323 01aa 8F91 pop r24
324 01ac 7F91 pop r23
325 01ae 6F91 pop r22
326 01b0 5F91 pop r21
327 01b2 3F91 pop r19
328 01b4 2F91 pop r18
329 01b6 0F90 pop r0
330 01b8 0FBE out __SREG__,r0
331 01ba 0F90 pop r0
332 01bc 1F90 pop r1
333 01be 1895 reti
334 .LFE5:
336 .lcomm tx_buffer,1028
337 .lcomm rx_buffer,68
564 .Letext0:
565 .file 2 "/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdio.h"
566 .file 3 "/usr/local/Cellar/avr-gcc/4.6.1/lib/gcc/avr/4.6.1/../../../../avr/include/stdint.h"
DEFINED SYMBOLS
*ABS*:0000000000000000 uart_async.c
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchq05jZ.s:2 *ABS*:000000000000003f __SREG__
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchq05jZ.s:3 *ABS*:000000000000003e __SP_H__
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchq05jZ.s:4 *ABS*:000000000000003d __SP_L__
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchq05jZ.s:5 *ABS*:0000000000000000 __tmp_reg__
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchq05jZ.s:6 *ABS*:0000000000000001 __zero_reg__
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchq05jZ.s:13 .text:0000000000000000 uart_init
.bss:0000000000000000 tx_buffer
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchq05jZ.s:336 .bss:0000000000000404 rx_buffer
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchq05jZ.s:57 .text:000000000000003a uart_putchar
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchq05jZ.s:121 .text:0000000000000092 uart_getchar
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchq05jZ.s:157 .text:00000000000000bc __vector_18
/var/folders/6p/hvps1d6n58jfd6qghfhb96600000gn/T//cchq05jZ.s:247 .text:000000000000013c __vector_19
UNDEFINED SYMBOLS
__do_copy_data
__do_clear_bss
__divmodhi4

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